X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=f66d5a48585ba11a06dacff2c9dfaecb35e8c4bc;hb=da5715e693f4a34ba06dd0625531fb788b8441a1;hp=ac5184903424f2b3e994ca81661f38506e156b1f;hpb=d02305b214c14df6628c9a4277c6cba662202c05;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ac51849034..f66d5a4858 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,684 @@ +Fri Dec 12 01:32:30 1997 Richard Henderson + + * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid. + +Wed Dec 10 17:42:35 1997 Nick Clifton + + * arm-dis.c (print_insn_little_arm): Prevent examination of stored + symbol if none is present. + (print_insn_big_arm): Prevent examination of stored symbol if + none is present. + +Thu Oct 23 21:13:37 1997 Fred Fish + + * d10v-opc.c (d10v_opcodes): Correct entry for RTE. + +Mon Dec 8 11:21:07 1997 Nick Clifton + + * disassemble.c: Remove disasm_symaddr() function. + + * arm-dis.c: Use info->symbol instead of info->flags to determine + if disassmbly should be in Thumb or Arm mode. + +Tue Dec 2 09:54:27 1997 Nick Clifton + + * arm-dis.c: Add support for disassembling Thumb opcodes. + (print_insn_thumb): New function. + + * disassemble.c (disasm_symaddr): New function. + + * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly. + (thumb_opcodes): Table of Thumb opcodes. + +Mon Dec 1 12:25:57 1997 Andreas Schwab + + * m68k-opc.c (btst): Change Dd@s to Dd;b. + + * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q', + and 'v' as operand types. + +Mon Dec 1 11:56:50 1997 Ian Lance Taylor + + * m68k-opc.c: Add argument for lpstop. From Olivier Carmona + . + * m68k-dis.c (print_insn_m68k): Handle special case of lpstop, + which has a two word opcode with a one word argument. + +start-sanitize-d30v +Sun Nov 23 22:25:21 1997 Michael Meissner + + * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is + unsigned, not signed. + (d30v_format_table): Add SHORT_CMPU cases for cmpu. + +end-sanitize-d30v +start-sanitize-sh4 +Wed Nov 19 17:42:35 1997 Richard Henderson + + * sh-dis.c (print_insn_shx): Recognize all sh4 additions. + * sh-opc.h (fmov): Add @+, variant for sh4. + (ftrv): Slay the cut-and-paste monster. + +end-sanitize-sh4 +Tue Nov 18 23:10:03 1997 J"orn Rennecke + + * d10v-dis.c (print_operand): + Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG. + +Tue Nov 18 18:45:14 1997 J"orn Rennecke + + * d10v-opc.c (OPERAND_FLAG): Split into: + (OPERAND_FFLAG, OPERAND_CFLAG) . + (FSRC): Split into: + (FFSRC, CFSRC). + +Thu Nov 13 11:05:33 1997 Gavin Koch + + * mips-opc.c: Move the INSN_MACRO ISA value to the membership + field for all INSN_MACRO's. + * mips16-opc.c: same + +Wed Nov 12 10:16:57 1997 Gavin Koch + + * mips-opc.c (sync,cache): These are 3900 insns. + +Tue Nov 11 23:53:41 1997 J"orn Rennecke + + sh-opc.h (sh_table): Remove ftst/nan. + +start-sanitize-vr5400 +Mon Nov 3 13:23:15 1997 Ken Raeburn + + * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding. + (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version + last. + * mips-dis.c (print_insn_arg): Handle VR5400 operand types. + +end-sanitize-vr5400 +start-sanitize-tx49 +Wed Oct 29 15:10:56 1997 Gavin Koch + + * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp): + Add tx49 insns and configury. + +end-sanitize-tx49 +Tue Oct 28 17:59:32 1997 Ken Raeburn + + * mips-opc.c (ffc, ffs): Fix mask. + +start-sanitize-d30v +Tue Oct 28 16:34:54 1997 Michael Meissner + + * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m + control registers. + +end-sanitize-d30v +Mon Oct 27 22:34:03 1997 Ken Raeburn + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. +start-sanitize-vr5400 + Added VR5400 instructions. + (N5): New cpu-id macro. +end-sanitize-vr5400 + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Mon Oct 27 22:34:03 1997 Ken Raeburn + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Thu Oct 23 14:57:58 1997 Nick Clifton + + * v850-dis.c (disassemble): Replace // with /* ... */ + +Wed Oct 22 17:33:21 1997 Richard Henderson + + * sparc-opc.c: Add wr & rd for v9a asr's. + * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's. + (v9a_asr_reg_names): New variable. + Patch from David Miller . + +Wed Oct 22 17:18:02 1997 Richard Henderson + + * sparc-opc.c (v9notv9a): New insn type. + (IMPDEP): Move to the end to not conflict with edge8 et al. + Patch from David Miller . + +Fri Oct 17 13:18:53 1997 Gavin Koch + + * mips-opc.c (bnezl,beqzl): Mark these as also tx39. + +Thu Oct 16 11:55:20 1997 Gavin Koch + + * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1. + +Tue Oct 14 16:10:31 1997 Nick Clifton + + * v850-dis.c (disassemble): Use new symbol_at_address_func() field + of disassemble_info structure to determine if an overlay address + has a matching symbol in low memory. + + * dis-buf.c (generic_symbol_at_address): New (dummy) function for + new symbol_at_address_func field in disassemble_info structure. + +Fri Oct 10 16:44:52 1997 Nick Clifton + + * v850-opc.c (extract_d22): Use signed arithmatic. + +Tue Oct 7 23:40:43 1997 Gavin Koch + + * mips-opc.c: Three op mult is not an ISA insn. + +Tue Oct 7 23:37:21 1997 Gavin Koch + + * mips-opc.c: Fix formatting. + +Fri Oct 3 17:26:54 1997 Ian Lance Taylor + + * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather + than assuming that char is signed. Explicitly sign extend 16 bit + values, rather than assuming that short is 16 bits. + (OP_sI, OP_J, OP_DIR): Likewise. + +start-sanitize-v850e +Thu Oct 2 13:36:45 1997 Nick Clifton + + * v850-dis.c (v850_sreg_names): Use symbolic names for higher + system registers. + +end-sanitize-v850e +Wed Oct 1 16:58:54 1997 Nick Clifton + + * v850-opc.c: Fix typo in comment. + + * v850-dis.c (disassemble): Add test of processor type when + determining opcodes. + +Wed Oct 1 14:10:20 1997 Ian Lance Taylor + + * configure.in: Use a diversion to set enable_shared before the + arguments are parsed. + * configure: Rebuild. + +Thu Sep 25 13:04:59 1997 Ian Lance Taylor + + * m68k-opc.c (TBL1): Use ! rather than `. + * m68k-dis.c (print_insn_arg): Remove ` operand specifier. + +Wed Sep 24 11:29:35 1997 Ian Lance Taylor + + * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire. + + * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32. + + * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr + for mcf5200. + + * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL. + * aclocal.m4: Rebuild with new libtool. + * configure: Rebuild. + +start-sanitize-v850e +Fri Sep 19 11:45:49 1997 Andrew Cagney + + * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2. + +end-sanitize-v850e +Thu Sep 18 11:21:43 1997 Doug Evans + + * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr. + +Tue Sep 16 15:18:20 1997 Nick Clifton + + * v850-opc.c (v850_opcodes): Further rearrangements. + +start-sanitize-d30v +Tue Sep 16 16:12:11 1997 Ken Raeburn + + * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change. + +end-sanitize-d30v +Tue Sep 16 09:48:50 1997 Nick Clifton + + * v850-opc.c (v850_opcodes): Fields reordered to allow assembler + parser to work. + +Tue Sep 16 10:01:00 1997 Gavin Koch + + * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret. +start-sanitize-tx19 + * mips16-opc.c: Added mips16 sdbbp. +end-sanitize-tx19 + +Mon Sep 15 18:31:52 1997 Nick Clifton + + * v850-opc.c: Initialise processors field of v850_opcode structure. + +start-sanitize-d30v +Wed Aug 27 21:42:39 1997 Ken Raeburn + + Merge changes from Martin Hunt: + + * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values. + + * d30v-opc.c (pre_defined_registers): Add control registers from 0-63. + (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix + rot2h, sra2h, and srl2h to use new SHORT_A5S format. + + * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes. + + * d30v-dis.c (print_insn): First operand of d*i (delayed + branch) instructions is relative. + + * d30v-opc.c (d30v_opcode_table): Change form for repeati. + (d30v_operand_table): Add IMM6S3 type. + (d30v_format_table): Change SHORT_D2. Add LONG_Db. + + * d30v-dis.c: Fix bug with ".s" and ".l" extensions + and cmp instructions. + + * d30v-opc.c: Correct entries for repeat*, and sat*. + Make IMM5 unsigned. Create IMM6U and IMM12S3U operand + types. Correct several formats. + + * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc. + + * d30v-opc.c (pre_defined_registers): Change control registers. + + * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and + SHORT_C2. Manual was incorrect. + + * d30v-dis.c (lookup_opcode): Return value now indicates + if an opcode has a short and a long form. Used for deciding + to append a ".s" or ".l". + (print_insn): Append a ".s" to an instruction if it is + the short form and ".l" if it is a long form. Do not append + anything if the instruction has only one possible size. + + * d30v-opc.c: Change mulx2h to require an even register. + New form: SHORT_A2; a SHORT_A form that needs an even + register as the first operand. + + * d30v-dis.c (print_insn_d30v): Fix problem where the last + instruction was not being disassembled if there were an odd + number of instructions. + + * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms. + +end-sanitize-d30v +start-sanitize-v850e +Fri Sep 12 11:43:54 1997 Nick Clifton + + * v850-dis.c (disassemble): Improved display of register lists. + +end-sanitize-v850e +Thu Sep 11 17:35:10 1997 Doug Evans + + * sparc-opc.c (sparc_opcodes): Fix assembler args to + fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s, + fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s, + fandnot1s, fandnot2s. + +Tue Sep 9 10:03:49 1997 Doug Evans + + * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq. + +Mon Sep 8 14:06:59 1997 Doug Evans + + * cgen-asm.c (cgen_parse_address): New argument resultp. + All callers updated. + * m32r-asm.c (parse_h_hi16): Right shift numbers by 16. + +Tue Sep 2 18:39:08 1997 Jeffrey A Law (law@cygnus.com) + + * mn10200-dis.c (disassemble): PC relative instructions are + relative to the next instruction, not the current instruction. + +Tue Sep 2 15:41:55 1997 Nick Clifton + + * v850-dis.c (disassemble): Only signed extend values that are not + returned by extract functions. + Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag. + +Tue Sep 2 15:39:40 1997 Nick Clifton + + * v850-opc.c: Update comments. Remove use of + V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns. + +Tue Aug 26 09:42:28 1997 Nick Clifton + + * v850-opc.c (MOVHI): Immediate parameter is unsigned. + +Mon Aug 25 15:58:07 1997 Christopher Provenzano + + * configure: Rebuilt with latest devo autoconf for NT support. + +Fri Aug 22 10:35:15 1997 Nick Clifton + + * v850-dis.c (disassemble): Use curly brace syntax for register + lists. + + * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases + where r0 is being used as a destination register. + +start-sanitize-v850e +Thu Aug 21 11:09:09 1997 Nick Clifton + + * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other. +end-sanitize-v850e + +start-sanitize-sh4 +Wed Aug 20 00:43:11 1997 J"orn Rennecke + + * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR. + (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions. + (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb. + Add insns to access SGR and DBR. + * sh-dis.c (print_insn_shx): Add SH4 floating point extensions. + +end-sanitize-sh4 +Tue Aug 19 10:59:59 1997 Richard Henderson + + * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage. + +start-sanitize-v850e +Mon Aug 18 11:10:03 1997 Nick Clifton + + * v850-opc.c (v850_opcodes[]): Remove use of flag field. + * v850-opc.c (v850_opcodes[]): Add support for reversed short load + opcodes.. + +Mon Aug 18 11:08:25 1997 Nick Clifton + + * configure (cgen_files): Add support for v850e target. + * configure.in (cgen_files): Add support for v850e target. + +Mon Aug 18 11:08:25 1997 Nick Clifton + + * configure (cgen_files): Add support for v850eq target. + * configure.in (cgen_files): Add support for v850eq target. +end-sanitize-v850e + +Fri Aug 15 05:17:48 1997 Doug Evans + + * configure.in (bfd_arc_arch): Add. + * configure: Rebuild. + * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo. + * Makefile.in: Rebuild. + * arc-dis.c, arc-opc.c: New files. + * disassemble.c (ARCH_all): Define ARCH_arc. + (disassembler): Add ARC support. + +Wed Aug 13 18:52:11 1997 Nick Clifton + +start-sanitize-v850e + * v850-dis.c (disassemble): Add support for v850EQ instructions. + + * v850-opc.c (insert_i5div, extract_i5div): New Functions. + (v850_opcodes): Add v850EQ instructions. + + * v850-dis.c (disassemble): Add support for v850E instructions. + + * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16, + extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9, + insert_spe, extract_spe): New Functions. + (v850_opcodes): Add v850E instructions. +end-sanitize-v850e + + * v850-opc.c: Reorganised and re-layed out to improve readability + and portability. + +Tue Aug 5 23:09:31 1997 Ian Lance Taylor + + * configure: Rebuild with autoconf 2.12.1. + +Mon Aug 4 12:02:16 1997 Ian Lance Taylor + + * aclocal.m4, configure: Rebuild with new automake patches. + +Fri Aug 1 13:02:04 1997 Ian Lance Taylor + + * configure.in: Set enable_shared before AM_PROG_LIBTOOL. + * acinclude.m4: Just include acinclude.m4 from BFD. + * aclocal.m4, configure: Rebuild. + +Thu Jul 31 21:44:42 1997 Ian Lance Taylor + + * Makefile.am: New file, based on old Makefile.in. + * acconfig.h: New file. + * acinclude.m4: New file. + * stamp-h.in: New file. + * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL. + Removed shared library handling; now handled by libtool. Replace + AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE, + AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with + AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h + handling in AC_OUTPUT. + * dep-in.sed: Change .o to .lo. + * Makefile.in: Now built with automake. + * aclocal.m4: Now built with aclocal. + * config.in, configure: Rebuild. + +Mon Jul 28 21:52:24 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c: Fix typo/thinko in "eret" instruction. + +start-sanitize-r5900 +Mon Jul 28 22:07:14 1997 Andrew Cagney + + * mips-opc.c: Fix coding of mtsa. + +end-sanitize-r5900 +Thu Jul 24 13:03:26 1997 Doug Evans + + * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns. + Make array const. + * sparc-dis.c (sorted_opcodes): New static local. + (struct opcode_hash): `opcode' is pointer to const element. + (build_hash): First arg is now table of sorted pointers. + (print_insn_sparc): Sort opcodes by sorting table of pointers. + (compare_opcodes): Update. + +Tue Jul 15 12:05:23 1997 Doug Evans + + * cgen-opc.c: #include . + (hash_keyword_name): New arg `case_sensitive_p'. Callers updated. + Handle case insensitive hashing. + (hash_keyword_value): Change type of `value' to unsigned int. + +Thu Jul 10 12:56:10 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mips_builtin_opcodes): If an insn uses single + precision FP, mark it as such. Likewise for double precision + FP. Mark ISA1 insns. Consolidate duplicate opcodes where + possible. +start-sanitize-r5900 + (mips_builtin_opcodes): Remove non-existant r5900 instructions +end-sanitize-r5900 + +start-sanitize-r5900 +Thu Jun 26 16:20:27 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and + "pexew" as synonyms for "pintoh", "pexoh", "pexow". + +end-sanitize-r5900 +Wed Jun 25 15:25:57 1997 Felix Lee + + * ppc-opc.c (extract_nsi): make unsigned expression signed before + negating it. + (UNUSED): remove one level of parens, so MSVC doesn't choke on + nesting depth when all the macros are expanded. + +Tue Jun 17 17:02:17 1997 Ian Lance Taylor + + * sparc-opc.c: The fcmp v9a instructions take an integer register + as a destination, not a floating point register. From Christian + Kuehnke . + +Mon Jun 16 14:13:18 1997 Ian Lance Taylor + + * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@() + syntax. From Roman Hodek + . + + * i386-dis.c (twobyte_has_modrm): Fix pand. + +Mon Jun 16 14:08:38 1997 Michael Taylor + + * i386-dis.c (dis386_twobyte): Fix pand and pandn. + +Tue Jun 10 11:26:47 1997 H.J. Lu + + * arm-dis.c: Add prototypes for arm_decode_shift and + print_insn_arm. + +Mon Jun 2 11:39:04 1997 Gavin Koch + + * mips-opc.c: Add r3900 insns. + +Tue May 27 15:55:44 1997 Ian Lance Taylor + + * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't + print delay slot instructions on the same line. When using a PC + relative load, add a comment with the value being loaded if it can + be obtained. + +Tue May 27 11:02:08 1997 Alan Modra + + * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl + to pushS/popS for segment regs and byte constant so that + pushw/popw printed when in 16 bit data mode. + + * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to + print cbtw, cwtd in 16 bit data mode. + * i386-dis.c (putop): extra case W to support above. + + * i386-dis.c (print_insn_x86): print addr32 prefix when given + address size prefix in 16 bit address mode. + +Fri May 23 16:47:23 1997 Ian Lance Taylor + + * sh-dis.c: Reindent. Rename local variable fprintf to + fprintf_fn. + +Thu May 22 14:06:02 1997 Doug Evans + + * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2. + +Tue May 20 11:26:27 1997 Gavin Koch + + * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new + field membership. + * mips16-opc.c (mip16_opcodes): same. + +Mon May 12 15:10:53 1997 Jim Wilson + + * m68k-opc.c (moveb): Change $d to %d. + +Mon May 5 14:28:41 1997 Ian Lance Taylor + + * i386-dis.c: (dis386_twobyte): Add MMX instructions. + (twobyte_has_modrm): Likewise. + (grps): Likewise. + (OP_MMX, OP_EM, OP_MS): New static functions. + + * i386-dis.c: Revert patch of April 4. The output now matches + what gcc generates. + +Fri May 2 12:48:37 1997 Doug Evans + + * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead + of $simm16. + +Thu May 1 15:34:15 1997 Doug Evans + + * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU. + +Tue Apr 15 12:40:08 1997 Ian Lance Taylor + + * Makefile.in (install): Depend upon installdirs. + (installdirs): New target. + +Mon Apr 14 12:13:51 1997 Ian Lance Taylor + + From Thomas Graichen : + * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub. + * configure: Rebuild. + +Sun Apr 13 17:50:41 1997 Doug Evans + + * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h. + Delete string{,s}.h support. + +Thu Apr 10 14:44:56 1997 Doug Evans + + * cgen-asm.c (cgen_parse_operand_fn): New global. + (cgen_parse_{{,un}signed_integer,address}): Update call to + cgen_parse_operand_fn. + (cgen_init_parse_operand): New function. + * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed + from cgen_asm_init_parse. + (m32r_cgen_assemble_insn): New operand `errmsg'. + Delete call to as_bad, return error message to caller. + (m32r_cgen_asm_hash_keywords): #if 0 out. + +Wed Apr 9 12:05:25 1997 Andreas Schwab + + * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register, + not data register. + [case 'J']: Fix typo in register name. + +Mon Apr 7 16:48:22 1997 Ian Lance Taylor + + * configure.in: Substitute SHLIB_LIBS. + * configure: Rebuild. + * Makefile.in (SHLIB_LIBS): New variable. + ($(SHLIB)): Use $(SHLIB_LIBS). + +Mon Apr 7 11:45:44 1997 Doug Evans + + * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation. + + * cgen-opc.c (hash_keyword_name): Improve algorithm. + + * disassemble.c (disassembler): Handle m32r. + +Fri Apr 4 12:29:38 1997 Doug Evans + + * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files. + * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files. + * Makefile.in (CFILES): Add them. + (ALL_MACHINES): Add them. + (dependencies): Regenerate. + * configure.in (cgen_files): New variable. + (bfd_m32r_arch): Add entry. + * configure: Regenerate. + +Fri Apr 4 14:04:16 1997 Ian Lance Taylor + + * configure.in: Correct file names for bfd_mn10[23]00_arch. + * configure: Rebuild. + + * Makefile.in: Rebuild dependencies. + + * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h". + + * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and + fdivp. + +Thu Apr 3 13:22:45 1997 Ian Lance Taylor + + * Branched binutils 2.8. + Wed Apr 2 12:23:53 1997 Ian Lance Taylor + * m10200-dis.c: Rename from mn10200-dis.c. + * m10200-opc.c: Rename from mn10200-opc.c. + * m10300-dis.c: Rename from mn10300-dis.c + * m10300-opc.c: Rename from mn10300-opc.c. + * Makefile.in: Update accordingly. + * mips16-opc.c: Add mul and dmul macros. Tue Apr 1 16:27:45 1997 Klaus Kaempf @@ -25,14 +704,12 @@ Thu Mar 27 14:24:43 1997 Ian Lance Taylor * mips-opc.c: Add cast when setting mips_opcodes. -start-sanitize-v850 Tue Mar 25 23:04:00 1997 Stu Grossman (grossman@critters.cygnus.com) * v850-dis.c (disassemble): Fix sign extension problem. * v850-opc.c (extract_d*): Fix sign extension problems to make disassembly calculate branch offsets correctly. -end-sanitize-v850 Mon Mar 24 13:22:13 1997 Ian Lance Taylor * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s. @@ -506,25 +1183,21 @@ Thu Jan 2 12:14:29 1997 Jeffrey A Law (law@cygnus.com) * mn10300-dis.c (disassemble): Make sure all variables are initialized before they are used. -start-sanitize-v850 Tue Dec 31 12:20:38 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Put curly-braces around operands for "breakpoint" instruction. -end-sanitize-v850 Tue Dec 31 15:38:13 1996 Ian Lance Taylor * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE. (dep): Use ALL_CFLAGS rather than CFLAGS. -start-sanitize-v850 Tue Dec 31 15:09:16 1996 Michael Meissner * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY flag. -end-sanitize-v850 Mon Dec 30 17:02:11 1996 Fred Fish * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency. @@ -784,30 +1457,25 @@ Fri Nov 1 10:29:11 1996 Richard Henderson (alpha_opcodes): Add new BWX, CIX, and MAX instructions. Recategorize PALcode instructions. -start-sanitize-v850 Wed Oct 30 16:46:58 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Add relaxing "jbr". -end-sanitize-v850 Tue Oct 29 16:30:28 1996 Ian Lance Taylor * mips-dis.c (_print_insn_mips): Don't print a trailing tab if there are no operand types. -start-sanitize-v850 Tue Oct 29 12:22:21 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (D9_RELAX): Renamed from D9, all references changed. (v850_operands): Make sure D22 immediately follows D9_RELAX. -end-sanitize-v850 Fri Oct 25 12:12:53 1996 Ian Lance Taylor * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5. -start-sanitize-v850 Thu Oct 24 17:53:52 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w @@ -816,7 +1484,6 @@ Thu Oct 24 17:53:52 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for "bCC"instructions). -end-sanitize-v850 Thu Oct 24 17:21:20 1996 Ian Lance Taylor * mips-dis.c (_print_insn_mips): Use a tab between the instruction @@ -832,12 +1499,10 @@ Fri Oct 11 16:03:49 1996 Jeffrey A Law (law@cygnus.com) * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field for movhu instruction. -start-sanitize-v850 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands, cast value to "long" not "signed long" to keep hpux10 compiler quiet. -end-sanitize-v850 Thu Oct 10 10:25:58 1996 Jeffrey A Law (law@cygnus.com) @@ -920,7 +1585,6 @@ Tue Oct 1 10:49:11 1996 Ian Lance Taylor * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses accordingly. Don't declare functions using op_rtn. -start-sanitize-v850 Fri Sep 27 18:28:59 1996 Stu Grossman (grossman@critters.cygnus.com) * v850-dis.c (disassemble): Add memaddr argument. Re-arrange @@ -931,7 +1595,6 @@ Fri Sep 27 18:28:59 1996 Stu Grossman (grossman@critters.cygnus.com) bit operands. * (v850_opcodes): Add breakpoint insn. -end-sanitize-v850 Mon Sep 23 12:32:26 1996 Ian Lance Taylor * m68k-opc.c: Move the fmovemx data register cases before the @@ -957,7 +1620,6 @@ Tue Sep 3 12:09:46 1996 Doug Evans * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx. -start-sanitize-v850 Tue Sep 3 12:05:25 1996 Jeffrey A Law (law@cygnus.com) * v850-dis.c (disassemble): Make static. Provide prototype. @@ -992,8 +1654,7 @@ Sat Aug 31 01:27:26 1996 Jeffrey A Law (law@cygnus.com) (v850_opcodes): Fix mask for jarl and jr. * v850-dis.c: New file. Skeleton for disassembler support. - * Makefile.in Remove v850 references, they're not needed here - and they weren't being sanitized away. + * Makefile.in Remove v850 references, they're not needed here. * configure.in: Add v850-dis.o when building v850 toolchains. * configure: Rebuilt. * disassemble.c (disassembler): Call v850 disassembler. @@ -1045,13 +1706,11 @@ Wed Aug 28 15:55:43 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Add null opcode to mark the end of the opcode table. -end-sanitize-v850 Mon Aug 26 13:35:53 1996 Martin M. Hunt * d10v-opc.c (pre_defined_registers): Added register pairs, "r0-r1", "r2-r3", etc. -start-sanitize-v850 Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_operands): Make I16 be a signed operand. @@ -1134,7 +1793,6 @@ Tue Aug 20 14:41:03 1996 J.T. Conklin * configure.in: (bfd_v850_arch) Add new case. * v850-opc.c: New file. -end-sanitize-v850 Mon Aug 19 15:21:38 1996 Doug Evans * sparc-dis.c (print_insn_sparc): Handle little endian sparcs. @@ -2064,12 +2722,6 @@ Tue Jul 11 11:49:49 1995 Ian Lance Taylor shifted by 18, without any insertion or extraction function. (insert_cr, extract_cr): Remove. -start-sanitize-arc -Mon Jul 3 11:54:31 1995 Ian Lance Taylor - - * Makefile.in (ALL_MACHINES): Add arc-dis.o and arc-opc.o. - -end-sanitize-arc Wed Jun 21 20:05:39 1995 Ken Raeburn * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before @@ -2105,13 +2757,6 @@ Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk) * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for the correct endianness. -start-sanitize-arc -Sat Apr 29 23:20:05 1995 Doug Evans - - * arc-opc.c (arc_opcodes): Add ARC_OPCODE_CONDITIONAL_BRANCH flag. - (arc_suffixes): Use ARC_DELAY_{NONE,NORMAL,JUMP}. -end-sanitize-arc - Mon Apr 24 14:18:05 1995 Jason Molenda (crash@phydeaux.cygnus.com> * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from @@ -2137,28 +2782,6 @@ Mon Apr 17 12:23:28 1995 Kung Hsu * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because gcc memory hog problem with initializer is fixed. -start-sanitize-arc -Wed Apr 12 09:04:12 1995 Doug Evans - - * arc-opc.c (NULL): Define. - (arc_operands, insn fields u,s): Delete. - (arc_operands, insn fields a,b,c): Mark as signed. - (arc_opcodes): No longer const, links computed at run-time. - (arc_opcodes, mac/mul insns): Breakout suffixes as we don't handle - suffixes that affect the insn code. - (arc_opcodes): Resort table to macros are first. - (arc_opcodes, ld [b,c] entry): Add %Q to prevent shimms. - (arc_opcodes, st [b] entry): Likewise. - (arc_opcodes, st [b,d] entry): Fix mask, value. - (arc_reg_names): Add entries for r29, r30, r31, r60. - (opcode_map, icode_map): New static globals. - (arc_opcode_init_tables): Initialize them. - (arc_opcode_lookup_asm, arc_opcode_lookup_dis): New functions. - (insert_shimmoffset): Signal error if register present. - Validate constant. - * arc-dis.c (print_insn): Call arc_opcode_lookup_dis. -end-sanitize-arc - Mon Apr 10 15:55:01 1995 Stan Shebs Merge in support for Mac MPW as a host. @@ -2184,15 +2807,6 @@ Mon Apr 10 15:55:01 1995 Stan Shebs * mpw-config.in: New file, MPW version of configure.in. * mpw-make.in: New file, MPW version of Makefile.in. -start-sanitize-arc -Thu Apr 6 20:36:08 1995 Doug Evans - - * arc-dis.c (print_insn): New parameter `big_p'. Callers updated. - Call arc_get_opcode_mach to map bfd mach number to opcode value. - (print_insn_*): Pass bfd mach number, not opcode version. - * arc-opc.c (arc_get_opcode_mach): New function. -end-sanitize-arc - Fri Mar 31 14:23:38 1995 Ken Raeburn * alpha-dis.c (print_insn_alpha): Put empty statement after @@ -2241,21 +2855,6 @@ Wed Mar 8 02:54:05 1995 Ken Raeburn (print_insn_arg): Arrays cacheFieldName and names now const. (print_indexed): Array scales now const. -start-sanitize-arc -Tue Mar 7 21:14:14 1995 Doug Evans - - * arc-dis.c (print_insn_arc_base): Split into big and little fns. - (print_insn_arc_{host,graphics,audio}): Likewise. - (print_insn): Add prototype. - (arc_get_disassembler): New arg `big_p'. Return little or big - print fn accordingly. - * arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once. - (arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order. - (arc_opval_supported): Likewise. - * disassemble.c (disassembler): Pass big endian flag to - arc_get_disassembler. -end-sanitize-arc - Tue Mar 7 16:41:21 1995 Ian Lance Taylor * ppc-opc.c: Sort recently added instructions by minor opcode @@ -2273,13 +2872,6 @@ Mon Feb 20 23:54:38 1995 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) * Makefile.in (ALL_MACHINES): Add w65-dis.o. -start-sanitize-arc -Fri Feb 17 12:42:25 1995 Doug Evans - - * arc-dis.c (arc_get_disassembler): Change argument to int, - one of bfd_mach_arc_xxx. All callers updated. -end-sanitize-arc - Thu Feb 16 17:34:41 1995 Ian Lance Taylor * mips-opc.c: Add r4650 mul instruction. @@ -2294,37 +2886,6 @@ Tue Feb 14 13:17:37 1995 Michael Meissner * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci, mfdcr, mtdcr, icbt, iccci. -start-sanitize-arc -Mon Feb 13 11:09:17 1995 Doug Evans - - * arc-dis.c (print_insn): Handle ARC_OPERAND_ADDRESS. - * arc-opc.c (arc_operands): New operand 'J' for jump addresses. - ('L' operand): Mark as ARC_OPERAND_ADDRESS. - (arc_opcodes, j insn): Use 'J' operand type, not 'L'. - (arc_opcodes, ld/st insns): Fix address writeback operand letter. - (insert_absaddr): New function. - -Thu Feb 9 19:19:23 1995 Doug Evans - - * arc-dis.c (print_insn_arc): Rename to print_insn and make static. - New argument `cpu', pass it to arc_opcode_init_tables. - Document byte order dependencies. Ignore unsupported insns. - (arc_get_disassembler): New function. - (print_insn_arc_base, print_insn_arc_host, print_insn_arc_graphics, - print_insn_arc_audio): New functions. - * arc-opc.c (MULTSHIFT operand): Delete. - (UNSIGNED, SATURATION): New operands. - (mac, mul, mul64, mulu64): New insns. - (ext. asl, asr, lsr, ror): Only available on host and graphics cpus. - (padc, padd, pmov, pand, psbc, psub, swap): New insns. - (host,graphics,audio extended and auxiliary regs): Define. - (ss, sc, mh, ml): New suffixes. - (arc_opcode_supported, arc_opval_supported): New functions. - (insert_multshift, extract_multshift): Deleted. - * disassemble.c (disassembler, case bfd_arch_arc): Call - arc_get_disassembler to get disassembler routine. -end-sanitize-arc - Thu Feb 9 12:28:13 1995 Stan Shebs * i960-dis.c (struct tabent, struct sparse_tabent): Change the @@ -2377,45 +2938,10 @@ Wed Dec 28 22:15:33 1994 Steve Chamberlain (sac@jonny.cygnus.com) * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit immediates. -start-sanitize-arc -Tue Dec 20 10:36:55 1994 Doug Evans - - * arc-dis.c (print_insn_arc): Branch offsets are relative to delay - slot. - * arc-opc.c (extract_reladdr): New function. - (insert_reladdr): Store address right-shifted by 2. -end-sanitize-arc - Tue Dec 20 11:25:12 1994 Ian Lance Taylor * mips-opc.c: Add dli as a synonym for li. -start-sanitize-arc -Mon Dec 19 12:35:51 1994 Doug Evans - - * arc-opc.c (insertion fns): Pass pointer to value's table entry. - All uses changed. - (extraction fns): Insn argument now array of two words. Return pointer - to value's table entry. All uses changed. - (arc_opcode_lookup_suffix): Exported for arc-dis.c. - (insert_multshift, extract_multshift): New fns. - (arc_operands): Add support for cache bypass suffix. Add support for - predefined aux regs. Modifier bits moved to flags field. - (arc_opcodes): Likewise. - Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed. - New insn rlc. Update to syntax in programmer's manual. - (arc_reg_names): Fix typo in lp_count. Add predefined aux regs. - (arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache - bypass. - (arc_opcode_init_tables): New argument to indicate cpu type. - (insert_reg): Handle predefined aux regs. - (extract_reg): Likewise. - (lookup_register): New fn. - * arc-dis.c (arc_condition_codes): Deleted. - (print_insn_arc): Handle insns with 32 bit immediate constants better. - Clean up modifier handling. Handle predefined aux regs. -end-sanitize-arc - Thu Dec 8 18:23:31 1994 Ken Raeburn * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and @@ -2428,14 +2954,6 @@ Thu Dec 8 18:23:31 1994 Ken Raeburn * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr control registers. -start-sanitize-arc -Tue Nov 29 18:02:43 1994 Doug Evans - - * configure.in: Add ARC support. - * disassemble.c: Likewise. - * arc-dis.c, arc-opc.c: New files. -end-sanitize-arc - Wed Nov 23 22:34:51 1994 Steve Chamberlain (sac@jonny.cygnus.com) * sh-opc.h (mov.l gbr): Get direction right.