X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=f66d5a48585ba11a06dacff2c9dfaecb35e8c4bc;hb=da5715e693f4a34ba06dd0625531fb788b8441a1;hp=bbbbdec6b4430da6e3b7521462e18975037ec963;hpb=d0fd63cb8f32736a008cf19b47c4704ee44362e6;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index bbbbdec6b4..f66d5a4858 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,9 +1,317 @@ +Fri Dec 12 01:32:30 1997 Richard Henderson + + * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid. + +Wed Dec 10 17:42:35 1997 Nick Clifton + + * arm-dis.c (print_insn_little_arm): Prevent examination of stored + symbol if none is present. + (print_insn_big_arm): Prevent examination of stored symbol if + none is present. + +Thu Oct 23 21:13:37 1997 Fred Fish + + * d10v-opc.c (d10v_opcodes): Correct entry for RTE. + +Mon Dec 8 11:21:07 1997 Nick Clifton + + * disassemble.c: Remove disasm_symaddr() function. + + * arm-dis.c: Use info->symbol instead of info->flags to determine + if disassmbly should be in Thumb or Arm mode. + +Tue Dec 2 09:54:27 1997 Nick Clifton + + * arm-dis.c: Add support for disassembling Thumb opcodes. + (print_insn_thumb): New function. + + * disassemble.c (disasm_symaddr): New function. + + * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly. + (thumb_opcodes): Table of Thumb opcodes. + +Mon Dec 1 12:25:57 1997 Andreas Schwab + + * m68k-opc.c (btst): Change Dd@s to Dd;b. + + * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q', + and 'v' as operand types. + +Mon Dec 1 11:56:50 1997 Ian Lance Taylor + + * m68k-opc.c: Add argument for lpstop. From Olivier Carmona + . + * m68k-dis.c (print_insn_m68k): Handle special case of lpstop, + which has a two word opcode with a one word argument. + +start-sanitize-d30v +Sun Nov 23 22:25:21 1997 Michael Meissner + + * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is + unsigned, not signed. + (d30v_format_table): Add SHORT_CMPU cases for cmpu. + +end-sanitize-d30v +start-sanitize-sh4 +Wed Nov 19 17:42:35 1997 Richard Henderson + + * sh-dis.c (print_insn_shx): Recognize all sh4 additions. + * sh-opc.h (fmov): Add @+, variant for sh4. + (ftrv): Slay the cut-and-paste monster. + +end-sanitize-sh4 +Tue Nov 18 23:10:03 1997 J"orn Rennecke + + * d10v-dis.c (print_operand): + Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG. + +Tue Nov 18 18:45:14 1997 J"orn Rennecke + + * d10v-opc.c (OPERAND_FLAG): Split into: + (OPERAND_FFLAG, OPERAND_CFLAG) . + (FSRC): Split into: + (FFSRC, CFSRC). + +Thu Nov 13 11:05:33 1997 Gavin Koch + + * mips-opc.c: Move the INSN_MACRO ISA value to the membership + field for all INSN_MACRO's. + * mips16-opc.c: same + +Wed Nov 12 10:16:57 1997 Gavin Koch + + * mips-opc.c (sync,cache): These are 3900 insns. + +Tue Nov 11 23:53:41 1997 J"orn Rennecke + + sh-opc.h (sh_table): Remove ftst/nan. + +start-sanitize-vr5400 +Mon Nov 3 13:23:15 1997 Ken Raeburn + + * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding. + (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version + last. + * mips-dis.c (print_insn_arg): Handle VR5400 operand types. + +end-sanitize-vr5400 +start-sanitize-tx49 +Wed Oct 29 15:10:56 1997 Gavin Koch + + * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp): + Add tx49 insns and configury. + +end-sanitize-tx49 +Tue Oct 28 17:59:32 1997 Ken Raeburn + + * mips-opc.c (ffc, ffs): Fix mask. + +start-sanitize-d30v +Tue Oct 28 16:34:54 1997 Michael Meissner + + * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m + control registers. + +end-sanitize-d30v +Mon Oct 27 22:34:03 1997 Ken Raeburn + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. +start-sanitize-vr5400 + Added VR5400 instructions. + (N5): New cpu-id macro. +end-sanitize-vr5400 + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Mon Oct 27 22:34:03 1997 Ken Raeburn + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Thu Oct 23 14:57:58 1997 Nick Clifton + + * v850-dis.c (disassemble): Replace // with /* ... */ + +Wed Oct 22 17:33:21 1997 Richard Henderson + + * sparc-opc.c: Add wr & rd for v9a asr's. + * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's. + (v9a_asr_reg_names): New variable. + Patch from David Miller . + +Wed Oct 22 17:18:02 1997 Richard Henderson + + * sparc-opc.c (v9notv9a): New insn type. + (IMPDEP): Move to the end to not conflict with edge8 et al. + Patch from David Miller . + +Fri Oct 17 13:18:53 1997 Gavin Koch + + * mips-opc.c (bnezl,beqzl): Mark these as also tx39. + +Thu Oct 16 11:55:20 1997 Gavin Koch + + * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1. + +Tue Oct 14 16:10:31 1997 Nick Clifton + + * v850-dis.c (disassemble): Use new symbol_at_address_func() field + of disassemble_info structure to determine if an overlay address + has a matching symbol in low memory. + + * dis-buf.c (generic_symbol_at_address): New (dummy) function for + new symbol_at_address_func field in disassemble_info structure. + +Fri Oct 10 16:44:52 1997 Nick Clifton + + * v850-opc.c (extract_d22): Use signed arithmatic. + +Tue Oct 7 23:40:43 1997 Gavin Koch + + * mips-opc.c: Three op mult is not an ISA insn. + +Tue Oct 7 23:37:21 1997 Gavin Koch + + * mips-opc.c: Fix formatting. + +Fri Oct 3 17:26:54 1997 Ian Lance Taylor + + * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather + than assuming that char is signed. Explicitly sign extend 16 bit + values, rather than assuming that short is 16 bits. + (OP_sI, OP_J, OP_DIR): Likewise. + +start-sanitize-v850e +Thu Oct 2 13:36:45 1997 Nick Clifton + + * v850-dis.c (v850_sreg_names): Use symbolic names for higher + system registers. + +end-sanitize-v850e +Wed Oct 1 16:58:54 1997 Nick Clifton + + * v850-opc.c: Fix typo in comment. + + * v850-dis.c (disassemble): Add test of processor type when + determining opcodes. + +Wed Oct 1 14:10:20 1997 Ian Lance Taylor + + * configure.in: Use a diversion to set enable_shared before the + arguments are parsed. + * configure: Rebuild. + +Thu Sep 25 13:04:59 1997 Ian Lance Taylor + + * m68k-opc.c (TBL1): Use ! rather than `. + * m68k-dis.c (print_insn_arg): Remove ` operand specifier. + +Wed Sep 24 11:29:35 1997 Ian Lance Taylor + + * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire. + + * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32. + + * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr + for mcf5200. + + * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL. + * aclocal.m4: Rebuild with new libtool. + * configure: Rebuild. + +start-sanitize-v850e +Fri Sep 19 11:45:49 1997 Andrew Cagney + + * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2. + +end-sanitize-v850e +Thu Sep 18 11:21:43 1997 Doug Evans + + * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr. + +Tue Sep 16 15:18:20 1997 Nick Clifton + + * v850-opc.c (v850_opcodes): Further rearrangements. + +start-sanitize-d30v +Tue Sep 16 16:12:11 1997 Ken Raeburn + + * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change. + +end-sanitize-d30v +Tue Sep 16 09:48:50 1997 Nick Clifton + + * v850-opc.c (v850_opcodes): Fields reordered to allow assembler + parser to work. + +Tue Sep 16 10:01:00 1997 Gavin Koch + + * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret. +start-sanitize-tx19 + * mips16-opc.c: Added mips16 sdbbp. +end-sanitize-tx19 + +Mon Sep 15 18:31:52 1997 Nick Clifton + + * v850-opc.c: Initialise processors field of v850_opcode structure. + +start-sanitize-d30v +Wed Aug 27 21:42:39 1997 Ken Raeburn + + Merge changes from Martin Hunt: + + * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values. + + * d30v-opc.c (pre_defined_registers): Add control registers from 0-63. + (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix + rot2h, sra2h, and srl2h to use new SHORT_A5S format. + + * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes. + + * d30v-dis.c (print_insn): First operand of d*i (delayed + branch) instructions is relative. + + * d30v-opc.c (d30v_opcode_table): Change form for repeati. + (d30v_operand_table): Add IMM6S3 type. + (d30v_format_table): Change SHORT_D2. Add LONG_Db. + + * d30v-dis.c: Fix bug with ".s" and ".l" extensions + and cmp instructions. + + * d30v-opc.c: Correct entries for repeat*, and sat*. + Make IMM5 unsigned. Create IMM6U and IMM12S3U operand + types. Correct several formats. + + * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc. + + * d30v-opc.c (pre_defined_registers): Change control registers. + + * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and + SHORT_C2. Manual was incorrect. + + * d30v-dis.c (lookup_opcode): Return value now indicates + if an opcode has a short and a long form. Used for deciding + to append a ".s" or ".l". + (print_insn): Append a ".s" to an instruction if it is + the short form and ".l" if it is a long form. Do not append + anything if the instruction has only one possible size. + + * d30v-opc.c: Change mulx2h to require an even register. + New form: SHORT_A2; a SHORT_A form that needs an even + register as the first operand. + + * d30v-dis.c (print_insn_d30v): Fix problem where the last + instruction was not being disassembled if there were an odd + number of instructions. + + * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms. + +end-sanitize-d30v start-sanitize-v850e Fri Sep 12 11:43:54 1997 Nick Clifton * v850-dis.c (disassemble): Improved display of register lists. -start-sanitize-v850e +end-sanitize-v850e Thu Sep 11 17:35:10 1997 Doug Evans * sparc-opc.c (sparc_opcodes): Fix assembler args to @@ -73,27 +381,23 @@ Tue Aug 19 10:59:59 1997 Richard Henderson * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage. +start-sanitize-v850e Mon Aug 18 11:10:03 1997 Nick Clifton * v850-opc.c (v850_opcodes[]): Remove use of flag field. -start-sanitize-v850eq * v850-opc.c (v850_opcodes[]): Add support for reversed short load opcodes.. -start-sanitize-v850eq -start-sanitize-v850e Mon Aug 18 11:08:25 1997 Nick Clifton * configure (cgen_files): Add support for v850e target. * configure.in (cgen_files): Add support for v850e target. -end-sanitize-v850e -start-sanitize-v850eq Mon Aug 18 11:08:25 1997 Nick Clifton * configure (cgen_files): Add support for v850eq target. * configure.in (cgen_files): Add support for v850eq target. -end-sanitize-v850eq +end-sanitize-v850e Fri Aug 15 05:17:48 1997 Doug Evans @@ -107,26 +411,19 @@ Fri Aug 15 05:17:48 1997 Doug Evans Wed Aug 13 18:52:11 1997 Nick Clifton -start-sanitize-v850eq - * .Sanitize (Do-first): Add support for keep-v850eq command line - option. - +start-sanitize-v850e * v850-dis.c (disassemble): Add support for v850EQ instructions. * v850-opc.c (insert_i5div, extract_i5div): New Functions. (v850_opcodes): Add v850EQ instructions. -end-sanitize-v850eq -start-sanitize-v850e - * .Sanitize (Do-first): Add support for keep-v850e command line - option. - + * v850-dis.c (disassemble): Add support for v850E instructions. * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16, extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9, insert_spe, extract_spe): New Functions. (v850_opcodes): Add v850E instructions. -start-sanitize-v850e +end-sanitize-v850e * v850-opc.c: Reorganised and re-layed out to improve readability and portability. @@ -171,7 +468,7 @@ Mon Jul 28 22:07:14 1997 Andrew Cagney * mips-opc.c: Fix coding of mtsa. -start-sanitize-r5900 +end-sanitize-r5900 Thu Jul 24 13:03:26 1997 Doug Evans * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns. @@ -205,7 +502,7 @@ Thu Jun 26 16:20:27 1997 Jeffrey A Law (law@cygnus.com) * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and "pexew" as synonyms for "pintoh", "pexoh", "pexow". -end-sanitize-5900 +end-sanitize-r5900 Wed Jun 25 15:25:57 1997 Felix Lee * ppc-opc.c (extract_nsi): make unsigned expression signed before @@ -1357,8 +1654,7 @@ Sat Aug 31 01:27:26 1996 Jeffrey A Law (law@cygnus.com) (v850_opcodes): Fix mask for jarl and jr. * v850-dis.c: New file. Skeleton for disassembler support. - * Makefile.in Remove v850 references, they're not needed here - and they weren't being sanitized away. + * Makefile.in Remove v850 references, they're not needed here. * configure.in: Add v850-dis.o when building v850 toolchains. * configure: Rebuilt. * disassemble.c (disassembler): Call v850 disassembler.