X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Farc-opc.c;h=27c2303fa13293d1843fe1f2394aca8954943460;hb=bab6aec1255ba2ec8de3ae0363958e2ff26ce25d;hp=58b26ea2c9ec536df5de932da81bc030501fba19;hpb=5a736821eff3aa4a8da237778526f9f700759c7a;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 58b26ea2c9..27c2303fa1 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -1,5 +1,5 @@ /* Opcode table for the ARC. - Copyright (C) 1994-2016 Free Software Foundation, Inc. + Copyright (C) 1994-2019 Free Software Foundation, Inc. Contributed by Claudiu Zissulescu (claziss@synopsys.com) @@ -30,18 +30,45 @@ instructions. All NPS400 features are built into all ARC target builds as this reduces the chances that regressions might creep in. */ +/* Insert RA register into a 32-bit opcode, with checks. */ + +static unsigned long long +insert_ra_chk (unsigned long long insn, + long long value, + const char ** errmsg) +{ + if (value == 60) + *errmsg = _("LP_COUNT register cannot be used as destination register"); + + return insn | (value & 0x3F); +} + /* Insert RB register into a 32-bit opcode. */ + static unsigned long long -insert_rb (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_rb (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { return insn | ((value & 0x07) << 24) | (((value >> 3) & 0x07) << 12); } -static long long int -extract_rb (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +/* Insert RB register with checks. */ + +static unsigned long long +insert_rb_chk (unsigned long long insn, + long long value, + const char ** errmsg) +{ + if (value == 60) + *errmsg = _("LP_COUNT register cannot be used as destination register"); + + return insn | ((value & 0x07) << 24) | (((value >> 3) & 0x07) << 12); +} + +static long long +extract_rb (unsigned long long insn, + bfd_boolean * invalid) { int value = (((insn >> 12) & 0x07) << 3) | ((insn >> 24) & 0x07); @@ -53,23 +80,25 @@ extract_rb (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_rad (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_rad (unsigned long long insn, + long long value, + const char ** errmsg) { if (value & 0x01) - *errmsg = _("Improper register value."); + *errmsg = _("cannot use odd number destination register"); + if (value == 60) + *errmsg = _("LP_COUNT register cannot be used as destination register"); return insn | (value & 0x3F); } static unsigned long long -insert_rcd (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_rcd (unsigned long long insn, + long long value, + const char ** errmsg) { if (value & 0x01) - *errmsg = _("Improper register value."); + *errmsg = _("cannot use odd number source register"); return insn | ((value & 0x3F) << 6); } @@ -77,9 +106,9 @@ insert_rcd (unsigned long long insn, /* Dummy insert ZERO operand function. */ static unsigned long long -insert_za (unsigned long long insn, - long long int value, - const char **errmsg) +insert_za (unsigned long long insn, + long long value, + const char ** errmsg) { if (value) *errmsg = _("operand is not zero"); @@ -90,9 +119,9 @@ insert_za (unsigned long long insn, when solving fixups. */ static unsigned long long -insert_Ybit (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_Ybit (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { if (value > 0) insn |= 0x08; @@ -104,9 +133,9 @@ insert_Ybit (unsigned long long insn, when solving fixups. */ static unsigned long long -insert_NYbit (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_NYbit (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { if (value < 0) insn |= 0x08; @@ -117,16 +146,16 @@ insert_NYbit (unsigned long long insn, /* Insert H register into a 16-bit opcode. */ static unsigned long long -insert_rhv1 (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_rhv1 (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { return insn |= ((value & 0x07) << 5) | ((value >> 3) & 0x07); } -static long long int -extract_rhv1 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_rhv1 (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = ((insn & 0x7) << 3) | ((insn >> 5) & 0x7); @@ -136,19 +165,20 @@ extract_rhv1 (unsigned long long insn ATTRIBUTE_UNUSED, /* Insert H register into a 16-bit opcode. */ static unsigned long long -insert_rhv2 (unsigned long long insn, - long long int value, - const char **errmsg) +insert_rhv2 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value == 0x1E) - *errmsg = - _("Register R30 is a limm indicator for this type of instruction."); + *errmsg = _("register R30 is a limm indicator"); + else if (value < 0 || value > 31) + *errmsg = _("register out of range"); return insn |= ((value & 0x07) << 5) | ((value >> 3) & 0x03); } -static long long int -extract_rhv2 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_rhv2 (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = ((insn >> 5) & 0x07) | ((insn & 0x03) << 3); @@ -156,16 +186,16 @@ extract_rhv2 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_r0 (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_r0 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 0) - *errmsg = _("Register must be R0."); + *errmsg = _("register must be R0"); return insn; } -static long long int +static long long extract_r0 (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -174,16 +204,16 @@ extract_r0 (unsigned long long insn ATTRIBUTE_UNUSED, static unsigned long long -insert_r1 (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_r1 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 1) - *errmsg = _("Register must be R1."); + *errmsg = _("register must be R1"); return insn; } -static long long int +static long long extract_r1 (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -191,16 +221,16 @@ extract_r1 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_r2 (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_r2 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 2) - *errmsg = _("Register must be R2."); + *errmsg = _("register must be R2"); return insn; } -static long long int +static long long extract_r2 (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -208,16 +238,16 @@ extract_r2 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_r3 (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_r3 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 3) - *errmsg = _("Register must be R3."); + *errmsg = _("register must be R3"); return insn; } -static long long int +static long long extract_r3 (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -225,16 +255,16 @@ extract_r3 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_sp (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_sp (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 28) - *errmsg = _("Register must be SP."); + *errmsg = _("register must be SP"); return insn; } -static long long int +static long long extract_sp (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -242,16 +272,16 @@ extract_sp (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_gp (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_gp (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 26) - *errmsg = _("Register must be GP."); + *errmsg = _("register must be GP"); return insn; } -static long long int +static long long extract_gp (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -259,16 +289,16 @@ extract_gp (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_pcl (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_pcl (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 63) - *errmsg = _("Register must be PCL."); + *errmsg = _("register must be PCL"); return insn; } -static long long int +static long long extract_pcl (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -276,16 +306,16 @@ extract_pcl (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_blink (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_blink (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 31) - *errmsg = _("Register must be BLINK."); + *errmsg = _("register must be BLINK"); return insn; } -static long long int +static long long extract_blink (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -293,16 +323,16 @@ extract_blink (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_ilink1 (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_ilink1 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 29) - *errmsg = _("Register must be ILINK1."); + *errmsg = _("register must be ILINK1"); return insn; } -static long long int +static long long extract_ilink1 (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -310,16 +340,16 @@ extract_ilink1 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_ilink2 (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_ilink2 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 30) - *errmsg = _("Register must be ILINK2."); + *errmsg = _("register must be ILINK2"); return insn; } -static long long int +static long long extract_ilink2 (unsigned long long insn ATTRIBUTE_UNUSED, bfd_boolean * invalid ATTRIBUTE_UNUSED) { @@ -327,9 +357,9 @@ extract_ilink2 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_ras (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_ras (unsigned long long insn, + long long value, + const char ** errmsg) { switch (value) { @@ -346,17 +376,18 @@ insert_ras (unsigned long long insn, insn |= (value - 8); break; default: - *errmsg = _("Register must be either r0-r3 or r12-r15."); + *errmsg = _("register must be either r0-r3 or r12-r15"); break; } return insn; } -static long long int -extract_ras (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_ras (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = insn & 0x07; + if (value > 3) return (value + 8); else @@ -364,9 +395,9 @@ extract_ras (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_rbs (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_rbs (unsigned long long insn, + long long value, + const char ** errmsg) { switch (value) { @@ -383,17 +414,18 @@ insert_rbs (unsigned long long insn, insn |= ((value - 8)) << 8; break; default: - *errmsg = _("Register must be either r0-r3 or r12-r15."); + *errmsg = _("register must be either r0-r3 or r12-r15"); break; } return insn; } -static long long int -extract_rbs (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_rbs (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = (insn >> 8) & 0x07; + if (value > 3) return (value + 8); else @@ -401,9 +433,9 @@ extract_rbs (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_rcs (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_rcs (unsigned long long insn, + long long value, + const char ** errmsg) { switch (value) { @@ -420,17 +452,18 @@ insert_rcs (unsigned long long insn, insn |= ((value - 8)) << 5; break; default: - *errmsg = _("Register must be either r0-r3 or r12-r15."); + *errmsg = _("register must be either r0-r3 or r12-r15"); break; } return insn; } -static long long int -extract_rcs (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_rcs (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = (insn >> 5) & 0x07; + if (value > 3) return (value + 8); else @@ -438,9 +471,9 @@ extract_rcs (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_simm3s (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_simm3s (unsigned long long insn, + long long value, + const char ** errmsg) { int tmp = 0; switch (value) @@ -470,7 +503,7 @@ insert_simm3s (unsigned long long insn, tmp = 0x06; break; default: - *errmsg = _("Accepted values are from -1 to 6."); + *errmsg = _("accepted values are from -1 to 6"); break; } @@ -478,11 +511,12 @@ insert_simm3s (unsigned long long insn, return insn; } -static long long int -extract_simm3s (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_simm3s (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = (insn >> 8) & 0x07; + if (value == 7) return -1; else @@ -490,41 +524,52 @@ extract_simm3s (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_rrange (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_rrange (unsigned long long insn, + long long value, + const char ** errmsg) { int reg1 = (value >> 16) & 0xFFFF; int reg2 = value & 0xFFFF; + if (reg1 != 13) - { - *errmsg = _("First register of the range should be r13."); - return insn; - } - if (reg2 < 13 || reg2 > 26) - { - *errmsg = _("Last register of the range doesn't fit."); - return insn; - } - insn |= ((reg2 - 12) & 0x0F) << 1; + *errmsg = _("first register of the range should be r13"); + else if (reg2 < 13 || reg2 > 26) + *errmsg = _("last register of the range doesn't fit"); + else + insn |= ((reg2 - 12) & 0x0F) << 1; return insn; } -static long long int -extract_rrange (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_rrange (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (insn >> 1) & 0x0F; } static unsigned long long -insert_fpel (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_r13el (unsigned long long insn, + long long int value, + const char **errmsg) +{ + if (value != 13) + { + *errmsg = _("invalid register number, should be fp"); + return insn; + } + + insn |= 0x02; + return insn; +} + +static unsigned long long +insert_fpel (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 27) { - *errmsg = _("Invalid register number, should be fp."); + *errmsg = _("invalid register number, should be fp"); return insn; } @@ -532,21 +577,21 @@ insert_fpel (unsigned long long insn, return insn; } -static long long int -extract_fpel (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_fpel (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (insn & 0x0100) ? 27 : -1; } static unsigned long long -insert_blinkel (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_blinkel (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 31) { - *errmsg = _("Invalid register number, should be blink."); + *errmsg = _("invalid register number, should be blink"); return insn; } @@ -554,21 +599,21 @@ insert_blinkel (unsigned long long insn, return insn; } -static long long int -extract_blinkel (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_blinkel (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (insn & 0x0200) ? 31 : -1; } static unsigned long long -insert_pclel (unsigned long long insn, - long long int value, - const char **errmsg ATTRIBUTE_UNUSED) +insert_pclel (unsigned long long insn, + long long value, + const char ** errmsg) { if (value != 63) { - *errmsg = _("Invalid register number, should be pcl."); + *errmsg = _("invalid register number, should be pcl"); return insn; } @@ -576,20 +621,22 @@ insert_pclel (unsigned long long insn, return insn; } -static long long int -extract_pclel (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_pclel (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (insn & 0x0400) ? 63 : -1; } #define INSERT_W6 + /* mask = 00000000000000000000111111000000 insn = 00011bbb000000000BBBwwwwwwDaaZZ1. */ + static unsigned long long -insert_w6 (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_w6 (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { insn |= ((value >> 0) & 0x003f) << 6; @@ -597,25 +644,33 @@ insert_w6 (unsigned long long insn ATTRIBUTE_UNUSED, } #define EXTRACT_W6 + /* mask = 00000000000000000000111111000000. */ -static long long int -extract_w6 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) + +static long long +extract_w6 (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { - unsigned value = 0; + int value = 0; value |= ((insn >> 6) & 0x003f) << 0; + /* Extend the sign. */ + int signbit = 1 << 5; + value = (value ^ signbit) - signbit; + return value; } #define INSERT_G_S + /* mask = 0000011100022000 insn = 01000ggghhhGG0HH. */ + static unsigned long long -insert_g_s (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_g_s (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { insn |= ((value >> 0) & 0x0007) << 8; insn |= ((value >> 3) & 0x0003) << 3; @@ -624,18 +679,20 @@ insert_g_s (unsigned long long insn ATTRIBUTE_UNUSED, } #define EXTRACT_G_S + /* mask = 0000011100022000. */ -static long long int -extract_g_s (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) + +static long long +extract_g_s (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = 0; + int signbit = 1 << (6 - 1); value |= ((insn >> 8) & 0x0007) << 0; value |= ((insn >> 3) & 0x0003) << 3; /* Extend the sign. */ - int signbit = 1 << (6 - 1); value = (value ^ signbit) - signbit; return value; @@ -645,9 +702,9 @@ extract_g_s (unsigned long long insn ATTRIBUTE_UNUSED, #define MAKE_3BIT_REG_INSERT_EXTRACT_FUNCS(NAME,OFFSET) \ static unsigned long long \ insert_nps_3bit_reg_at_##OFFSET##_##NAME \ - (unsigned long long insn ATTRIBUTE_UNUSED, \ - long long int value ATTRIBUTE_UNUSED, \ - const char **errmsg ATTRIBUTE_UNUSED) \ + (unsigned long long insn, \ + long long value, \ + const char ** errmsg) \ { \ switch (value) \ { \ @@ -664,16 +721,16 @@ insert_nps_3bit_reg_at_##OFFSET##_##NAME \ insn |= (value - 8) << (OFFSET); \ break; \ default: \ - *errmsg = _("Register must be either r0-r3 or r12-r15."); \ + *errmsg = _("register must be either r0-r3 or r12-r15"); \ break; \ } \ return insn; \ } \ \ -static long long int \ +static long long \ extract_nps_3bit_reg_at_##OFFSET##_##NAME \ - (unsigned long long insn ATTRIBUTE_UNUSED, \ - bfd_boolean * invalid ATTRIBUTE_UNUSED) \ + (unsigned long long insn, \ + bfd_boolean * invalid ATTRIBUTE_UNUSED) \ { \ int value = (insn >> (OFFSET)) & 0x07; \ if (value > 3) \ @@ -692,9 +749,9 @@ MAKE_3BIT_REG_INSERT_EXTRACT_FUNCS(src2,37) MAKE_3BIT_REG_INSERT_EXTRACT_FUNCS(src2,53) static unsigned long long -insert_nps_bitop_size_2b (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_bitop_size_2b (unsigned long long insn, + long long value, + const char ** errmsg) { switch (value) { @@ -712,7 +769,7 @@ insert_nps_bitop_size_2b (unsigned long long insn ATTRIBUTE_UNUSED, break; default: value = 0; - *errmsg = _("Invalid size, should be 1, 2, 4, or 8."); + *errmsg = _("invalid size, should be 1, 2, 4, or 8"); break; } @@ -720,34 +777,34 @@ insert_nps_bitop_size_2b (unsigned long long insn ATTRIBUTE_UNUSED, return insn; } -static long long int -extract_nps_bitop_size_2b (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_bitop_size_2b (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return 1 << ((insn >> 10) & 0x3); } static unsigned long long -insert_nps_bitop_uimm8 (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_bitop_uimm8 (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { insn |= ((value >> 5) & 7) << 12; insn |= (value & 0x1f); return insn; } -static long long int -extract_nps_bitop_uimm8 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_bitop_uimm8 (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (((insn >> 12) & 0x7) << 5) | (insn & 0x1f); } static unsigned long long -insert_nps_rflt_uimm6 (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_rflt_uimm6 (unsigned long long insn, + long long value, + const char ** errmsg) { switch (value) { @@ -765,53 +822,141 @@ insert_nps_rflt_uimm6 (unsigned long long insn ATTRIBUTE_UNUSED, return insn; } -static long long int -extract_nps_rflt_uimm6 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_rflt_uimm6 (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (insn >> 6) & 0x3f; } static unsigned long long -insert_nps_dst_pos_and_size (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_dst_pos_and_size (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { insn |= ((value & 0x1f) | (((32 - value - 1) & 0x1f) << 10)); return insn; } -static long long int -extract_nps_dst_pos_and_size (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_dst_pos_and_size (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (insn & 0x1f); } static unsigned long long -insert_nps_cmem_uimm16 (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_cmem_uimm16 (unsigned long long insn, + long long value, + const char ** errmsg) { int top = (value >> 16) & 0xffff; + if (top != 0x0 && top != NPS_CMEM_HIGH_VALUE) *errmsg = _("invalid value for CMEM ld/st immediate"); insn |= (value & 0xffff); return insn; } -static long long int -extract_nps_cmem_uimm16 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_cmem_uimm16 (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return (NPS_CMEM_HIGH_VALUE << 16) | (insn & 0xffff); } -#define MAKE_SRC_POS_INSERT_EXTRACT_FUNCS(NAME,SHIFT) \ -static unsigned long long \ -insert_nps_##NAME##_pos (unsigned long long insn ATTRIBUTE_UNUSED, \ - long long int value ATTRIBUTE_UNUSED, \ - const char **errmsg ATTRIBUTE_UNUSED) \ +static unsigned long long +insert_nps_imm_offset (unsigned long long insn, + long long value, + const char ** errmsg) +{ + switch (value) + { + case 0: + case 16: + case 32: + case 48: + case 64: + value = value >> 4; + break; + default: + *errmsg = _("invalid position, should be 0, 16, 32, 48 or 64."); + value = 0; + } + insn |= (value << 10); + return insn; +} + +static long long +extract_nps_imm_offset (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) +{ + return ((insn >> 10) & 0x7) * 16; +} + +static unsigned long long +insert_nps_imm_entry (unsigned long long insn, + long long value, + const char ** errmsg) +{ + switch (value) + { + case 16: + value = 0; + break; + case 32: + value = 1; + break; + case 64: + value = 2; + break; + case 128: + value = 3; + break; + default: + *errmsg = _("invalid position, should be 16, 32, 64 or 128."); + value = 0; + } + insn |= (value << 2); + return insn; +} + +static long long +extract_nps_imm_entry (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) +{ + int imm_entry = ((insn >> 2) & 0x7); + return (1 << (imm_entry + 4)); +} + +static unsigned long long +insert_nps_size_16bit (unsigned long long insn, + long long value, + const char ** errmsg) +{ + if ((value < 1) || (value > 64)) + { + *errmsg = _("invalid size value must be on range 1-64."); + value = 0; + } + value = value & 0x3f; + insn |= (value << 6); + return insn; +} + +static long long +extract_nps_size_16bit (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) +{ + return ((insn & 0xfc0) >> 6) ? ((insn & 0xfc0) >> 6) : 64; +} + + +#define MAKE_SRC_POS_INSERT_EXTRACT_FUNCS(NAME,SHIFT) \ +static unsigned long long \ +insert_nps_##NAME##_pos (unsigned long long insn, \ + long long value, \ + const char ** errmsg) \ { \ switch (value) \ { \ @@ -822,32 +967,32 @@ insert_nps_##NAME##_pos (unsigned long long insn ATTRIBUTE_UNUSED, \ value = value / 8; \ break; \ default: \ - *errmsg = _("Invalid position, should be 0, 8, 16, or 24."); \ + *errmsg = _("invalid position, should be 0, 8, 16, or 24"); \ value = 0; \ } \ - insn |= (value << SHIFT); \ + insn |= (value << SHIFT); \ return insn; \ } \ \ -static long long int \ -extract_nps_##NAME##_pos (unsigned long long insn ATTRIBUTE_UNUSED, \ - bfd_boolean * invalid ATTRIBUTE_UNUSED) \ -{ \ - return ((insn >> SHIFT) & 0x3) * 8; \ +static long long \ +extract_nps_##NAME##_pos (unsigned long long insn, \ + bfd_boolean * invalid ATTRIBUTE_UNUSED) \ +{ \ + return ((insn >> SHIFT) & 0x3) * 8; \ } MAKE_SRC_POS_INSERT_EXTRACT_FUNCS (src2, 12) MAKE_SRC_POS_INSERT_EXTRACT_FUNCS (src1, 10) -#define MAKE_BIAS_INSERT_EXTRACT_FUNCS(NAME,LOWER,UPPER,BITS,BIAS,SHIFT)\ -static unsigned long long \ -insert_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, \ - long long int value ATTRIBUTE_UNUSED, \ - const char **errmsg ATTRIBUTE_UNUSED) \ +#define MAKE_BIAS_INSERT_EXTRACT_FUNCS(NAME,LOWER,UPPER,BITS,BIAS,SHIFT) \ +static unsigned long long \ +insert_nps_##NAME (unsigned long long insn, \ + long long value, \ + const char ** errmsg) \ { \ if (value < LOWER || value > UPPER) \ { \ - *errmsg = _("Invalid size, value must be " \ + *errmsg = _("invalid size, value must be " \ #LOWER " to " #UPPER "."); \ return insn; \ } \ @@ -856,9 +1001,9 @@ insert_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, return insn; \ } \ \ -static long long int \ -extract_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, \ - bfd_boolean * invalid ATTRIBUTE_UNUSED) \ +static long long \ +extract_nps_##NAME (unsigned long long insn, \ + bfd_boolean * invalid ATTRIBUTE_UNUSED) \ { \ return ((insn >> SHIFT) & ((1 << BITS) - 1)) + BIAS; \ } @@ -875,9 +1020,9 @@ MAKE_BIAS_INSERT_EXTRACT_FUNCS (hash_width,1,32,5,1,6) MAKE_BIAS_INSERT_EXTRACT_FUNCS (hash_len,1,8,3,1,2) MAKE_BIAS_INSERT_EXTRACT_FUNCS (index3,4,7,2,4,0) -static long long int -extract_nps_qcmp_m3 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_qcmp_m3 (unsigned long long insn, + bfd_boolean * invalid) { int m3 = (insn >> 5) & 0xf; if (m3 == 0xf) @@ -885,9 +1030,9 @@ extract_nps_qcmp_m3 (unsigned long long insn ATTRIBUTE_UNUSED, return m3; } -static long long int -extract_nps_qcmp_m2 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_qcmp_m2 (unsigned long long insn, + bfd_boolean * invalid) { bfd_boolean tmp_invalid = FALSE; int m2 = (insn >> 15) & 0x1; @@ -898,9 +1043,9 @@ extract_nps_qcmp_m2 (unsigned long long insn ATTRIBUTE_UNUSED, return m2; } -static long long int -extract_nps_qcmp_m1 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_qcmp_m1 (unsigned long long insn, + bfd_boolean * invalid) { bfd_boolean tmp_invalid = FALSE; int m1 = (insn >> 14) & 0x1; @@ -913,9 +1058,9 @@ extract_nps_qcmp_m1 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_nps_calc_entry_size (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_calc_entry_size (unsigned long long insn, + long long value, + const char ** errmsg) { unsigned pwr; @@ -937,40 +1082,40 @@ insert_nps_calc_entry_size (unsigned long long insn ATTRIBUTE_UNUSED, return insn | (pwr << 8); } -static long long int -extract_nps_calc_entry_size (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_calc_entry_size (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { unsigned entry_size = (insn >> 8) & 0xf; return 1 << entry_size; } static unsigned long long -insert_nps_bitop_mod4 (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_bitop_mod4 (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { return insn | ((value & 0x2) << 30) | ((value & 0x1) << 47); } -static long long int -extract_nps_bitop_mod4 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_bitop_mod4 (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { return ((insn >> 30) & 0x2) | ((insn >> 47) & 0x1); } static unsigned long long -insert_nps_bitop_dst_pos3_pos4 (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_bitop_dst_pos3_pos4 (unsigned long long insn, + long long value, + const char ** errmsg ATTRIBUTE_UNUSED) { return insn | (value << 42) | (value << 37); } -static long long int -extract_nps_bitop_dst_pos3_pos4 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_bitop_dst_pos3_pos4 (unsigned long long insn, + bfd_boolean * invalid) { if (((insn >> 42) & 0x1f) != ((insn >> 37) & 0x1f)) *invalid = TRUE; @@ -978,41 +1123,42 @@ extract_nps_bitop_dst_pos3_pos4 (unsigned long long insn ATTRIBUTE_UNUSED, } static unsigned long long -insert_nps_bitop_ins_ext (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_bitop_ins_ext (unsigned long long insn, + long long value, + const char ** errmsg) { if (value < 0 || value > 28) - *errmsg = _("Value must be in the range 0 to 28"); + *errmsg = _("value must be in the range 0 to 28"); return insn | (value << 20); } -static long long int -extract_nps_bitop_ins_ext (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_bitop_ins_ext (unsigned long long insn, + bfd_boolean * invalid) { int value = (insn >> 20) & 0x1f; + if (value > 28) *invalid = TRUE; return value; } #define MAKE_1BASED_INSERT_EXTRACT_FUNCS(NAME,SHIFT,UPPER,BITS) \ -static unsigned long long \ -insert_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, \ - long long int value ATTRIBUTE_UNUSED, \ - const char **errmsg ATTRIBUTE_UNUSED) \ +static unsigned long long \ +insert_nps_##NAME (unsigned long long insn, \ + long long value, \ + const char ** errmsg) \ { \ if (value < 1 || value > UPPER) \ - *errmsg = _("Value must be in the range 1 to " #UPPER); \ + *errmsg = _("value must be in the range 1 to " #UPPER); \ if (value == UPPER) \ value = 0; \ return insn | (value << SHIFT); \ } \ \ -static long long int \ -extract_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, \ - bfd_boolean * invalid ATTRIBUTE_UNUSED) \ +static long long \ +extract_nps_##NAME (unsigned long long insn, \ + bfd_boolean * invalid ATTRIBUTE_UNUSED) \ { \ int value = (insn >> SHIFT) & ((1 << BITS) - 1); \ if (value == 0) \ @@ -1029,40 +1175,40 @@ MAKE_1BASED_INSERT_EXTRACT_FUNCS (pmu_num_job, 6, 4, 2) MAKE_1BASED_INSERT_EXTRACT_FUNCS (proto_size, 16, 64, 6) static unsigned long long -insert_nps_min_hofs (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_min_hofs (unsigned long long insn, + long long value, + const char ** errmsg) { if (value < 0 || value > 240) - *errmsg = _("Value must be in the range 0 to 240"); + *errmsg = _("value must be in the range 0 to 240"); if ((value % 16) != 0) - *errmsg = _("Value must be a multiple of 16"); + *errmsg = _("value must be a multiple of 16"); value = value / 16; return insn | (value << 6); } -static long long int -extract_nps_min_hofs (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_min_hofs (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) { int value = (insn >> 6) & 0xF; return value * 16; } -#define MAKE_INSERT_NPS_ADDRTYPE(NAME,VALUE) \ +#define MAKE_INSERT_NPS_ADDRTYPE(NAME, VALUE) \ static unsigned long long \ -insert_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, \ - long long int value ATTRIBUTE_UNUSED, \ - const char **errmsg ATTRIBUTE_UNUSED) \ +insert_nps_##NAME (unsigned long long insn, \ + long long value, \ + const char ** errmsg) \ { \ if (value != ARC_NPS400_ADDRTYPE_##VALUE) \ - *errmsg = _("Invalid address type for operand"); \ + *errmsg = _("invalid address type for operand"); \ return insn; \ } \ \ -static long long int \ -extract_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, \ - bfd_boolean * invalid ATTRIBUTE_UNUSED) \ +static long long \ +extract_nps_##NAME (unsigned long long insn ATTRIBUTE_UNUSED, \ + bfd_boolean * invalid ATTRIBUTE_UNUSED) \ { \ return ARC_NPS400_ADDRTYPE_##VALUE; \ } @@ -1085,19 +1231,19 @@ MAKE_INSERT_NPS_ADDRTYPE (cxa, CXA) MAKE_INSERT_NPS_ADDRTYPE (cxd, CXD) static unsigned long long -insert_nps_rbdouble_64 (unsigned long long insn ATTRIBUTE_UNUSED, - long long int value ATTRIBUTE_UNUSED, - const char **errmsg ATTRIBUTE_UNUSED) +insert_nps_rbdouble_64 (unsigned long long insn, + long long value, + const char ** errmsg) { if (value < 0 || value > 31) - *errmsg = _("Value must be in the range 0 to 31"); + *errmsg = _("value must be in the range 0 to 31"); return insn | (value << 43) | (value << 48); } -static long long int -extract_nps_rbdouble_64 (unsigned long long insn ATTRIBUTE_UNUSED, - bfd_boolean * invalid ATTRIBUTE_UNUSED) +static long long +extract_nps_rbdouble_64 (unsigned long long insn, + bfd_boolean * invalid) { int value1 = (insn >> 43) & 0x1F; int value2 = (insn >> 48) & 0x1F; @@ -1108,6 +1254,39 @@ extract_nps_rbdouble_64 (unsigned long long insn ATTRIBUTE_UNUSED, return value1; } +static unsigned long long +insert_nps_misc_imm_offset (unsigned long long insn, + long long value, + const char ** errmsg) +{ + if (value & 0x3) + { + *errmsg = _("invalid position, should be one of: 0,4,8,...124."); + value = 0; + } + insn |= (value << 6); + return insn; +} + +static long long int +extract_nps_misc_imm_offset (unsigned long long insn, + bfd_boolean * invalid ATTRIBUTE_UNUSED) +{ + return ((insn >> 8) & 0x1f) * 4; +} + +static long long int +extract_uimm12_20 (unsigned long long insn ATTRIBUTE_UNUSED, + bfd_boolean * invalid ATTRIBUTE_UNUSED) +{ + int value = 0; + + value |= ((insn >> 6) & 0x003f) << 0; + value |= ((insn >> 0) & 0x003f) << 6; + + return value; +} + /* Include the generic extract/insert functions. Order is important as some of the functions present in the .h may be disabled via defines. */ @@ -1175,9 +1354,15 @@ const struct arc_flag_operand arc_flag_operands[] = { "ls", 14, 5, 0, 1 }, #define F_PNZ (F_LS + 1) { "pnz", 15, 5, 0, 1 }, +#define F_NJ (F_PNZ + 1) + { "nj", 21, 5, 0, 1 }, +#define F_NM (F_NJ + 1) + { "nm", 23, 5, 0, 1 }, +#define F_NO_T (F_NM + 1) + { "nt", 24, 5, 0, 1 }, /* FLAG. */ -#define F_FLAG (F_PNZ + 1) +#define F_FLAG (F_NO_T + 1) { "f", 1, 1, 15, 1 }, #define F_FFAKE (F_FLAG + 1) { "f", 0, 0, 0, 1 }, @@ -1249,7 +1434,9 @@ const struct arc_flag_operand arc_flag_operands[] = { "di", 1, 1, 5, 1 }, #define F_DI11 (F_DI5 + 1) { "di", 1, 1, 11, 1 }, -#define F_DI15 (F_DI11 + 1) +#define F_DI14 (F_DI11 + 1) + { "di", 1, 1, 14, 1 }, +#define F_DI15 (F_DI14 + 1) { "di", 1, 1, 15, 1 }, /* ARCv2 specific. */ @@ -1263,16 +1450,27 @@ const struct arc_flag_operand arc_flag_operands[] = { "h", 2, 2, 7, 1 }, #define F_H17 (F_H7 + 1) { "h", 2, 2, 17, 1 }, +#define F_SIZED (F_H17 + 1) + { "dd", 8, 0, 0, 0 }, /* Fake. */ /* Fake Flags. */ -#define F_NE (F_H17 + 1) +#define F_NE (F_SIZED + 1) { "ne", 0, 0, 0, 1 }, /* ARC NPS400 Support: See comment near head of file. */ #define F_NPS_CL (F_NE + 1) { "cl", 0, 0, 0, 1 }, -#define F_NPS_FLAG (F_NPS_CL + 1) +#define F_NPS_NA (F_NPS_CL + 1) + { "na", 1, 1, 9, 1 }, + +#define F_NPS_SR (F_NPS_NA + 1) + { "s", 1, 1, 13, 1 }, + +#define F_NPS_M (F_NPS_SR + 1) + { "m", 1, 1, 7, 1 }, + +#define F_NPS_FLAG (F_NPS_M + 1) { "f", 1, 1, 20, 1 }, #define F_NPS_R (F_NPS_FLAG + 1) @@ -1358,6 +1556,21 @@ const struct arc_flag_operand arc_flag_operands[] = #define F_NPS_LDBIT_X4_2 (F_NPS_LDBIT_X4_1 + 1) { "x4", 2, 2, 22, 1 }, + +#define F_NPS_CORE (F_NPS_LDBIT_X4_2 + 1) + { "core", 1, 3, 6, 1 }, + +#define F_NPS_CLSR (F_NPS_CORE + 1) + { "clsr", 2, 3, 6, 1 }, + +#define F_NPS_ALL (F_NPS_CLSR + 1) + { "all", 3, 3, 6, 1 }, + +#define F_NPS_GIC (F_NPS_ALL + 1) + { "gic", 4, 3, 6, 1 }, + +#define F_NPS_RSPI_GIC (F_NPS_GIC + 1) + { "gic", 5, 3, 6, 1 }, }; const unsigned arc_num_flag_operands = ARRAY_SIZE (arc_flag_operands); @@ -1371,24 +1584,69 @@ const struct arc_flag_class arc_flag_classes[] = #define C_EMPTY 0 { F_CLASS_NONE, { F_NULL } }, -#define C_CC (C_EMPTY + 1) +#define C_CC_EQ (C_EMPTY + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_EQUAL, F_NULL} }, + +#define C_CC_GE (C_CC_EQ + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_GE, F_NULL} }, + +#define C_CC_GT (C_CC_GE + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_GT, F_NULL} }, + +#define C_CC_HI (C_CC_GT + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_HI, F_NULL} }, + +#define C_CC_HS (C_CC_HI + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_NOTCARRY, F_NULL} }, + +#define C_CC_LE (C_CC_HS + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_LE, F_NULL} }, + +#define C_CC_LO (C_CC_LE + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_CARRY, F_NULL} }, + +#define C_CC_LS (C_CC_LO + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_LS, F_NULL} }, + +#define C_CC_LT (C_CC_LS + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_LT, F_NULL} }, + +#define C_CC_NE (C_CC_LT + 1) + {F_CLASS_IMPLICIT | F_CLASS_COND, {F_NOTEQUAL, F_NULL} }, + +#define C_AA_AB (C_CC_NE + 1) + {F_CLASS_IMPLICIT | F_CLASS_WB, {F_AB3, F_NULL} }, + +#define C_AA_AW (C_AA_AB + 1) + {F_CLASS_IMPLICIT | F_CLASS_WB, {F_AW3, F_NULL} }, + +#define C_ZZ_D (C_AA_AW + 1) + {F_CLASS_IMPLICIT | F_CLASS_ZZ, {F_SIZED, F_NULL} }, + +#define C_ZZ_H (C_ZZ_D + 1) + {F_CLASS_IMPLICIT | F_CLASS_ZZ, {F_H1, F_NULL} }, + +#define C_ZZ_B (C_ZZ_H + 1) + {F_CLASS_IMPLICIT | F_CLASS_ZZ, {F_SIZEB1, F_NULL} }, + +#define C_CC (C_ZZ_B + 1) { F_CLASS_OPTIONAL | F_CLASS_EXTEND | F_CLASS_COND, { F_ALWAYS, F_RA, F_EQUAL, F_ZERO, F_NOTEQUAL, F_NOTZERO, F_POZITIVE, F_PL, F_NEGATIVE, F_MINUS, F_CARRY, F_CARRYSET, F_LOWER, F_CARRYCLR, F_NOTCARRY, F_HIGHER, F_OVERFLOWSET, F_OVERFLOW, F_NOTOVERFLOW, F_OVERFLOWCLR, F_GT, F_GE, F_LT, - F_LE, F_HI, F_LS, F_PNZ, F_NULL } }, + F_LE, F_HI, F_LS, F_PNZ, F_NJ, F_NM, F_NO_T, F_NULL } }, #define C_AA_ADDR3 (C_CC + 1) #define C_AA27 (C_CC + 1) - { F_CLASS_OPTIONAL, { F_A3, F_AW3, F_AB3, F_AS3, F_NULL } }, + { F_CLASS_OPTIONAL | F_CLASS_WB, { F_A3, F_AW3, F_AB3, F_AS3, F_NULL } }, #define C_AA_ADDR9 (C_AA_ADDR3 + 1) #define C_AA21 (C_AA_ADDR3 + 1) - { F_CLASS_OPTIONAL, { F_A9, F_AW9, F_AB9, F_AS9, F_NULL } }, + { F_CLASS_OPTIONAL | F_CLASS_WB, { F_A9, F_AW9, F_AB9, F_AS9, F_NULL } }, #define C_AA_ADDR22 (C_AA_ADDR9 + 1) #define C_AA8 (C_AA_ADDR9 + 1) - { F_CLASS_OPTIONAL, { F_A22, F_AW22, F_AB22, F_AS22, F_NULL } }, + { F_CLASS_OPTIONAL | F_CLASS_WB, { F_A22, F_AW22, F_AB22, F_AS22, F_NULL } }, #define C_F (C_AA_ADDR22 + 1) { F_CLASS_OPTIONAL, { F_FLAG, F_NULL } }, @@ -1407,7 +1665,9 @@ const struct arc_flag_class arc_flag_classes[] = #define C_DI20 (C_DHARD + 1) { F_CLASS_OPTIONAL, { F_DI11, F_NULL }}, -#define C_DI16 (C_DI20 + 1) +#define C_DI14 (C_DI20 + 1) + { F_CLASS_OPTIONAL, { F_DI14, F_NULL }}, +#define C_DI16 (C_DI14 + 1) { F_CLASS_OPTIONAL, { F_DI15, F_NULL }}, #define C_DI26 (C_DI16 + 1) { F_CLASS_OPTIONAL, { F_DI5, F_NULL }}, @@ -1437,7 +1697,16 @@ const struct arc_flag_class arc_flag_classes[] = #define C_NPS_CL (C_NE + 1) { F_CLASS_REQUIRED, { F_NPS_CL, F_NULL}}, -#define C_NPS_F (C_NPS_CL + 1) +#define C_NPS_NA (C_NPS_CL + 1) + { F_CLASS_OPTIONAL, { F_NPS_NA, F_NULL}}, + +#define C_NPS_SR (C_NPS_NA + 1) + { F_CLASS_OPTIONAL, { F_NPS_SR, F_NULL}}, + +#define C_NPS_M (C_NPS_SR + 1) + { F_CLASS_OPTIONAL, { F_NPS_M, F_NULL}}, + +#define C_NPS_F (C_NPS_M + 1) { F_CLASS_OPTIONAL, { F_NPS_FLAG, F_NULL}}, #define C_NPS_R (C_NPS_F + 1) @@ -1499,6 +1768,21 @@ const struct arc_flag_class arc_flag_classes[] = #define C_NPS_LDBIT_X_2 (C_NPS_LDBIT_X_1 + 1) { F_CLASS_OPTIONAL, { F_NPS_LDBIT_X2_2, F_NPS_LDBIT_X4_2, F_NULL }}, + +#define C_NPS_CORE (C_NPS_LDBIT_X_2 + 1) + { F_CLASS_REQUIRED, { F_NPS_CORE, F_NULL}}, + +#define C_NPS_CLSR (C_NPS_CORE + 1) + { F_CLASS_REQUIRED, { F_NPS_CLSR, F_NULL}}, + +#define C_NPS_ALL (C_NPS_CLSR + 1) + { F_CLASS_REQUIRED, { F_NPS_ALL, F_NULL}}, + +#define C_NPS_GIC (C_NPS_ALL + 1) + { F_CLASS_REQUIRED, { F_NPS_GIC, F_NULL}}, + +#define C_NPS_RSPI_GIC (C_NPS_GIC + 1) + { F_CLASS_REQUIRED, { F_NPS_RSPI_GIC, F_NULL}}, }; const unsigned char flags_none[] = { 0 }; @@ -1525,16 +1809,22 @@ const struct arc_operand arc_operands[] = instructions. */ #define RA (IGNORED + 1) { 6, 0, 0, ARC_OPERAND_IR, 0, 0 }, -#define RB (RA + 1) +#define RA_CHK (RA + 1) + { 6, 0, 0, ARC_OPERAND_IR, insert_ra_chk, 0 }, +#define RB (RA_CHK + 1) { 6, 12, 0, ARC_OPERAND_IR, insert_rb, extract_rb }, -#define RC (RB + 1) +#define RB_CHK (RB + 1) + { 6, 12, 0, ARC_OPERAND_IR, insert_rb_chk, extract_rb }, +#define RC (RB_CHK + 1) { 6, 6, 0, ARC_OPERAND_IR, 0, 0 }, #define RBdup (RC + 1) { 6, 12, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE, insert_rb, extract_rb }, #define RAD (RBdup + 1) { 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 }, -#define RCD (RAD + 1) +#define RAD_CHK (RAD + 1) + { 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 }, +#define RCD (RAD_CHK + 1) { 6, 6, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rcd, 0 }, /* The plain integer register fields. Used by short @@ -1621,7 +1911,10 @@ const struct arc_operand arc_operands[] = #define RRANGE_EL (ZA + 1) { 4, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK | ARC_OPERAND_TRUNCATE, insert_rrange, extract_rrange}, -#define FP_EL (RRANGE_EL + 1) +#define R13_EL (RRANGE_EL + 1) + { 1, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_IGNORE | ARC_OPERAND_NCHK, + insert_r13el, extract_rrange }, +#define FP_EL (R13_EL + 1) { 1, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_IGNORE | ARC_OPERAND_NCHK, insert_fpel, extract_fpel }, #define BLINK_EL (FP_EL + 1) @@ -1647,12 +1940,26 @@ const struct arc_operand arc_operands[] = #define UIMM6_20 (FKT_NT + 1) {6, 0, 0, ARC_OPERAND_UNSIGNED, insert_uimm6_20, extract_uimm6_20}, + /* Exactly like the above but used by relaxation. */ +#define UIMM6_20R (UIMM6_20 + 1) + {6, 0, -UIMM6_20R, ARC_OPERAND_UNSIGNED | ARC_OPERAND_PCREL, + insert_uimm6_20, extract_uimm6_20}, + /* SIMM12_20 mask = 00000000000000000000111111222222. */ -#define SIMM12_20 (UIMM6_20 + 1) +#define SIMM12_20 (UIMM6_20R + 1) {12, 0, 0, ARC_OPERAND_SIGNED, insert_simm12_20, extract_simm12_20}, + /* Exactly like the above but used by relaxation. */ +#define SIMM12_20R (SIMM12_20 + 1) + {12, 0, -SIMM12_20R, ARC_OPERAND_SIGNED | ARC_OPERAND_PCREL, + insert_simm12_20, extract_simm12_20}, + + /* UIMM12_20 mask = 00000000000000000000111111222222. */ +#define UIMM12_20 (SIMM12_20R + 1) + {12, 0, 0, ARC_OPERAND_UNSIGNED, insert_simm12_20, extract_uimm12_20}, + /* SIMM3_5_S mask = 0000011100000000. */ -#define SIMM3_5_S (SIMM12_20 + 1) +#define SIMM3_5_S (UIMM12_20 + 1) {3, 0, 0, ARC_OPERAND_SIGNED | ARC_OPERAND_NCHK, insert_simm3s, extract_simm3s}, @@ -1662,16 +1969,27 @@ const struct arc_operand arc_operands[] = | ARC_OPERAND_TRUNCATE | ARC_OPERAND_IGNORE, insert_uimm7_a32_11_s, extract_uimm7_a32_11_s}, + /* The same as above but used by relaxation. */ +#define UIMM7_A32_11R_S (UIMM7_A32_11_S + 1) + {7, 0, -UIMM7_A32_11R_S, ARC_OPERAND_UNSIGNED | ARC_OPERAND_ALIGNED32 + | ARC_OPERAND_TRUNCATE | ARC_OPERAND_IGNORE | ARC_OPERAND_PCREL, + insert_uimm7_a32_11_s, extract_uimm7_a32_11_s}, + /* UIMM7_9_S mask = 0000000001111111. */ -#define UIMM7_9_S (UIMM7_A32_11_S + 1) +#define UIMM7_9_S (UIMM7_A32_11R_S + 1) {7, 0, 0, ARC_OPERAND_UNSIGNED, insert_uimm7_9_s, extract_uimm7_9_s}, /* UIMM3_13_S mask = 0000000000000111. */ #define UIMM3_13_S (UIMM7_9_S + 1) {3, 0, 0, ARC_OPERAND_UNSIGNED, insert_uimm3_13_s, extract_uimm3_13_s}, + /* Exactly like the above but used for relaxation. */ +#define UIMM3_13R_S (UIMM3_13_S + 1) + {3, 0, -UIMM3_13R_S, ARC_OPERAND_UNSIGNED | ARC_OPERAND_PCREL, + insert_uimm3_13_s, extract_uimm3_13_s}, + /* SIMM11_A32_7_S mask = 0000000111111111. */ -#define SIMM11_A32_7_S (UIMM3_13_S + 1) +#define SIMM11_A32_7_S (UIMM3_13R_S + 1) {11, 0, BFD_RELOC_ARC_SDA16_LD2, ARC_OPERAND_SIGNED | ARC_OPERAND_ALIGNED32 | ARC_OPERAND_TRUNCATE, insert_simm11_a32_7_s, extract_simm11_a32_7_s}, @@ -1696,7 +2014,7 @@ const struct arc_operand arc_operands[] = /* SIMM21_A16_5 mask = 00000111111111102222222222000000. */ #define SIMM21_A16_5 (UIMM6_8 + 1) {21, 0, BFD_RELOC_ARC_S21H_PCREL, ARC_OPERAND_SIGNED - | ARC_OPERAND_ALIGNED16 | ARC_OPERAND_TRUNCATE, + | ARC_OPERAND_ALIGNED16 | ARC_OPERAND_TRUNCATE | ARC_OPERAND_PCREL, insert_simm21_a16_5, extract_simm21_a16_5}, /* SIMM25_A16_5 mask = 00000111111111102222222222003333. */ @@ -1745,8 +2063,14 @@ const struct arc_operand arc_operands[] = | ARC_OPERAND_TRUNCATE | ARC_OPERAND_PCREL, insert_simm8_a16_9_s, extract_simm8_a16_9_s}, +/* UIMM10_6_S_JLIOFF mask = 0000001111111111. */ +#define UIMM10_6_S_JLIOFF (SIMM8_A16_9_S + 1) + {12, 0, BFD_RELOC_ARC_JLI_SECTOFF, ARC_OPERAND_UNSIGNED + | ARC_OPERAND_ALIGNED32 | ARC_OPERAND_TRUNCATE, insert_uimm10_6_s, + extract_uimm10_6_s}, + /* UIMM3_23 mask = 00000000000000000000000111000000. */ -#define UIMM3_23 (SIMM8_A16_9_S + 1) +#define UIMM3_23 (UIMM10_6_S_JLIOFF + 1) {3, 0, 0, ARC_OPERAND_UNSIGNED, insert_uimm3_23, extract_uimm3_23}, /* UIMM10_6_S mask = 0000001111111111. */ @@ -1762,8 +2086,13 @@ const struct arc_operand arc_operands[] = {9, 0, BFD_RELOC_ARC_SDA_LDST, ARC_OPERAND_SIGNED | ARC_OPERAND_IGNORE, insert_simm9_8, extract_simm9_8}, + /* The same as above but used by relaxation. */ +#define SIMM9_8R (SIMM9_8 + 1) + {9, 0, -SIMM9_8R, ARC_OPERAND_SIGNED | ARC_OPERAND_IGNORE + | ARC_OPERAND_PCREL, insert_simm9_8, extract_simm9_8}, + /* UIMM10_A32_8_S mask = 0000000011111111. */ -#define UIMM10_A32_8_S (SIMM9_8 + 1) +#define UIMM10_A32_8_S (SIMM9_8R + 1) {10, 0, -UIMM10_A32_8_S, ARC_OPERAND_UNSIGNED | ARC_OPERAND_ALIGNED32 | ARC_OPERAND_TRUNCATE | ARC_OPERAND_PCREL, insert_uimm10_a32_8_s, extract_uimm10_a32_8_s}, @@ -1819,8 +2148,13 @@ const struct arc_operand arc_operands[] = #define UIMM8_8_S (SIMM13_A16_20 + 1) {8, 0, 0, ARC_OPERAND_UNSIGNED, insert_uimm8_8_s, extract_uimm8_8_s}, + /* The same as above but used for relaxation. */ +#define UIMM8_8R_S (UIMM8_8_S + 1) + {8, 0, -UIMM8_8R_S, ARC_OPERAND_UNSIGNED | ARC_OPERAND_PCREL, + insert_uimm8_8_s, extract_uimm8_8_s}, + /* W6 mask = 00000000000000000000111111000000. */ -#define W6 (UIMM8_8_S + 1) +#define W6 (UIMM8_8R_S + 1) {6, 0, 0, ARC_OPERAND_SIGNED, insert_w6, extract_w6}, /* UIMM6_5_S mask = 0000011111100000. */ @@ -1829,13 +2163,16 @@ const struct arc_operand arc_operands[] = /* ARC NPS400 Support: See comment near head of file. */ #define NPS_R_DST_3B (UIMM6_5_S + 1) - { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_24_dst, extract_nps_3bit_reg_at_24_dst }, + { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_24_dst, extract_nps_3bit_reg_at_24_dst }, #define NPS_R_SRC1_3B (NPS_R_DST_3B + 1) - { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_24_dst, extract_nps_3bit_reg_at_24_dst }, + { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_24_dst, extract_nps_3bit_reg_at_24_dst }, #define NPS_R_SRC2_3B (NPS_R_SRC1_3B + 1) - { 3, 21, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_21_src2, extract_nps_3bit_reg_at_21_src2 }, + { 3, 21, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_21_src2, extract_nps_3bit_reg_at_21_src2 }, #define NPS_R_DST (NPS_R_SRC2_3B + 1) { 6, 21, 0, ARC_OPERAND_IR, NULL, NULL }, @@ -1850,16 +2187,20 @@ const struct arc_operand arc_operands[] = { 5, 0, 0, ARC_OPERAND_UNSIGNED, 0, 0 }, #define NPS_BITOP_SIZE (NPS_BITOP_SRC_POS + 1) - { 5, 10, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bitop_size, extract_nps_bitop_size }, + { 5, 10, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_bitop_size, extract_nps_bitop_size }, #define NPS_BITOP_DST_POS_SZ (NPS_BITOP_SIZE + 1) - { 5, 0, 0, ARC_OPERAND_UNSIGNED, insert_nps_dst_pos_and_size, extract_nps_dst_pos_and_size }, + { 5, 0, 0, ARC_OPERAND_UNSIGNED, + insert_nps_dst_pos_and_size, extract_nps_dst_pos_and_size }, #define NPS_BITOP_SIZE_2B (NPS_BITOP_DST_POS_SZ + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bitop_size_2b, extract_nps_bitop_size_2b }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_bitop_size_2b, extract_nps_bitop_size_2b }, #define NPS_BITOP_UIMM8 (NPS_BITOP_SIZE_2B + 1) - { 8, 0, 0, ARC_OPERAND_UNSIGNED, insert_nps_bitop_uimm8, extract_nps_bitop_uimm8 }, + { 8, 0, 0, ARC_OPERAND_UNSIGNED, + insert_nps_bitop_uimm8, extract_nps_bitop_uimm8 }, #define NPS_UIMM16 (NPS_BITOP_UIMM8 + 1) { 16, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, @@ -1868,28 +2209,36 @@ const struct arc_operand arc_operands[] = { 16, 0, 0, ARC_OPERAND_SIGNED, NULL, NULL }, #define NPS_RFLT_UIMM6 (NPS_SIMM16 + 1) - { 6, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_rflt_uimm6, extract_nps_rflt_uimm6 }, + { 6, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_rflt_uimm6, extract_nps_rflt_uimm6 }, #define NPS_XLDST_UIMM16 (NPS_RFLT_UIMM6 + 1) - { 16, 0, BFD_RELOC_ARC_NPS_CMEM16, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_cmem_uimm16, extract_nps_cmem_uimm16 }, + { 16, 0, BFD_RELOC_ARC_NPS_CMEM16, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_cmem_uimm16, extract_nps_cmem_uimm16 }, #define NPS_SRC2_POS (NPS_XLDST_UIMM16 + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_src2_pos, extract_nps_src2_pos }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_src2_pos, extract_nps_src2_pos }, #define NPS_SRC1_POS (NPS_SRC2_POS + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_src1_pos, extract_nps_src1_pos }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_src1_pos, extract_nps_src1_pos }, #define NPS_ADDB_SIZE (NPS_SRC1_POS + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_addb_size, extract_nps_addb_size }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_addb_size, extract_nps_addb_size }, #define NPS_ANDB_SIZE (NPS_ADDB_SIZE + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_andb_size, extract_nps_andb_size }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_andb_size, extract_nps_andb_size }, #define NPS_FXORB_SIZE (NPS_ANDB_SIZE + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_fxorb_size, extract_nps_fxorb_size }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_fxorb_size, extract_nps_fxorb_size }, #define NPS_WXORB_SIZE (NPS_FXORB_SIZE + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_wxorb_size, extract_nps_wxorb_size }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_wxorb_size, extract_nps_wxorb_size }, #define NPS_R_XLDST (NPS_WXORB_SIZE + 1) { 6, 5, 0, ARC_OPERAND_IR, NULL, NULL }, @@ -1898,7 +2247,8 @@ const struct arc_operand arc_operands[] = { 4, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_QCMP_SIZE (NPS_DIV_UIMM4 + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_qcmp_size, extract_nps_qcmp_size }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_qcmp_size, extract_nps_qcmp_size }, #define NPS_QCMP_M1 (NPS_QCMP_SIZE + 1) { 1, 14, 0, ARC_OPERAND_UNSIGNED, NULL, extract_nps_qcmp_m1 }, @@ -1910,25 +2260,32 @@ const struct arc_operand arc_operands[] = { 4, 5, 0, ARC_OPERAND_UNSIGNED, NULL, extract_nps_qcmp_m3 }, #define NPS_CALC_ENTRY_SIZE (NPS_QCMP_M3 + 1) - { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_calc_entry_size, extract_nps_calc_entry_size }, + { 0, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_calc_entry_size, extract_nps_calc_entry_size }, #define NPS_R_DST_3B_SHORT (NPS_CALC_ENTRY_SIZE + 1) - { 3, 8, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_8_dst, extract_nps_3bit_reg_at_8_dst }, + { 3, 8, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_8_dst, extract_nps_3bit_reg_at_8_dst }, #define NPS_R_SRC1_3B_SHORT (NPS_R_DST_3B_SHORT + 1) - { 3, 8, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_8_dst, extract_nps_3bit_reg_at_8_dst }, + { 3, 8, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_8_dst, extract_nps_3bit_reg_at_8_dst }, #define NPS_R_SRC2_3B_SHORT (NPS_R_SRC1_3B_SHORT + 1) - { 3, 5, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_5_src2, extract_nps_3bit_reg_at_5_src2 }, + { 3, 5, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_5_src2, extract_nps_3bit_reg_at_5_src2 }, #define NPS_BITOP_SIZE2 (NPS_R_SRC2_3B_SHORT + 1) - { 5, 25, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bitop2_size, extract_nps_bitop2_size }, + { 5, 25, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_bitop2_size, extract_nps_bitop2_size }, #define NPS_BITOP_SIZE1 (NPS_BITOP_SIZE2 + 1) - { 5, 20, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bitop1_size, extract_nps_bitop1_size }, + { 5, 20, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_bitop1_size, extract_nps_bitop1_size }, #define NPS_BITOP_DST_POS3_POS4 (NPS_BITOP_SIZE1 + 1) - { 5, 0, 0, ARC_OPERAND_UNSIGNED, insert_nps_bitop_dst_pos3_pos4, extract_nps_bitop_dst_pos3_pos4 }, + { 5, 0, 0, ARC_OPERAND_UNSIGNED, + insert_nps_bitop_dst_pos3_pos4, extract_nps_bitop_dst_pos3_pos4 }, #define NPS_BITOP_DST_POS4 (NPS_BITOP_DST_POS3_POS4 + 1) { 5, 42, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, @@ -1955,7 +2312,8 @@ const struct arc_operand arc_operands[] = { 5, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_BITOP_MOD4 (NPS_BITOP_SRC_POS1 + 1) - { 2, 0, 0, ARC_OPERAND_UNSIGNED, insert_nps_bitop_mod4, extract_nps_bitop_mod4 }, + { 2, 0, 0, ARC_OPERAND_UNSIGNED, + insert_nps_bitop_mod4, extract_nps_bitop_mod4 }, #define NPS_BITOP_MOD3 (NPS_BITOP_MOD4 + 1) { 2, 29, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, @@ -1967,28 +2325,34 @@ const struct arc_operand arc_operands[] = { 2, 25, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_BITOP_INS_EXT (NPS_BITOP_MOD1 + 1) - { 5, 20, 0, ARC_OPERAND_UNSIGNED, insert_nps_bitop_ins_ext, extract_nps_bitop_ins_ext }, + { 5, 20, 0, ARC_OPERAND_UNSIGNED, + insert_nps_bitop_ins_ext, extract_nps_bitop_ins_ext }, #define NPS_FIELD_START_POS (NPS_BITOP_INS_EXT + 1) { 3, 3, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_FIELD_SIZE (NPS_FIELD_START_POS + 1) - { 3, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_field_size, extract_nps_field_size }, + { 3, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_field_size, extract_nps_field_size }, #define NPS_SHIFT_FACTOR (NPS_FIELD_SIZE + 1) - { 3, 9, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_shift_factor, extract_nps_shift_factor }, + { 3, 9, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_shift_factor, extract_nps_shift_factor }, #define NPS_BITS_TO_SCRAMBLE (NPS_SHIFT_FACTOR + 1) - { 3, 12, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bits_to_scramble, extract_nps_bits_to_scramble }, + { 3, 12, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_bits_to_scramble, extract_nps_bits_to_scramble }, #define NPS_SRC2_POS_5B (NPS_BITS_TO_SCRAMBLE + 1) { 5, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_BDLEN_MAX_LEN (NPS_SRC2_POS_5B + 1) - { 8, 5, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bdlen_max_len, extract_nps_bdlen_max_len }, + { 8, 5, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_bdlen_max_len, extract_nps_bdlen_max_len }, #define NPS_MIN_HOFS (NPS_BDLEN_MAX_LEN + 1) - { 4, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_min_hofs, extract_nps_min_hofs }, + { 4, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_min_hofs, extract_nps_min_hofs }, #define NPS_PSBC (NPS_MIN_HOFS + 1) { 1, 11, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, @@ -1996,12 +2360,15 @@ const struct arc_operand arc_operands[] = #define NPS_DPI_DST (NPS_PSBC + 1) { 5, 11, 0, ARC_OPERAND_IR, NULL, NULL }, - /* NPS_DPI_SRC1_3B is similar to NPS_R_SRC1_3B but doesn't duplicate an operand */ + /* NPS_DPI_SRC1_3B is similar to NPS_R_SRC1_3B + but doesn't duplicate an operand. */ #define NPS_DPI_SRC1_3B (NPS_DPI_DST + 1) - { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_24_dst, extract_nps_3bit_reg_at_24_dst }, + { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_24_dst, extract_nps_3bit_reg_at_24_dst }, #define NPS_HASH_WIDTH (NPS_DPI_SRC1_3B + 1) - { 5, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_hash_width, extract_nps_hash_width }, + { 5, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_hash_width, extract_nps_hash_width }, #define NPS_HASH_PERM (NPS_HASH_WIDTH + 1) { 3, 2, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, @@ -2013,7 +2380,8 @@ const struct arc_operand arc_operands[] = { 2, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_HASH_LEN (NPS_HASH_BASEMAT + 1) - { 3, 2, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_hash_len, extract_nps_hash_len }, + { 3, 2, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_hash_len, extract_nps_hash_len }, #define NPS_HASH_OFS (NPS_HASH_LEN + 1) { 2, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, @@ -2031,88 +2399,132 @@ const struct arc_operand arc_operands[] = { 3, 2, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_E4BY_INDEX3 (NPS_E4BY_INDEX2 + 1) - { 2, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_index3, extract_nps_index3 }, + { 2, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_index3, extract_nps_index3 }, #define COLON (NPS_E4BY_INDEX3 + 1) { 0, 0, 0, ARC_OPERAND_COLON | ARC_OPERAND_FAKE, NULL, NULL }, #define NPS_BD (COLON + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_bd, extract_nps_bd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_bd, extract_nps_bd }, #define NPS_JID (NPS_BD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_jid, extract_nps_jid }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_jid, extract_nps_jid }, #define NPS_LBD (NPS_JID + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_lbd, extract_nps_lbd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_lbd, extract_nps_lbd }, #define NPS_MBD (NPS_LBD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_mbd, extract_nps_mbd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_mbd, extract_nps_mbd }, #define NPS_SD (NPS_MBD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_sd, extract_nps_sd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_sd, extract_nps_sd }, #define NPS_SM (NPS_SD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_sm, extract_nps_sm }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_sm, extract_nps_sm }, #define NPS_XA (NPS_SM + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_xa, extract_nps_xa }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_xa, extract_nps_xa }, #define NPS_XD (NPS_XA + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_xd, extract_nps_xd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_xd, extract_nps_xd }, #define NPS_CD (NPS_XD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_cd, extract_nps_cd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_cd, extract_nps_cd }, #define NPS_CBD (NPS_CD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_cbd, extract_nps_cbd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_cbd, extract_nps_cbd }, #define NPS_CJID (NPS_CBD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_cjid, extract_nps_cjid }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_cjid, extract_nps_cjid }, #define NPS_CLBD (NPS_CJID + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_clbd, extract_nps_clbd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_clbd, extract_nps_clbd }, #define NPS_CM (NPS_CLBD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_cm, extract_nps_cm }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_cm, extract_nps_cm }, #define NPS_CSD (NPS_CM + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_csd, extract_nps_csd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_csd, extract_nps_csd }, #define NPS_CXA (NPS_CSD + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_cxa, extract_nps_cxa }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_cxa, extract_nps_cxa }, #define NPS_CXD (NPS_CXA + 1) - { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, insert_nps_cxd, extract_nps_cxd }, + { 0, 0, 0, ARC_OPERAND_ADDRTYPE | ARC_OPERAND_NCHK, + insert_nps_cxd, extract_nps_cxd }, #define NPS_BD_TYPE (NPS_CXD + 1) { 1, 10, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_BMU_NUM (NPS_BD_TYPE + 1) - { 3, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bd_num_buff, extract_nps_bd_num_buff }, + { 3, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_bd_num_buff, extract_nps_bd_num_buff }, #define NPS_PMU_NXT_DST (NPS_BMU_NUM + 1) { 4, 6, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, -#define NPS_PMU_NUM_JOB (NPS_PMU_NXT_DST + 1) - { 2, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_pmu_num_job, extract_nps_pmu_num_job }, +#define NPS_WHASH_SIZE (NPS_PMU_NXT_DST + 1) + { 6, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_size_16bit, extract_nps_size_16bit }, -#define NPS_R_DST_3B_48 (NPS_PMU_NUM_JOB + 1) - { 3, 40, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_40_dst, extract_nps_3bit_reg_at_40_dst }, +#define NPS_PMU_NUM_JOB (NPS_WHASH_SIZE + 1) + { 2, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_pmu_num_job, extract_nps_pmu_num_job }, + +#define NPS_DMA_IMM_ENTRY (NPS_PMU_NUM_JOB + 1) + { 3, 2, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_imm_entry, extract_nps_imm_entry }, + +#define NPS_DMA_IMM_OFFSET (NPS_DMA_IMM_ENTRY + 1) + { 4, 10, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_imm_offset, extract_nps_imm_offset }, + +#define NPS_MISC_IMM_SIZE (NPS_DMA_IMM_OFFSET + 1) + { 7, 0, 0, ARC_OPERAND_UNSIGNED , NULL, NULL }, + +#define NPS_MISC_IMM_OFFSET (NPS_MISC_IMM_SIZE + 1) + { 5, 8, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_misc_imm_offset, extract_nps_misc_imm_offset }, + +#define NPS_R_DST_3B_48 (NPS_MISC_IMM_OFFSET + 1) + { 3, 40, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_40_dst, extract_nps_3bit_reg_at_40_dst }, #define NPS_R_SRC1_3B_48 (NPS_R_DST_3B_48 + 1) - { 3, 40, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_40_dst, extract_nps_3bit_reg_at_40_dst }, + { 3, 40, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_40_dst, extract_nps_3bit_reg_at_40_dst }, #define NPS_R_SRC2_3B_48 (NPS_R_SRC1_3B_48 + 1) - { 3, 37, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_37_src2, extract_nps_3bit_reg_at_37_src2 }, + { 3, 37, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_37_src2, extract_nps_3bit_reg_at_37_src2 }, #define NPS_R_DST_3B_64 (NPS_R_SRC2_3B_48 + 1) - { 3, 56, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_56_dst, extract_nps_3bit_reg_at_56_dst }, + { 3, 56, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_56_dst, extract_nps_3bit_reg_at_56_dst }, #define NPS_R_SRC1_3B_64 (NPS_R_DST_3B_64 + 1) - { 3, 56, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_56_dst, extract_nps_3bit_reg_at_56_dst }, + { 3, 56, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_56_dst, extract_nps_3bit_reg_at_56_dst }, #define NPS_R_SRC2_3B_64 (NPS_R_SRC1_3B_64 + 1) - { 3, 53, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_reg_at_53_src2, extract_nps_3bit_reg_at_53_src2 }, + { 3, 53, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_3bit_reg_at_53_src2, extract_nps_3bit_reg_at_53_src2 }, #define NPS_RA_64 (NPS_R_SRC2_3B_64 + 1) { 6, 53, 0, ARC_OPERAND_IR, NULL, NULL }, @@ -2124,7 +2536,8 @@ const struct arc_operand arc_operands[] = { 5, 43, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE, NULL, NULL }, #define NPS_RBdouble_64 (NPS_RBdup_64 + 1) - { 10, 43, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_rbdouble_64, extract_nps_rbdouble_64 }, + { 10, 43, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, + insert_nps_rbdouble_64, extract_nps_rbdouble_64 }, #define NPS_RC_64 (NPS_RBdouble_64 + 1) { 5, 43, 0, ARC_OPERAND_IR, NULL, NULL }, @@ -2133,7 +2546,8 @@ const struct arc_operand arc_operands[] = { 16, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, #define NPS_PROTO_SIZE (NPS_UIMM16_0_64 + 1) - { 6, 16, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_proto_size, extract_nps_proto_size } + { 6, 16, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, + insert_nps_proto_size, extract_nps_proto_size } }; const unsigned arc_num_operands = ARRAY_SIZE (arc_operands); @@ -2227,7 +2641,8 @@ const struct arc_flag_special arc_flag_special_cases[] = { "b", { F_ALWAYS, F_RA, F_EQUAL, F_ZERO, F_NOTEQUAL, F_NOTZERO, F_POZITIVE, F_PL, F_NEGATIVE, F_MINUS, F_CARRY, F_CARRYSET, F_LOWER, F_CARRYCLR, F_NOTCARRY, F_HIGHER, F_OVERFLOWSET, F_OVERFLOW, F_NOTOVERFLOW, - F_OVERFLOWCLR, F_GT, F_GE, F_LT, F_LE, F_HI, F_LS, F_PNZ, F_NULL } }, + F_OVERFLOWCLR, F_GT, F_GE, F_LT, F_LE, F_HI, F_LS, F_PNZ, F_NJ, F_NM, + F_NO_T, F_NULL } }, { "bl", { F_ALWAYS, F_RA, F_EQUAL, F_ZERO, F_NOTEQUAL, F_NOTZERO, F_POZITIVE, F_PL, F_NEGATIVE, F_MINUS, F_CARRY, F_CARRYSET, F_LOWER, F_CARRYCLR, F_NOTCARRY, F_HIGHER, F_OVERFLOWSET, F_OVERFLOW, F_NOTOVERFLOW, @@ -2405,32 +2820,31 @@ const struct arc_opcode arc_relax_opcodes[] = | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A16_5 }, { C_D }}, - /* add_s c,b,u3 01101bbbccc00uuu. Wants UIMM3_13_S_PCREL. */ + /* add_s c,b,u3 01101bbbccc00uuu. */ { "add_s", 0x00006800, 0x0000F818, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, - { RC_S, RB_S, UIMM3_13_S }, { 0 }}, + { RC_S, RB_S, UIMM3_13R_S }, { 0 }}, - /* add<.f> a,b,u6 00100bbb01000000FBBBuuuuuuAAAAAA. Wants - UIMM6_20_PCREL. */ + /* add<.f> a,b,u6 00100bbb01000000FBBBuuuuuuAAAAAA. */ { "add", 0x20400000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, - { RA, RB, UIMM6_20 }, { C_F }}, + { RA, RB, UIMM6_20R }, { C_F }}, /* add<.f> a,b,limm 00100bbb00000000FBBB111110AAAAAA. */ { "add", 0x20000F80, 0xF8FF0FC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RA, RB, LIMM }, { C_F }}, - /* ld_s c,b,u7 10000bbbcccuuuuu. Wants UIMM7_A32_11_S_PCREL. */ + /* ld_s c,b,u7 10000bbbcccuuuuu. */ { "ld_s", 0x00008000, 0x0000F800, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, - { RC_S, BRAKET, RB_S, UIMM7_A32_11_S, BRAKETdup }, { 0 }}, + { RC_S, BRAKET, RB_S, UIMM7_A32_11R_S, BRAKETdup }, { 0 }}, /* ld<.di><.aa><.x> a,b,s9 - 00010bbbssssssssSBBBDaaZZXAAAAAA. Wants SIMM9_8_PCREL. */ + 00010bbbssssssssSBBBDaaZZXAAAAAA. */ { "ld", 0x10000000, 0xF8000000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, - { RA, BRAKET, RB, SIMM9_8, BRAKETdup }, + { RA, BRAKET, RB, SIMM9_8R, BRAKETdup }, { C_ZZ23, C_DI20, C_AA21, C_X25 }}, /* ld<.di><.aa><.x> a,b,limm 00100bbbaa110ZZXDBBB111110AAAAAA. */ @@ -2439,63 +2853,58 @@ const struct arc_opcode arc_relax_opcodes[] = { RA, BRAKET, RB, LIMM, BRAKETdup }, { C_ZZ13, C_DI16, C_AA8, C_X15 }}, - /* mov_s b,u8 11011bbbuuuuuuuu. Wants UIMM8_8_S_PCREL. */ + /* mov_s b,u8 11011bbbuuuuuuuu. */ { "mov_s", 0x0000D800, 0x0000F800, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, - { RB_S, UIMM8_8_S }, { 0 }}, + { RB_S, UIMM8_8R_S }, { 0 }}, - /* mov<.f> b,s12 00100bbb10001010FBBBssssssSSSSSS. Wants - SIMM12_20_PCREL. */ + /* mov<.f> b,s12 00100bbb10001010FBBBssssssSSSSSS. */ { "mov", 0x208A0000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, - { RB, SIMM12_20 }, { C_F }}, + { RB, SIMM12_20R }, { C_F }}, /* mov<.f> b,limm 00100bbb00001010FBBB111110RRRRRR. */ { "mov", 0x200A0F80, 0xF8FF0FC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { RB, LIMM }, { C_F }}, - /* sub_s c,b,u3 01101bbbccc01uuu. UIMM3_13_S_PCREL. */ + /* sub_s c,b,u3 01101bbbccc01uuu. */ { "sub_s", 0x00006808, 0x0000F818, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, - { RC_S, RB_S, UIMM3_13_S }, { 0 }}, + { RC_S, RB_S, UIMM3_13R_S }, { 0 }}, - /* sub<.f> a,b,u6 00100bbb01000010FBBBuuuuuuAAAAAA. - UIMM6_20_PCREL. */ + /* sub<.f> a,b,u6 00100bbb01000010FBBBuuuuuuAAAAAA. */ { "sub", 0x20420000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, - { RA, RB, UIMM6_20 }, { C_F }}, + { RA, RB, UIMM6_20R }, { C_F }}, /* sub<.f> a,b,limm 00100bbb00000010FBBB111110AAAAAA. */ { "sub", 0x20020F80, 0xF8FF0FC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RA, RB, LIMM }, { C_F }}, - /* mpy<.f> a,b,u6 00100bbb01011010FBBBuuuuuuAAAAAA. - UIMM6_20_PCREL. */ + /* mpy<.f> a,b,u6 00100bbb01011010FBBBuuuuuuAAAAAA. */ { "mpy", 0x205A0000, 0xF8FF0000, ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM - | ARC_OPCODE_ARCv2HS, ARITH, MPY6E, { RA, RB, UIMM6_20 }, { C_F }}, + | ARC_OPCODE_ARCv2HS, ARITH, MPY6E, { RA, RB, UIMM6_20R }, { C_F }}, /* mpy<.f> a,b,limm 00100bbb00011010FBBB111110AAAAAA. */ { "mpy", 0x201A0F80, 0xF8FF0FC0, ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, MPY6E, { RA, RB, LIMM }, { C_F }}, - /* mov<.f><.cc> b,u6 00100bbb11001010FBBBuuuuuu1QQQQQ. - UIMM6_20_PCREL. */ + /* mov<.f><.cc> b,u6 00100bbb11001010FBBBuuuuuu1QQQQQ. */ { "mov", 0x20CA0020, 0xF8FF0020, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, - { RB, UIMM6_20 }, { C_F, C_CC }}, + { RB, UIMM6_20R }, { C_F, C_CC }}, /* mov<.f><.cc> b,limm 00100bbb11001010FBBB1111100QQQQQ. */ { "mov", 0x20CA0F80, 0xF8FF0FE0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { RB, LIMM }, { C_F, C_CC }}, - /* add<.f><.cc> b,b,u6 00100bbb11000000FBBBuuuuuu1QQQQQ. - UIMM6_20_PCREL. */ + /* add<.f><.cc> b,b,u6 00100bbb11000000FBBBuuuuuu1QQQQQ. */ { "add", 0x20C00020, 0xF8FF0020, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, - { RB, RBdup, UIMM6_20 }, { C_F, C_CC }}, + { RB, RBdup, UIMM6_20R }, { C_F, C_CC }}, /* add<.f><.cc> b,b,limm 00100bbb11000000FBBB1111100QQQQQ. */ { "add", 0x20C00F80, 0xF8FF0FE0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700