X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fbfin-dis.c;h=19ce42601453a092f6977fe359834c14a8066eec;hb=6c2ca6c25dbefd7192dac52e7fd156ae0f299f1f;hp=b8bc08788f5049edd4b94af497ec69ccb01d4b4b;hpb=703ec4e8d0c1daac6033e14170c0ddd28c455c0a;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index b8bc08788f..19ce426014 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -1,5 +1,5 @@ /* Disassemble ADI Blackfin Instructions. - Copyright (C) 2005-2014 Free Software Foundation, Inc. + Copyright (C) 2005-2019 Free Software Foundation, Inc. This file is part of libopcodes. @@ -33,18 +33,18 @@ typedef long TIword; -#define HOST_LONG_WORD_SIZE (sizeof (long) * 8) -#define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p)) -#define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n))) -#define MASKBITS(val, bits) (val & ((1 << bits) - 1)) +#define SIGNBIT(bits) (1ul << ((bits) - 1)) +#define MASKBITS(val, bits) ((val) & ((1ul << (bits)) - 1)) +#define SIGNEXTEND(v, n) ((MASKBITS (v, n) ^ SIGNBIT (n)) - SIGNBIT (n)) -#include "dis-asm.h" +#include "disassemble.h" typedef unsigned int bu32; struct private { - int comment, parallel; + TIword iw0; + bfd_boolean comment, parallel; }; typedef enum @@ -124,8 +124,12 @@ fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info *outf) if (constant_formats[cf].reloc) { - bfd_vma ea = (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_formats[cf].nbits) - : x) + constant_formats[cf].offset) << constant_formats[cf].scale); + bfd_vma ea; + + if (constant_formats[cf].pcrel) + x = SIGNEXTEND (x, constant_formats[cf].nbits); + ea = x + constant_formats[cf].offset; + ea = ea << constant_formats[cf].scale; if (constant_formats[cf].pcrel) ea += pc; @@ -149,24 +153,21 @@ fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info *outf) { int nb = constant_formats[cf].nbits + 1; - x = x | (1 << constant_formats[cf].nbits); + x = x | (1ul << constant_formats[cf].nbits); x = SIGNEXTEND (x, nb); } - else - x = constant_formats[cf].issigned ? SIGNEXTEND (x, constant_formats[cf].nbits) : x; - - if (constant_formats[cf].offset) - x += constant_formats[cf].offset; + else if (constant_formats[cf].issigned) + x = SIGNEXTEND (x, constant_formats[cf].nbits); - if (constant_formats[cf].scale) - x <<= constant_formats[cf].scale; + x += constant_formats[cf].offset; + x = (unsigned long) x << constant_formats[cf].scale; if (constant_formats[cf].decimal) sprintf (buf, "%*li", constant_formats[cf].leading, x); else { if (constant_formats[cf].issigned && x < 0) - sprintf (buf, "-0x%x", abs (x)); + sprintf (buf, "-0x%lx", (unsigned long)(- x)); else sprintf (buf, "0x%lx", (unsigned long) x); } @@ -179,10 +180,12 @@ fmtconst_val (const_forms_t cf, unsigned int x, unsigned int pc) { if (0 && constant_formats[cf].reloc) { - bu32 ea = (((constant_formats[cf].pcrel - ? SIGNEXTEND (x, constant_formats[cf].nbits) - : x) + constant_formats[cf].offset) - << constant_formats[cf].scale); + bu32 ea; + + if (constant_formats[cf].pcrel) + x = SIGNEXTEND (x, constant_formats[cf].nbits); + ea = x + constant_formats[cf].offset; + ea = ea << constant_formats[cf].scale; if (constant_formats[cf].pcrel) ea += pc; @@ -193,7 +196,7 @@ fmtconst_val (const_forms_t cf, unsigned int x, unsigned int pc) if (constant_formats[cf].negative) { int nb = constant_formats[cf].nbits + 1; - x = x | (1 << constant_formats[cf].nbits); + x = x | (1ul << constant_formats[cf].nbits); x = SIGNEXTEND (x, nb); } else if (constant_formats[cf].issigned) @@ -349,7 +352,7 @@ static const enum machine_registers decode_gregs[] = REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, }; -#define gregs(x, i) REGNAME (decode_gregs[((i) << 3) | (x)]) +#define gregs(x, i) REGNAME (decode_gregs[(((i) << 3) | (x)) & 15]) /* [dregs pregs (iregs mregs) (bregs lregs)]. */ static const enum machine_registers decode_regs[] = @@ -360,7 +363,7 @@ static const enum machine_registers decode_regs[] = REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, }; -#define regs(x, i) REGNAME (decode_regs[((i) << 3) | (x)]) +#define regs(x, i) REGNAME (decode_regs[(((i) << 3) | (x)) & 31]) /* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */ static const enum machine_registers decode_regs_lo[] = @@ -371,7 +374,7 @@ static const enum machine_registers decode_regs_lo[] = REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3, }; -#define regs_lo(x, i) REGNAME (decode_regs_lo[((i) << 3) | (x)]) +#define regs_lo(x, i) REGNAME (decode_regs_lo[(((i) << 3) | (x)) & 31]) /* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */ static const enum machine_registers decode_regs_hi[] = @@ -382,7 +385,7 @@ static const enum machine_registers decode_regs_hi[] = REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3, }; -#define regs_hi(x, i) REGNAME (decode_regs_hi[((i) << 3) | (x)]) +#define regs_hi(x, i) REGNAME (decode_regs_hi[(((i) << 3) | (x)) & 31]) static const enum machine_registers decode_statbits[] = { @@ -483,6 +486,7 @@ static const enum machine_registers decode_allregs[] = #ifndef OUTS #define OUTS(p, txt) (p)->fprintf_func ((p)->stream, "%s", txt) #endif +#define OUT(p, txt, ...) (p)->fprintf_func ((p)->stream, txt, ## __VA_ARGS__) static void amod0 (int s0, int x0, disassemble_info *outf) @@ -1223,6 +1227,7 @@ decode_CC2stat_0 (TIword iw0, disassemble_info *outf) int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask); const char *bitname = statbits (cbit); + const char * const op_names[] = { "", "|", "&", "^" } ; if (priv->parallel) return 0; @@ -1240,48 +1245,10 @@ decode_CC2stat_0 (TIword iw0, disassemble_info *outf) bitname = bitnames; } - if (op == 0 && D == 0) - { - OUTS (outf, "CC = "); - OUTS (outf, bitname); - } - else if (op == 1 && D == 0) - { - OUTS (outf, "CC |= "); - OUTS (outf, bitname); - } - else if (op == 2 && D == 0) - { - OUTS (outf, "CC &= "); - OUTS (outf, bitname); - } - else if (op == 3 && D == 0) - { - OUTS (outf, "CC ^= "); - OUTS (outf, bitname); - } - else if (op == 0 && D == 1) - { - OUTS (outf, bitname); - OUTS (outf, " = CC"); - } - else if (op == 1 && D == 1) - { - OUTS (outf, bitname); - OUTS (outf, " |= CC"); - } - else if (op == 2 && D == 1) - { - OUTS (outf, bitname); - OUTS (outf, " &= CC"); - } - else if (op == 3 && D == 1) - { - OUTS (outf, bitname); - OUTS (outf, " ^= CC"); - } + if (D == 0) + OUT (outf, "CC %s= %s", op_names[op], bitname); else - return 0; + OUT (outf, "%s %s= CC", bitname, op_names[op]); return 2; } @@ -1604,7 +1571,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) OUTS (outf, ");\t\t/* bit"); OUTS (outf, imm7d (src)); OUTS (outf, " */"); - priv->comment = 1; + priv->comment = TRUE; } else if (opc == 1) { @@ -1615,7 +1582,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) OUTS (outf, ");\t\t/* bit"); OUTS (outf, imm7d (src)); OUTS (outf, " */"); - priv->comment = 1; + priv->comment = TRUE; } else if (opc == 2) { @@ -1626,7 +1593,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) OUTS (outf, ");\t\t/* bit"); OUTS (outf, imm7d (src)); OUTS (outf, " */"); - priv->comment = 1; + priv->comment = TRUE; } else if (opc == 3) { @@ -1637,7 +1604,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) OUTS (outf, ");\t\t/* bit"); OUTS (outf, imm7d (src)); OUTS (outf, " */"); - priv->comment = 1; + priv->comment = TRUE; } else if (opc == 4) { @@ -1648,7 +1615,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) OUTS (outf, ");\t\t/* bit"); OUTS (outf, imm7d (src)); OUTS (outf, " */"); - priv->comment = 1; + priv->comment = TRUE; } else if (opc == 5) { @@ -1806,7 +1773,7 @@ decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf) OUTS (outf, "("); OUTS (outf, imm32 (*pval)); OUTS (outf, ") */"); - priv->comment = 1; + priv->comment = TRUE; } else if (op == 1) { @@ -1816,7 +1783,7 @@ decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf) OUTS (outf, ";\t\t/* ("); OUTS (outf, imm7d (src)); OUTS (outf, ") */"); - priv->comment = 1; + priv->comment = TRUE; } else return 0; @@ -1862,7 +1829,7 @@ decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf) OUTS (outf, "("); OUTS (outf, imm32 (*pval)); OUTS (outf, ") */"); - priv->comment = 1; + priv->comment = TRUE; } else if (op == 1) { @@ -1872,7 +1839,7 @@ decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf) OUTS (outf, ";\t\t/* ("); OUTS (outf, imm7d (src)); OUTS (outf, ") */"); - priv->comment = 1; + priv->comment = TRUE; } else return 0; @@ -2078,7 +2045,7 @@ decode_dagMODik_0 (TIword iw0, disassemble_info *outf) else if (op == 2 || op == 3) OUTS (outf, "4"); OUTS (outf, ") */"); - priv->comment = 1; + priv->comment = TRUE; } return 2; @@ -2778,7 +2745,7 @@ decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf) } OUTS (outf, " */"); - priv->comment = 1; + priv->comment = TRUE; } if (S == 1 || Z == 1) { @@ -2789,7 +2756,7 @@ decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, "("); OUTS (outf, imm32 (*pval)); OUTS (outf, ") */"); - priv->comment = 1; + priv->comment = TRUE; } return 4; } @@ -2954,7 +2921,7 @@ decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ";\t\t/* ("); OUTS (outf, uimm16s4d (framesize)); OUTS (outf, ") */"); - priv->comment = 1; + priv->comment = TRUE; } else if (R == 1) OUTS (outf, "UNLINK"); @@ -4697,8 +4664,9 @@ _print_insn_bfin (bfd_vma pc, disassemble_info *outf) if (ifetch (pc, outf, &iw0)) return -1; + priv->iw0 = iw0; - if ((iw0 & 0xc000) == 0xc000) + if (((iw0 & 0xc000) == 0xc000) && ((iw0 & 0xff00) != 0xf800)) { /* 32-bit insn. */ if (ifetch (pc + 2, outf, &iw1)) @@ -4803,14 +4771,10 @@ int print_insn_bfin (bfd_vma pc, disassemble_info *outf) { struct private priv; - TIword iw0; int count; - if (ifetch (pc, outf, &iw0) == -1) - return -1; - - priv.parallel = 0; - priv.comment = 0; + priv.parallel = FALSE; + priv.comment = FALSE; outf->private_data = &priv; count = _print_insn_bfin (pc, outf); @@ -4819,32 +4783,32 @@ print_insn_bfin (bfd_vma pc, disassemble_info *outf) /* Proper display of multiple issue instructions. */ - if (count == 4 && (iw0 & 0xc000) == 0xc000 && (iw0 & BIT_MULTI_INS) - && ((iw0 & 0xe800) != 0xe800 /* Not Linkage. */ )) + if (count == 4 && (priv.iw0 & 0xc000) == 0xc000 && (priv.iw0 & BIT_MULTI_INS) + && ((priv.iw0 & 0xe800) != 0xe800 /* Not Linkage. */ )) { - int legal = 1; + bfd_boolean legal = TRUE; int len; - priv.parallel = 1; + priv.parallel = TRUE; OUTS (outf, " || "); len = _print_insn_bfin (pc + 4, outf); if (len == -1) return -1; OUTS (outf, " || "); if (len != 2) - legal = 0; + legal = FALSE; len = _print_insn_bfin (pc + 6, outf); if (len == -1) return -1; if (len != 2) - legal = 0; + legal = FALSE; if (legal) count = 8; else { OUTS (outf, ";\t\t/* ILLEGAL PARALLEL INSTRUCTION */"); - priv.comment = 1; + priv.comment = TRUE; count = 0; } }