X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fcgen-asm.in;h=e468e7a0d91f85800718dad6a11050eac8a1fbb8;hb=c5da193232ea0452f714dffee0d417d965590476;hp=4ae36d00438c3e537bf668c22cac4fa1b8a76821;hpb=f3a55c17ebafc898ec87d9473b7a738b25d1011a;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/cgen-asm.in b/opcodes/cgen-asm.in index 4ae36d0043..e468e7a0d9 100644 --- a/opcodes/cgen-asm.in +++ b/opcodes/cgen-asm.in @@ -1,32 +1,32 @@ /* Assembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator -THIS FILE IS MACHINE GENERATED WITH CGEN. -- the resultant file is machine generated, cgen-asm.in isn't + THIS FILE IS MACHINE GENERATED WITH CGEN. + - the resultant file is machine generated, cgen-asm.in isn't -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + Copyright (C) 1996-2016 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* ??? Eventually more and more of this stuff can go to cpu-independent files. Keep that in mind. */ #include "sysdep.h" -#include #include #include "ansidecl.h" #include "bfd.h" @@ -36,37 +36,35 @@ along with this program; if not, write to the Free Software Foundation, Inc., #include "opintl.h" #include "xregex.h" #include "libiberty.h" +#include "safe-ctype.h" -#undef min +#undef min #define min(a,b) ((a) < (b) ? (a) : (b)) -#undef max +#undef max #define max(a,b) ((a) > (b) ? (a) : (b)) static const char * parse_insn_normal - PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); + (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); -/* -- assembler routines inserted here */ +/* -- assembler routines inserted here. */ -/* - Regex construction routine. +/* Regex construction routine. - This translates an opcode syntax string into a regex string, - by replacing any non-character syntax element (such as an - opcode) with the pattern '.*' + This translates an opcode syntax string into a regex string, + by replacing any non-character syntax element (such as an + opcode) with the pattern '.*' - It then compiles the regex and stores it in the opcode, for - later use by @arch@_cgen_assemble_insn + It then compiles the regex and stores it in the opcode, for + later use by @arch@_cgen_assemble_insn - Returns NULL for success, an error message for failure. */ + Returns NULL for success, an error message for failure. */ -char * -@arch@_cgen_build_insn_regex (insn) - CGEN_INSN *insn; -{ +char * +@arch@_cgen_build_insn_regex (CGEN_INSN *insn) +{ CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); const char *mnem = CGEN_INSN_MNEMONIC (insn); - int mnem_len; char rxbuf[CGEN_MAX_RX_ELEMENTS]; char *rx = rxbuf; const CGEN_SYNTAX_CHAR_TYPE *syn; @@ -103,18 +101,18 @@ char * /* Copy any remaining literals from the syntax string into the rx. */ for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) { - if (CGEN_SYNTAX_CHAR_P (* syn)) + if (CGEN_SYNTAX_CHAR_P (* syn)) { char c = CGEN_SYNTAX_CHAR (* syn); - switch (c) + switch (c) { /* Escape any regex metacharacters in the syntax. */ - case '.': case '[': case '\\': - case '*': case '^': case '$': + case '.': case '[': case '\\': + case '*': case '^': case '$': #ifdef CGEN_ESCAPE_EXTENDED_REGEX - case '?': case '{': case '}': + case '?': case '{': case '}': case '(': case ')': case '*': case '|': case '+': case ']': #endif @@ -134,9 +132,6 @@ char * *rx++ = c; break; } - - /* Insert syntax char into rx. */ - *rx++ = c; } else { @@ -147,20 +142,20 @@ char * } /* Trailing whitespace ok. */ - * rx++ = '['; - * rx++ = ' '; - * rx++ = '\t'; - * rx++ = ']'; - * rx++ = '*'; + * rx++ = '['; + * rx++ = ' '; + * rx++ = '\t'; + * rx++ = ']'; + * rx++ = '*'; /* But anchor it after that. */ - * rx++ = '$'; + * rx++ = '$'; * rx = '\0'; CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); - if (reg_err == 0) + if (reg_err == 0) return NULL; else { @@ -170,7 +165,7 @@ char * regfree ((regex_t *) CGEN_INSN_RX (insn)); free (CGEN_INSN_RX (insn)); (CGEN_INSN_RX (insn)) = NULL; - return msg; + return msg; } } @@ -189,11 +184,10 @@ char * Returns NULL for success, an error message for failure. */ static const char * -parse_insn_normal (cd, insn, strp, fields) - CGEN_CPU_DESC cd; - const CGEN_INSN *insn; - const char **strp; - CGEN_FIELDS *fields; +parse_insn_normal (CGEN_CPU_DESC cd, + const CGEN_INSN *insn, + const char **strp, + CGEN_FIELDS *fields) { /* ??? Runtime added insns not handled yet. */ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); @@ -211,14 +205,14 @@ parse_insn_normal (cd, insn, strp, fields) GAS's input scrubber will ensure mnemonics are lowercase, but we may not be called from GAS. */ p = CGEN_INSN_MNEMONIC (insn); - while (*p && tolower (*p) == tolower (*str)) + while (*p && TOLOWER (*p) == TOLOWER (*str)) ++p, ++str; if (* p) return _("unrecognized instruction"); #ifndef CGEN_MNEMONIC_OPERANDS - if (* str && !isspace (* str)) + if (* str && ! ISSPACE (* str)) return _("unrecognized instruction"); #endif @@ -247,7 +241,7 @@ parse_insn_normal (cd, insn, strp, fields) first char after the mnemonic part is a space. */ /* FIXME: We also take inappropriate advantage of the fact that GAS's input scrubber will remove extraneous blanks. */ - if (tolower (*str) == tolower (CGEN_SYNTAX_CHAR (* syn))) + if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) { #ifdef CGEN_MNEMONIC_OPERANDS if (CGEN_SYNTAX_CHAR(* syn) == ' ') @@ -279,9 +273,11 @@ parse_insn_normal (cd, insn, strp, fields) continue; } +#ifdef CGEN_MNEMONIC_OPERANDS + (void) past_opcode_p; +#endif /* We have an operand of some sort. */ - errmsg = @arch@_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), - &str, fields); + errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); if (errmsg) return errmsg; @@ -296,7 +292,7 @@ parse_insn_normal (cd, insn, strp, fields) blanks now. IE: We needn't try again with a longer version of the insn and it is assumed that longer versions of insns appear before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ - while (isspace (* str)) + while (ISSPACE (* str)) ++ str; if (* str != '\0') @@ -331,12 +327,11 @@ parse_insn_normal (cd, insn, strp, fields) mind helps keep the design clean. */ const CGEN_INSN * -@arch@_cgen_assemble_insn (cd, str, fields, buf, errmsg) - CGEN_CPU_DESC cd; - const char *str; - CGEN_FIELDS *fields; - CGEN_INSN_BYTES_PTR buf; - char **errmsg; +@arch@_cgen_assemble_insn (CGEN_CPU_DESC cd, + const char *str, + CGEN_FIELDS *fields, + CGEN_INSN_BYTES_PTR buf, + char **errmsg) { const char *start; CGEN_INSN_LIST *ilist; @@ -345,7 +340,7 @@ const CGEN_INSN * int recognized_mnemonic = 0; /* Skip leading white space. */ - while (isspace (* str)) + while (ISSPACE (* str)) ++ str; /* The instructions are stored in hashed lists. @@ -359,17 +354,17 @@ const CGEN_INSN * const CGEN_INSN *insn = ilist->insn; recognized_mnemonic = 1; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not usually needed as unsupported opcodes shouldn't be in the hash lists. */ /* Is this insn supported by the selected cpu? */ if (! @arch@_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; @@ -399,62 +394,41 @@ const CGEN_INSN * { static char errbuf[150]; -#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS const char *tmp_errmsg; - - /* If requesting verbose error messages, use insert_errmsg. - Failing that, use parse_errmsg. */ - tmp_errmsg = (insert_errmsg ? insert_errmsg : - parse_errmsg ? parse_errmsg : - recognized_mnemonic ? - _("unrecognized form of instruction") : - _("unrecognized instruction")); - - if (strlen (start) > 50) - /* xgettext:c-format */ - sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); - else - /* xgettext:c-format */ - sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); +#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS +#define be_verbose 1 #else - if (strlen (start) > 50) - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s...'"), start); - else - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s'"), start); +#define be_verbose 0 #endif - + + if (be_verbose) + { + /* If requesting verbose error messages, use insert_errmsg. + Failing that, use parse_errmsg. */ + tmp_errmsg = (insert_errmsg ? insert_errmsg : + parse_errmsg ? parse_errmsg : + recognized_mnemonic ? + _("unrecognized form of instruction") : + _("unrecognized instruction")); + + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); + else + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); + } + else + { + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s...'"), start); + else + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s'"), start); + } + *errmsg = errbuf; return NULL; } } - -#if 0 /* This calls back to GAS which we can't do without care. */ - -/* Record each member of OPVALS in the assembler's symbol table. - This lets GAS parse registers for us. - ??? Interesting idea but not currently used. */ - -/* Record each member of OPVALS in the assembler's symbol table. - FIXME: Not currently used. */ - -void -@arch@_cgen_asm_hash_keywords (cd, opvals) - CGEN_CPU_DESC cd; - CGEN_KEYWORD *opvals; -{ - CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); - const CGEN_KEYWORD_ENTRY * ke; - - while ((ke = cgen_keyword_search_next (& search)) != NULL) - { -#if 0 /* Unnecessary, should be done in the search routine. */ - if (! @arch@_cgen_opval_supported (ke)) - continue; -#endif - cgen_asm_record_register (cd, ke->name, ke->value); - } -} - -#endif /* 0 */