X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fcrx-dis.c;h=710a96ec3d34534c8462ab4db682c2a3a3c1d756;hb=5fb776a6371f2122e891467a8fe9b4d7b8b5c6a4;hp=39233c3f579e5dbb57153f8470f470b2603f1cb2;hpb=a58a37627f7e1ceb616863a29fa12e70cb2081f3;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/crx-dis.c b/opcodes/crx-dis.c index 39233c3f57..710a96ec3d 100644 --- a/opcodes/crx-dis.c +++ b/opcodes/crx-dis.c @@ -1,26 +1,27 @@ /* Disassembler code for CRX. - Copyright 2004 Free Software Foundation, Inc. + Copyright 2004, 2005, 2006, 2007, 2012 Free Software Foundation, Inc. Contributed by Tomer Levi, NSC, Israel. Written by Tomer Levi. - This file is part of the GNU binutils and GDB, the GNU debugger. + This file is part of the GNU opcodes library. - This program is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License as published by the Free - Software Foundation; either version 2, or (at your option) + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ -#include "dis-asm.h" #include "sysdep.h" +#include "dis-asm.h" #include "opcode/crx.h" /* String to print when opcode was not matched. */ @@ -30,7 +31,7 @@ /* Extract 'n_bits' from 'a' starting from offset 'offs'. */ #define EXTRACT(a, offs, n_bits) \ - (n_bits == 32 ? (((a) >> (offs)) & ~0L) \ + (n_bits == 32 ? (((a) >> (offs)) & 0xffffffffL) \ : (((a) >> (offs)) & ((1 << (n_bits)) -1))) /* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */ @@ -112,8 +113,8 @@ static unsigned long build_mask (void); static int powerof2 (int); static int match_opcode (void); static void make_instruction (void); -static void print_arguments (ins *, struct disassemble_info *); -static void print_arg (argument *, struct disassemble_info *); +static void print_arguments (ins *, bfd_vma, struct disassemble_info *); +static void print_arg (argument *, bfd_vma, struct disassemble_info *); /* Retrieve the number of operands for the current assembled instruction. */ @@ -154,12 +155,12 @@ getargtype (operand_type op) This routine is used when disassembling the 'excp' instruction. */ static char * -gettrapstring (unsigned int index) +gettrapstring (unsigned int trap_index) { const trap_entry *trap; for (trap = crx_traps; trap < crx_traps + NUMTRAPS; trap++) - if (trap->entry == index) + if (trap->entry == trap_index) return trap->name; return ILLEGAL; @@ -185,12 +186,12 @@ getcinvstring (unsigned int num) char * getregname (reg r) { - const reg_entry *reg = &crx_regtab[r]; + const reg_entry * regentry = &crx_regtab[r]; - if (reg->type != CRX_R_REGTYPE) + if (regentry->type != CRX_R_REGTYPE) return ILLEGAL; else - return reg->name; + return regentry->name; } /* Given a coprocessor register enum value, retrieve its name. */ @@ -198,28 +199,28 @@ getregname (reg r) char * getcopregname (copreg r, reg_type type) { - const reg_entry *reg; + const reg_entry * regentry; if (type == CRX_C_REGTYPE) - reg = &crx_copregtab[r]; + regentry = &crx_copregtab[r]; else if (type == CRX_CS_REGTYPE) - reg = &crx_copregtab[r+(cs0-c0)]; + regentry = &crx_copregtab[r+(cs0-c0)]; else return ILLEGAL; - return reg->name; + return regentry->name; } /* Getting a processor register name. */ static char * -getprocregname (int index) +getprocregname (int reg_index) { const reg_entry *r; for (r = crx_regtab; r < crx_regtab + NUMREGS; r++) - if (r->image == index) + if (r->image == reg_index) return r->name; return "ILLEGAL REGISTER"; @@ -354,7 +355,7 @@ match_opcode (void) unsigned long mask; /* The instruction 'constant' opcode doewsn't exceed 32 bits. */ - unsigned long doubleWord = words[1] + (words[0] << 16); + unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff; /* Start searching from end of instruction table. */ instruction = &crx_instruction[NUMOPCODES - 2]; @@ -431,7 +432,7 @@ make_argument (argument * a, int start_bits) a->constant = p.val; break; - case arg_icr: + case arg_idxr: a->scale = 0; total_size = a->size + 10; /* sizeof(rbase + ridx + scl2) = 10. */ p = makelongparameter (allWords, inst_bit_size - total_size, @@ -496,10 +497,12 @@ make_argument (argument * a, int start_bits) /* Print a single argument. */ static void -print_arg (argument *a, struct disassemble_info *info) +print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info) { LONGLONG longdisp, mask; - char sign_flag; + int sign_flag = 0; + int relative = 0; + bfd_vma number; int op_index = 0; char string[200]; PTR stream = info->stream; @@ -545,7 +548,7 @@ print_arg (argument *a, struct disassemble_info *info) func (stream, "%s", string); } else - func (stream, "$0x%x", a->constant); + func (stream, "$0x%lx", a->constant & 0xffffffff); } else { @@ -554,12 +557,12 @@ print_arg (argument *a, struct disassemble_info *info) } } else - func (stream, "$0x%x", a->constant); + func (stream, "$0x%lx", a->constant & 0xffffffff); break; - case arg_icr: - func (stream, "0x%x(%s,%s,%d)", a->constant, getregname (a->r), - getregname (a->i_r), powerof2 (a->scale)); + case arg_idxr: + func (stream, "0x%lx(%s,%s,%d)", a->constant & 0xffffffff, + getregname (a->r), getregname (a->i_r), powerof2 (a->scale)); break; case arg_rbase: @@ -567,7 +570,7 @@ print_arg (argument *a, struct disassemble_info *info) break; case arg_cr: - func (stream, "0x%x(%s)", a->constant, getregname (a->r)); + func (stream, "0x%lx(%s)", a->constant & 0xffffffff, getregname (a->r)); if (IS_INSN_TYPE (LD_STOR_INS_INC)) func (stream, "+"); @@ -581,10 +584,9 @@ print_arg (argument *a, struct disassemble_info *info) || IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (DCR_BRANCH_INS) || IS_INSN_TYPE (COP_BRANCH_INS)) { - func (stream, "%c", '*'); + relative = 1; longdisp = a->constant; longdisp <<= 1; - sign_flag = '+'; switch (a->size) { @@ -595,7 +597,7 @@ print_arg (argument *a, struct disassemble_info *info) mask = ((LONGLONG)1 << a->size) - 1; if (longdisp & ((LONGLONG)1 << a->size)) { - sign_flag = '-'; + sign_flag = 1; longdisp = ~(longdisp) + 1; } a->constant = (unsigned long int) (longdisp & mask); @@ -606,12 +608,11 @@ print_arg (argument *a, struct disassemble_info *info) break; } - func (stream, "%c", sign_flag); } /* For branch Neq instruction it is 2*offset + 2. */ - if (IS_INSN_TYPE (BRANCH_NEQ_INS)) + else if (IS_INSN_TYPE (BRANCH_NEQ_INS)) a->constant = 2 * a->constant + 2; - if (IS_INSN_TYPE (LD_STOR_INS_INC) + else if (IS_INSN_TYPE (LD_STOR_INS_INC) || IS_INSN_TYPE (LD_STOR_INS) || IS_INSN_TYPE (STOR_IMM_INS) || IS_INSN_TYPE (CSTBIT_INS)) @@ -620,7 +621,10 @@ print_arg (argument *a, struct disassemble_info *info) if (instruction->operands[op_index].op_type == abs16) a->constant |= 0xFFFF0000; } - func (stream, "0x%x", a->constant); + func (stream, "%s", "0x"); + number = (relative ? memaddr : 0) + + (sign_flag ? -a->constant : a->constant); + (*info->print_address_func) (number, info); break; default: break; @@ -630,17 +634,17 @@ print_arg (argument *a, struct disassemble_info *info) /* Print all the arguments of CURRINSN instruction. */ static void -print_arguments (ins *currInsn, struct disassemble_info *info) +print_arguments (ins *currentInsn, bfd_vma memaddr, struct disassemble_info *info) { int i; - for (i = 0; i < currInsn->nargs; i++) + for (i = 0; i < currentInsn->nargs; i++) { processing_argument_number = i; - print_arg (&currInsn->arg[i], info); + print_arg (¤tInsn->arg[i], memaddr, info); - if (i != currInsn->nargs - 1) + if (i != currentInsn->nargs - 1) info->fprintf_func (info->stream, ", "); } } @@ -651,14 +655,16 @@ static void make_instruction (void) { int i; - unsigned int temp_value, shift; - argument a; + unsigned int shift; for (i = 0; i < currInsn.nargs; i++) { + argument a; + + memset (&a, 0, sizeof (a)); a.type = getargtype (instruction->operands[i].op_type); if (instruction->operands[i].op_type == cst4 - || instruction->operands[i].op_type == rbase_cst4) + || instruction->operands[i].op_type == rbase_dispu4) cst4flag = 1; a.size = getbits (instruction->operands[i].op_type); shift = instruction->operands[i].shift; @@ -669,15 +675,8 @@ make_instruction (void) /* Calculate instruction size (in bytes). */ currInsn.size = instruction->size + (size_changed ? 1 : 0); + /* Now in bits. */ currInsn.size *= 2; - - /* Swapping first and second arguments. */ - if (IS_INSN_TYPE (COP_BRANCH_INS)) - { - temp_value = currInsn.arg[0].constant; - currInsn.arg[0].constant = currInsn.arg[1].constant; - currInsn.arg[1].constant = temp_value; - } } /* Retrieve a single word from a given memory address. */ @@ -736,7 +735,7 @@ print_insn_crx (memaddr, info) if ((currInsn.nargs = get_number_of_operands ()) != 0) info->fprintf_func (info->stream, "\t"); make_instruction (); - print_arguments (&currInsn, info); + print_arguments (&currInsn, memaddr, info); return currInsn.size; }