X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fdisassemble.c;h=0b6313537ca6d9aeabe98711b363b9f44b7d0b28;hb=8ebac3aae962b531a2b86b6afba9e9d19a30c74d;hp=2d1358eb172107f733e9229018da24a3003864f3;hpb=049f8936e906ba762b5460a0b79e2fc7a39c6f4b;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 2d1358eb17..0b6313537c 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -1,34 +1,42 @@ /* Select disassembly routine for specified architecture. - Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 - Free Software Foundation, Inc. + Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This file is part of the GNU opcodes library. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ #include "sysdep.h" #include "dis-asm.h" #ifdef ARCH_all -#define ARCH_a29k #define ARCH_alpha #define ARCH_arc #define ARCH_arm #define ARCH_avr +#define ARCH_bfin +#define ARCH_cr16 #define ARCH_cris +#define ARCH_crx #define ARCH_d10v #define ARCH_d30v #define ARCH_dlx +#define ARCH_epiphany +#define ARCH_fr30 +#define ARCH_frv #define ARCH_h8300 #define ARCH_h8500 #define ARCH_hppa @@ -36,19 +44,25 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_i386 #define ARCH_i860 #define ARCH_i960 -#define ARCH_ip2k #define ARCH_ia64 -#define ARCH_fr30 +#define ARCH_ip2k +#define ARCH_iq2000 +#define ARCH_lm32 +#define ARCH_m32c #define ARCH_m32r -#define ARCH_m68k #define ARCH_m68hc11 #define ARCH_m68hc12 +#define ARCH_m68k #define ARCH_m88k #define ARCH_mcore +#define ARCH_mep +#define ARCH_microblaze #define ARCH_mips #define ARCH_mmix #define ARCH_mn10200 #define ARCH_mn10300 +#define ARCH_moxie +#define ARCH_mt #define ARCH_msp430 #define ARCH_ns32k #define ARCH_openrisc @@ -57,24 +71,34 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_pj #define ARCH_powerpc #define ARCH_rs6000 +#define ARCH_rl78 +#define ARCH_rx #define ARCH_s390 +#define ARCH_score #define ARCH_sh #define ARCH_sparc +#define ARCH_spu #define ARCH_tic30 #define ARCH_tic4x #define ARCH_tic54x +#define ARCH_tic6x #define ARCH_tic80 +#define ARCH_tilegx +#define ARCH_tilepro #define ARCH_v850 #define ARCH_vax #define ARCH_w65 #define ARCH_xstormy16 +#define ARCH_xc16x #define ARCH_xtensa +#define ARCH_z80 #define ARCH_z8k -#define ARCH_frv -#define ARCH_iq2000 #define INCLUDE_SHMEDIA #endif +#ifdef ARCH_m32c +#include "m32c-desc.h" +#endif disassembler_ftype disassembler (abfd) @@ -87,12 +111,6 @@ disassembler (abfd) { /* If you add a case to this table, also add it to the ARCH_all definition right above this function. */ -#ifdef ARCH_a29k - case bfd_arch_a29k: - /* As far as I know we only handle big-endian 29k objects. */ - disassemble = print_insn_big_a29k; - break; -#endif #ifdef ARCH_alpha case bfd_arch_alpha: disassemble = print_insn_alpha; @@ -100,10 +118,8 @@ disassembler (abfd) #endif #ifdef ARCH_arc case bfd_arch_arc: - { - disassemble = arc_get_disassembler (abfd); - break; - } + disassemble = arc_get_disassembler (abfd); + break; #endif #ifdef ARCH_arm case bfd_arch_arm: @@ -118,11 +134,26 @@ disassembler (abfd) disassemble = print_insn_avr; break; #endif +#ifdef ARCH_bfin + case bfd_arch_bfin: + disassemble = print_insn_bfin; + break; +#endif +#ifdef ARCH_cr16 + case bfd_arch_cr16: + disassemble = print_insn_cr16; + break; +#endif #ifdef ARCH_cris case bfd_arch_cris: disassemble = cris_get_disassembler (abfd); break; #endif +#ifdef ARCH_crx + case bfd_arch_crx: + disassemble = print_insn_crx; + break; +#endif #ifdef ARCH_d10v case bfd_arch_d10v: disassemble = print_insn_d10v; @@ -145,7 +176,9 @@ disassembler (abfd) || bfd_get_mach (abfd) == bfd_mach_h8300hn) disassemble = print_insn_h8300h; else if (bfd_get_mach (abfd) == bfd_mach_h8300s - || bfd_get_mach (abfd) == bfd_mach_h8300sn) + || bfd_get_mach (abfd) == bfd_mach_h8300sn + || bfd_get_mach (abfd) == bfd_mach_h8300sx + || bfd_get_mach (abfd) == bfd_mach_h8300sxn) disassemble = print_insn_h8300s; else disassemble = print_insn_h8300; @@ -168,6 +201,8 @@ disassembler (abfd) #endif #ifdef ARCH_i386 case bfd_arch_i386: + case bfd_arch_l1om: + case bfd_arch_k1om: disassemble = print_insn_i386; break; #endif @@ -191,11 +226,21 @@ disassembler (abfd) disassemble = print_insn_ip2k; break; #endif +#ifdef ARCH_epiphany + case bfd_arch_epiphany: + disassemble = print_insn_epiphany; + break; +#endif #ifdef ARCH_fr30 case bfd_arch_fr30: disassemble = print_insn_fr30; break; #endif +#ifdef ARCH_lm32 + case bfd_arch_lm32: + disassemble = print_insn_lm32; + break; +#endif #ifdef ARCH_m32r case bfd_arch_m32r: disassemble = print_insn_m32r; @@ -219,6 +264,16 @@ disassembler (abfd) disassemble = print_insn_m88k; break; #endif +#ifdef ARCH_mt + case bfd_arch_mt: + disassemble = print_insn_mt; + break; +#endif +#ifdef ARCH_microblaze + case bfd_arch_microblaze: + disassemble = print_insn_microblaze; + break; +#endif #ifdef ARCH_msp430 case bfd_arch_msp430: disassemble = print_insn_msp430; @@ -234,6 +289,11 @@ disassembler (abfd) disassemble = print_insn_mcore; break; #endif +#ifdef ARCH_mep + case bfd_arch_mep: + disassemble = print_insn_mep; + break; +#endif #ifdef ARCH_mips case bfd_arch_mips: if (bfd_big_endian (abfd)) @@ -265,9 +325,9 @@ disassembler (abfd) #ifdef ARCH_or32 case bfd_arch_or32: if (bfd_big_endian (abfd)) - disassemble = print_insn_big_or32; + disassemble = print_insn_big_or32; else - disassemble = print_insn_little_or32; + disassemble = print_insn_little_or32; break; #endif #ifdef ARCH_pdp11 @@ -296,11 +356,29 @@ disassembler (abfd) disassemble = print_insn_rs6000; break; #endif +#ifdef ARCH_rl78 + case bfd_arch_rl78: + disassemble = print_insn_rl78; + break; +#endif +#ifdef ARCH_rx + case bfd_arch_rx: + disassemble = print_insn_rx; + break; +#endif #ifdef ARCH_s390 case bfd_arch_s390: disassemble = print_insn_s390; break; #endif +#ifdef ARCH_score + case bfd_arch_score: + if (bfd_big_endian (abfd)) + disassemble = print_insn_big_score; + else + disassemble = print_insn_little_score; + break; +#endif #ifdef ARCH_sh case bfd_arch_sh: disassemble = print_insn_sh; @@ -311,6 +389,11 @@ disassembler (abfd) disassemble = print_insn_sparc; break; #endif +#ifdef ARCH_spu + case bfd_arch_spu: + disassemble = print_insn_spu; + break; +#endif #ifdef ARCH_tic30 case bfd_arch_tic30: disassemble = print_insn_tic30; @@ -326,6 +409,11 @@ disassembler (abfd) disassemble = print_insn_tic54x; break; #endif +#ifdef ARCH_tic6x + case bfd_arch_tic6x: + disassemble = print_insn_tic6x; + break; +#endif #ifdef ARCH_tic80 case bfd_arch_tic80: disassemble = print_insn_tic80; @@ -346,11 +434,21 @@ disassembler (abfd) disassemble = print_insn_xstormy16; break; #endif +#ifdef ARCH_xc16x + case bfd_arch_xc16x: + disassemble = print_insn_xc16x; + break; +#endif #ifdef ARCH_xtensa case bfd_arch_xtensa: disassemble = print_insn_xtensa; break; #endif +#ifdef ARCH_z80 + case bfd_arch_z80: + disassemble = print_insn_z80; + break; +#endif #ifdef ARCH_z8k case bfd_arch_z8k: if (bfd_get_mach(abfd) == bfd_mach_z8001) @@ -369,10 +467,30 @@ disassembler (abfd) disassemble = print_insn_frv; break; #endif +#ifdef ARCH_moxie + case bfd_arch_moxie: + disassemble = print_insn_moxie; + break; +#endif #ifdef ARCH_iq2000 case bfd_arch_iq2000: disassemble = print_insn_iq2000; break; +#endif +#ifdef ARCH_m32c + case bfd_arch_m32c: + disassemble = print_insn_m32c; + break; +#endif +#ifdef ARCH_tilegx + case bfd_arch_tilegx: + disassemble = print_insn_tilegx; + break; +#endif +#ifdef ARCH_tilepro + case bfd_arch_tilepro: + disassemble = print_insn_tilepro; + break; #endif default: return 0; @@ -393,6 +511,62 @@ disassembler_usage (stream) #ifdef ARCH_powerpc print_ppc_disassembler_options (stream); #endif +#ifdef ARCH_i386 + print_i386_disassembler_options (stream); +#endif +#ifdef ARCH_s390 + print_s390_disassembler_options (stream); +#endif return; } + +void +disassemble_init_for_target (struct disassemble_info * info) +{ + if (info == NULL) + return; + + switch (info->arch) + { +#ifdef ARCH_arm + case bfd_arch_arm: + info->symbol_is_valid = arm_symbol_is_valid; + info->disassembler_needs_relocs = TRUE; + break; +#endif +#ifdef ARCH_ia64 + case bfd_arch_ia64: + info->skip_zeroes = 16; + break; +#endif +#ifdef ARCH_tic4x + case bfd_arch_tic4x: + info->skip_zeroes = 32; + break; +#endif +#ifdef ARCH_mep + case bfd_arch_mep: + info->skip_zeroes = 256; + info->skip_zeroes_at_end = 0; + break; +#endif +#ifdef ARCH_m32c + case bfd_arch_m32c: + /* This processor in fact is little endian. The value set here + reflects the way opcodes are written in the cgen description. */ + info->endian = BFD_ENDIAN_BIG; + if (! info->insn_sets) + { + info->insn_sets = cgen_bitset_create (ISA_MAX); + if (info->mach == bfd_mach_m16c) + cgen_bitset_set (info->insn_sets, ISA_M16C); + else + cgen_bitset_set (info->insn_sets, ISA_M32C); + } + break; +#endif + default: + break; + } +}