X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Ffrv-dis.c;h=663ce36a766c87222062e6655846cc13b5cbd5f0;hb=a2cfc830e715142a0dd28496feaedf569b116b0e;hp=f74eb6251cca7b990530af1d709669c7163c5735;hpb=01f0fe5e0450edf168c1f612feb93cf588e4e7ea;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c index f74eb6251c..663ce36a76 100644 --- a/opcodes/frv-dis.c +++ b/opcodes/frv-dis.c @@ -4,20 +4,19 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 - Free Software Foundation, Inc. + Copyright (C) 1996-2016 Free Software Foundation, Inc. - This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. - This program is free software; you can redistribute it and/or modify + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., @@ -70,7 +69,7 @@ print_at (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, disassemble_info *info = (disassemble_info *) dis_info; (*info->fprintf_func) (info->stream, "@"); -} +} static void print_spr (CGEN_CPU_DESC cd, @@ -399,7 +398,7 @@ frv_cgen_print_operand (CGEN_CPU_DESC cd, } } -cgen_print_fn * const frv_cgen_print_handlers[] = +cgen_print_fn * const frv_cgen_print_handlers[] = { print_insn_normal, }; @@ -427,10 +426,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -452,10 +447,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ @@ -597,7 +588,7 @@ print_insn (CGEN_CPU_DESC cd, int length; unsigned long insn_value_cropped; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! frv_cgen_insn_supported (cd, insn)) @@ -615,7 +606,7 @@ print_insn (CGEN_CPU_DESC cd, relevant part from the buffer. */ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) - insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), info->endian == BFD_ENDIAN_BIG); else insn_value_cropped = insn_value; @@ -734,7 +725,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) arch = info->arch; if (arch == bfd_arch_unknown) arch = CGEN_BFD_ARCH; - + /* There's no standard way to compute the machine or isa number so we leave it to the target. */ #ifdef CGEN_COMPUTE_MACH @@ -775,7 +766,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) break; } } - } + } /* If we haven't initialized yet, initialize the opcode table. */ if (! cd)