X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Ffrv-dis.c;h=bf9d4f789f100fa92860f12500a8a115433b6e62;hb=1d29ab86cb5145cac5045c1a4113d8b8fbd4d9c6;hp=8b1e4daeca8cbb897fa1507308490f36ee7aa96d;hpb=ffead7aeceabe3c7a0cdacee89cd45aa893e9eec;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c index 8b1e4daeca..bf9d4f789f 100644 --- a/opcodes/frv-dis.c +++ b/opcodes/frv-dis.c @@ -1,27 +1,27 @@ +/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ /* Disassembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator -THIS FILE IS MACHINE GENERATED WITH CGEN. -- the resultant file is machine generated, cgen-dis.in isn't + THIS FILE IS MACHINE GENERATED WITH CGEN. + - the resultant file is machine generated, cgen-dis.in isn't -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 -Free Software Foundation, Inc. + Copyright (C) 1996-2019 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ /* ??? Eventually more and more of this stuff can go to cpu-independent files. Keep that in mind. */ @@ -29,7 +29,7 @@ along with this program; if not, write to the Free Software Foundation, Inc., #include "sysdep.h" #include #include "ansidecl.h" -#include "dis-asm.h" +#include "disassemble.h" #include "bfd.h" #include "symcat.h" #include "libiberty.h" @@ -43,36 +43,41 @@ along with this program; if not, write to the Free Software Foundation, Inc., static void print_normal (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); static void print_address - (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int); + (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; static void print_keyword - (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int); + (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); -/* -- disassembler routines inserted here */ +/* -- disassembler routines inserted here. */ /* -- dis.c */ -static void print_spr - PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned)); -static void print_hi - PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); -static void print_lo - PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static void +print_at (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long reloc_ann ATTRIBUTE_UNUSED, + long value ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + (*info->fprintf_func) (info->stream, "@"); +} static void -print_spr (cd, dis_info, names, regno, attrs) - CGEN_CPU_DESC cd; - PTR dis_info; - CGEN_KEYWORD *names; - long regno; - unsigned int attrs; +print_spr (CGEN_CPU_DESC cd, + void * dis_info, + CGEN_KEYWORD *names, + long regno, + unsigned int attrs) { /* Use the register index format for any unnamed registers. */ if (cgen_keyword_lookup_value (names, regno) == NULL) @@ -85,29 +90,25 @@ print_spr (cd, dis_info, names, regno, attrs) } static void -print_hi (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; - PTR dis_info; - long value; - unsigned int attrs ATTRIBUTE_UNUSED; - bfd_vma pc ATTRIBUTE_UNUSED; - int length ATTRIBUTE_UNUSED; +print_hi (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) { disassemble_info *info = (disassemble_info *) dis_info; - if (value) - (*info->fprintf_func) (info->stream, "0x%lx", value); - else - (*info->fprintf_func) (info->stream, "hi(0x%lx)", value); + + (*info->fprintf_func) (info->stream, value ? "0x%lx" : "hi(0x%lx)", value); } static void -print_lo (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; - PTR dis_info; - long value; - unsigned int attrs ATTRIBUTE_UNUSED; - bfd_vma pc ATTRIBUTE_UNUSED; - int length ATTRIBUTE_UNUSED; +print_lo (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) { disassemble_info *info = (disassemble_info *) dis_info; if (value) @@ -119,8 +120,7 @@ print_lo (cd, dis_info, value, attrs, pc, length) /* -- */ void frv_cgen_print_operand - PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, - void const *, bfd_vma, int)); + (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); /* Main entry point for printing operands. XINFO is a `void *' and not a `disassemble_info *' to not put a requirement @@ -138,21 +138,23 @@ void frv_cgen_print_operand the handlers. */ void -frv_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) - CGEN_CPU_DESC cd; - int opindex; - PTR xinfo; - CGEN_FIELDS *fields; - void const *attrs ATTRIBUTE_UNUSED; - bfd_vma pc; - int length; +frv_cgen_print_operand (CGEN_CPU_DESC cd, + int opindex, + void * xinfo, + CGEN_FIELDS *fields, + void const *attrs ATTRIBUTE_UNUSED, + bfd_vma pc, + int length) { - disassemble_info *info = (disassemble_info *) xinfo; + disassemble_info *info = (disassemble_info *) xinfo; switch (opindex) { - case FRV_OPERAND_A : - print_normal (cd, info, fields->f_A, 0|(1<f_A, 0, pc, length); + break; + case FRV_OPERAND_A1 : + print_normal (cd, info, fields->f_A, 0, pc, length); break; case FRV_OPERAND_ACC40SI : print_keyword (cd, info, & frv_cgen_opval_acc_names, fields->f_ACC40Si, 0); @@ -286,9 +288,27 @@ frv_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) case FRV_OPERAND_LI : print_normal (cd, info, fields->f_LI, 0, pc, length); break; + case FRV_OPERAND_LRAD : + print_normal (cd, info, fields->f_LRAD, 0, pc, length); + break; + case FRV_OPERAND_LRAE : + print_normal (cd, info, fields->f_LRAE, 0, pc, length); + break; + case FRV_OPERAND_LRAS : + print_normal (cd, info, fields->f_LRAS, 0, pc, length); + break; + case FRV_OPERAND_TLBPRL : + print_normal (cd, info, fields->f_TLBPRL, 0, pc, length); + break; + case FRV_OPERAND_TLBPROPX : + print_normal (cd, info, fields->f_TLBPRopx, 0, pc, length); + break; case FRV_OPERAND_AE : print_normal (cd, info, fields->f_ae, 0|(1<f_reloc_ann, 0, pc, length); + break; case FRV_OPERAND_CCOND : print_normal (cd, info, fields->f_ccond, 0|(1<f_label24, 0|(1<f_reloc_ann, 0, pc, length); + break; + case FRV_OPERAND_LDDANN : + print_at (cd, info, fields->f_reloc_ann, 0, pc, length); + break; case FRV_OPERAND_LOCK : print_normal (cd, info, fields->f_lock, 0|(1<print_address_func) (value, info); else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) @@ -509,12 +527,13 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) { int status = (*info->read_memory_func) (pc, buf, buflen, info); + if (status != 0) { (*info->memory_error_func) (status, pc, info); @@ -539,7 +558,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -563,7 +582,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -571,7 +590,7 @@ print_insn (CGEN_CPU_DESC cd, int length; unsigned long insn_value_cropped; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! frv_cgen_insn_supported (cd, insn)) @@ -589,7 +608,7 @@ print_insn (CGEN_CPU_DESC cd, relevant part from the buffer. */ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) - insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), info->endian == BFD_ENDIAN_BIG); else insn_value_cropped = insn_value; @@ -619,13 +638,13 @@ print_insn (CGEN_CPU_DESC cd, length = CGEN_EXTRACT_FN (cd, insn) (cd, insn, &ex_info, insn_value_cropped, &fields, pc); - /* length < 0 -> error */ + /* Length < 0 -> error. */ if (length < 0) return length; if (length > 0) { CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); - /* length is in bits, result is in bytes */ + /* Length is in bits, result is in bytes. */ return length / 8; } } @@ -647,7 +666,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; @@ -675,9 +694,10 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) Print one instruction from PC on INFO->STREAM. Return the size of the instruction (in bytes). */ -typedef struct cpu_desc_list { +typedef struct cpu_desc_list +{ struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -689,11 +709,12 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -706,7 +727,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) arch = info->arch; if (arch == bfd_arch_unknown) arch = CGEN_BFD_ARCH; - + /* There's no standard way to compute the machine or isa number so we leave it to the target. */ #ifdef CGEN_COMPUTE_MACH @@ -716,29 +737,38 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else - isa = info->insn_sets; + isa = info->private_data; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } - } + } /* If we haven't initialized yet, initialize the opcode table. */ if (! cd) @@ -750,7 +780,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = frv_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -760,10 +790,10 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) if (!cd) abort (); - /* save this away for future reference */ + /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list;