X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Ffrv-ibld.c;h=98f2f3459b8f969af9ef77372d39a6502186ddc2;hb=c5d0745b0d3edfea9e82a4b304ea1847790d72e4;hp=9fe25316009e05cc77e86a45f14107af5da9bbb1;hpb=47b0e7ad8c60ea4b45b22ad5cb376f068991bc88;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/frv-ibld.c b/opcodes/frv-ibld.c index 9fe2531600..98f2f3459b 100644 --- a/opcodes/frv-ibld.c +++ b/opcodes/frv-ibld.c @@ -1,22 +1,22 @@ +/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ /* Instruction building/extraction support for frv. -*- C -*- THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. - the resultant file is machine generated, cgen-ibld.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005 - Free Software Foundation, Inc. + Copyright (C) 1996-2017 Free Software Foundation, Inc. - This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. - This program is free software; you can redistribute it and/or modify + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., @@ -33,6 +33,7 @@ #include "symcat.h" #include "frv-desc.h" #include "frv-opc.h" +#include "cgen/basic-modes.h" #include "opintl.h" #include "safe-ctype.h" @@ -137,7 +138,7 @@ insert_normal (CGEN_CPU_DESC cd, if (length == 0) return NULL; - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); /* For architectures with insns smaller than the base-insn-bitsize, @@ -154,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, { long minval = - (1L << (length - 1)); unsigned long maxval = mask; - + if ((value > 0 && (unsigned long) value > maxval) || value < minval) { @@ -168,13 +169,21 @@ insert_normal (CGEN_CPU_DESC cd, else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) { unsigned long maxval = mask; - - if ((unsigned long) value > maxval) + unsigned long val = (unsigned long) value; + + /* For hosts with a word size > 32 check to see if value has been sign + extended beyond 32 bits. If so then ignore these higher sign bits + as the user is attempting to store a 32-bit signed value into an + unsigned 32-bit field which is allowed. */ + if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) + val &= 0xFFFFFFFF; + + if (val > maxval) { /* xgettext:c-format */ sprintf (errbuf, - _("operand out of range (%lu not between 0 and %lu)"), - value, maxval); + _("operand out of range (0x%lx not between 0 and 0x%lx)"), + val, maxval); return errbuf; } } @@ -184,7 +193,7 @@ insert_normal (CGEN_CPU_DESC cd, { long minval = - (1L << (length - 1)); long maxval = (1L << (length - 1)) - 1; - + if (value < minval || value > maxval) { sprintf @@ -199,12 +208,19 @@ insert_normal (CGEN_CPU_DESC cd, #if CGEN_INT_INSN_P { - int shift; + int shift_within_word, shift_to_word, shift; + + /* How to shift the value to BIT0 of the word. */ + shift_to_word = total_length - (word_offset + word_length); + /* How to shift the value to the field within the word. */ if (CGEN_INSN_LSB0_P) - shift = (word_offset + start + 1) - length; + shift_within_word = start + 1 - length; else - shift = total_length - (word_offset + start + length); + shift_within_word = word_length - start - length; + + /* The total SHIFT, then mask in the value. */ + shift = shift_to_word + shift_within_word; *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); } @@ -433,16 +449,15 @@ extract_normal (CGEN_CPU_DESC cd, return 1; } - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); /* For architectures with insns smaller than the insn-base-bitsize, word_length may be too big. */ if (cd->min_insn_bitsize < cd->base_insn_bitsize) { - if (word_offset == 0 - && word_length > total_length) - word_length = total_length; + if (word_offset + word_length > total_length) + word_length = total_length - word_offset; } /* Does the value reside in INSN_VALUE, and at the right alignment? */ @@ -461,7 +476,7 @@ extract_normal (CGEN_CPU_DESC cd, { unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) @@ -748,15 +763,15 @@ frv_cgen_insert_operand (CGEN_CPU_DESC cd, case FRV_OPERAND_LABEL16 : { long value = fields->f_label16; - value = ((int) (((value) - (pc))) >> (2)); + value = ((SI) (((value) - (pc))) >> (2)); errmsg = insert_normal (cd, value, 0|(1<> (20)); - FLD (f_labelL18) = ((((unsigned int) (((FLD (f_label24)) - (pc))) >> (2))) & (262143)); + FLD (f_labelH6) = ((SI) (((FLD (f_label24)) - (pc))) >> (20)); + FLD (f_labelL18) = ((((UINT) (((FLD (f_label24)) - (pc))) >> (2))) & (262143)); } errmsg = insert_normal (cd, fields->f_labelH6, 0|(1<> (6)); + FLD (f_spr_h) = ((UINT) (FLD (f_spr)) >> (6)); FLD (f_spr_l) = ((FLD (f_spr)) & (63)); } errmsg = insert_normal (cd, fields->f_spr_h, 0, 0, 30, 6, 32, total_length, buffer); @@ -816,7 +831,7 @@ frv_cgen_insert_operand (CGEN_CPU_DESC cd, case FRV_OPERAND_U12 : { { - FLD (f_u12_h) = ((int) (FLD (f_u12)) >> (6)); + FLD (f_u12_h) = ((SI) (FLD (f_u12)) >> (6)); FLD (f_u12_l) = ((FLD (f_u12)) & (63)); } errmsg = insert_normal (cd, fields->f_u12_h, 0|(1<