X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Ffrv-opc.c;h=e21bd6477656ea76408acac08b82a585a0f6b103;hb=e7cf25a8ab54cd02b48e7443ef25764475f02315;hp=d3e2b351e1a78da0b3f9d95d191793b910b42fa0;hpb=fb53f5a81a23dd5fc2eac009274e90b9753e1f22;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/frv-opc.c b/opcodes/frv-opc.c index d3e2b351e1..e21bd64776 100644 --- a/opcodes/frv-opc.c +++ b/opcodes/frv-opc.c @@ -2,23 +2,23 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2005 Free Software Foundation, Inc. +Copyright (C) 1996-2016 Free Software Foundation, Inc. This file is part of the GNU Binutils and/or GDB, the GNU debugger. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This file is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -34,6 +34,9 @@ with this program; if not, write to the Free Software Foundation, Inc., #include "elf/frv.h" #include +/* DEBUG appears below as argument of OP macro. */ +#undef DEBUG + /* Returns TRUE if {MAJOR,MACH} is a major branch of the FRV development tree. */ @@ -231,7 +234,7 @@ static CGEN_ATTR_VALUE_ENUM_TYPE fr400_unit_mapping[] = /* NIL */ UNIT_NIL, /* I0 */ UNIT_I0, /* I1 */ UNIT_I1, -/* I01 */ UNIT_I01, +/* I01 */ UNIT_I01, /* I2 */ UNIT_NIL, /* no I2 or I3 unit */ /* I3 */ UNIT_NIL, /* IALL */ UNIT_I01, /* only I0 and I1 units */ @@ -266,7 +269,7 @@ static CGEN_ATTR_VALUE_ENUM_TYPE fr450_unit_mapping[] = /* NIL */ UNIT_NIL, /* I0 */ UNIT_I0, /* I1 */ UNIT_I1, -/* I01 */ UNIT_I01, +/* I01 */ UNIT_I01, /* I2 */ UNIT_NIL, /* no I2 or I3 unit */ /* I3 */ UNIT_NIL, /* IALL */ UNIT_I01, /* only I0 and I1 units */ @@ -298,7 +301,7 @@ static CGEN_ATTR_VALUE_ENUM_TYPE fr500_unit_mapping[] = /* NIL */ UNIT_NIL, /* I0 */ UNIT_I0, /* I1 */ UNIT_I1, -/* I01 */ UNIT_I01, +/* I01 */ UNIT_I01, /* I2 */ UNIT_NIL, /* no I2 or I3 unit */ /* I3 */ UNIT_NIL, /* IALL */ UNIT_I01, /* only I0 and I1 units */ @@ -330,10 +333,10 @@ static CGEN_ATTR_VALUE_ENUM_TYPE fr550_unit_mapping[] = /* NIL */ UNIT_NIL, /* I0 */ UNIT_I0, /* I1 */ UNIT_I1, -/* I01 */ UNIT_I01, +/* I01 */ UNIT_I01, /* I2 */ UNIT_I2, /* I3 */ UNIT_I3, -/* IALL */ UNIT_IALL, +/* IALL */ UNIT_IALL, /* FM0 */ UNIT_FM0, /* FM1 */ UNIT_FM1, /* FM01 */ UNIT_FM01, @@ -795,7 +798,7 @@ check_insn_major_constraints (FRV_VLIW *vliw, int frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn) { - int index; + int slot_index; CGEN_ATTR_VALUE_ENUM_TYPE major; CGEN_ATTR_VALUE_ENUM_TYPE unit; VLIW_COMBO *new_vliw; @@ -803,8 +806,8 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn) if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn)) return 1; - index = vliw->next_slot; - if (index >= FRV_VLIW_SIZE) + slot_index = vliw->next_slot; + if (slot_index >= FRV_VLIW_SIZE) return 1; unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT); @@ -831,7 +834,7 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn) break; } - if (index <= 0) + if (slot_index <= 0) { /* Any insn can be added to slot 0. */ while (! match_unit (vliw, unit, (*vliw->current_vliw)[0])) @@ -851,8 +854,8 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn) if (new_vliw && check_insn_major_constraints (vliw, major, insn)) { vliw->current_vliw = new_vliw; - vliw->major[index] = major; - vliw->insn[index] = insn; + vliw->major[slot_index] = major; + vliw->insn[slot_index] = insn; vliw->next_slot++; return 0; } @@ -886,11 +889,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); /* Instruction formats. */ -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) #define F(f) & frv_cgen_ifld_table[FRV_##f] -#else -#define F(f) & frv_cgen_ifld_table[FRV_/**/f] -#endif static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = { 0, 0, 0x0, { { 0 } } }; @@ -1501,16 +1500,8 @@ static const CGEN_IFMT ifmt_fnop ATTRIBUTE_UNUSED = { #undef F -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) #define A(a) (1 << CGEN_INSN_##a) -#else -#define A(a) (1 << CGEN_INSN_/**/a) -#endif -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) #define OPERAND(op) FRV_OPERAND_##op -#else -#define OPERAND(op) FRV_OPERAND_/**/op -#endif #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) @@ -5989,11 +5980,7 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] = /* Formats for ALIAS macro-insns. */ -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) #define F(f) & frv_cgen_ifld_table[FRV_##f] -#else -#define F(f) & frv_cgen_ifld_table[FRV_/**/f] -#endif static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = { 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } }; @@ -6026,16 +6013,8 @@ static const CGEN_IFMT ifmt_cmov ATTRIBUTE_UNUSED = { /* Each non-simple macro entry points to an array of expansion possibilities. */ -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) #define A(a) (1 << CGEN_INSN_##a) -#else -#define A(a) (1 << CGEN_INSN_/**/a) -#endif -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) #define OPERAND(op) FRV_OPERAND_##op -#else -#define OPERAND(op) FRV_OPERAND_/**/op -#endif #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) @@ -6223,7 +6202,10 @@ frv_cgen_init_opcode_table (CGEN_CPU_DESC cd) const CGEN_OPCODE *oc = & frv_cgen_macro_insn_opcode_table[0]; CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN)); - memset (insns, 0, num_macros * sizeof (CGEN_INSN)); + /* This test has been added to avoid a warning generated + if memset is called with a third argument of value zero. */ + if (num_macros >= 1) + memset (insns, 0, num_macros * sizeof (CGEN_INSN)); for (i = 0; i < num_macros; ++i) { insns[i].base = &ib[i];