X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fhppa-dis.c;h=d9ab9dd99d506e5200204c7aa0de38eba6905513;hb=9ec878e36703a7cec6a58fb2a2980ce5ec9cb790;hp=fa34fdc757dd9cdf0893e101a428598113cbbf47;hpb=72ec28b8afa357cdde70c612b4e0e9f37a34f8e4;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/hppa-dis.c b/opcodes/hppa-dis.c index fa34fdc757..d9ab9dd99d 100644 --- a/opcodes/hppa-dis.c +++ b/opcodes/hppa-dis.c @@ -1,5 +1,6 @@ /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c. - Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc. + Copyright 1989, 1990, 1992, 1993, 1994, 1995, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. Contributed by the Center for Software Science at the University of Utah (pa-gdb-bugs@cs.utah.edu). @@ -18,7 +19,6 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include #include "sysdep.h" #include "dis-asm.h" #include "libhppa.h" @@ -43,19 +43,23 @@ static const char *const fp_reg_names[] = typedef unsigned int CORE_ADDR; -/* Get at various relevent fields of an instruction word. */ +/* Get at various relevent fields of an instruction word. */ #define MASK_5 0x1f #define MASK_10 0x3ff #define MASK_11 0x7ff #define MASK_14 0x3fff +#define MASK_16 0xffff #define MASK_21 0x1fffff -/* This macro gets bit fields using HP's numbering (MSB = 0) */ +/* These macros get bit fields using HP's numbering (MSB = 0) */ #define GET_FIELD(X, FROM, TO) \ ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) +#define GET_BIT(X, WHICH) \ + GET_FIELD (X, WHICH, WHICH) + /* Some of these have been converted to 2-d arrays because they consume less storage this way. If the maintenance becomes a problem, convert them back to const 1-d pointer arrays. */ @@ -133,13 +137,33 @@ static const char *const read_write_names[] = {",r", ",w"}; static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" }; /* For a bunch of different instructions form an index into a - completer name table. */ + completer name table. */ #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \ GET_FIELD (insn, 18, 18) << 1) #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \ (GET_FIELD ((insn), 19, 19) ? 8 : 0)) +static void fput_reg PARAMS ((unsigned int, disassemble_info *)); +static void fput_fp_reg PARAMS ((unsigned int, disassemble_info *)); +static void fput_fp_reg_r PARAMS ((unsigned int, disassemble_info *)); +static void fput_creg PARAMS ((unsigned int, disassemble_info *)); +static void fput_const PARAMS ((unsigned int, disassemble_info *)); +static int extract_3 PARAMS ((unsigned int)); +static int extract_5_load PARAMS ((unsigned int)); +static int extract_5_store PARAMS ((unsigned int)); +static unsigned extract_5r_store PARAMS ((unsigned int)); +static unsigned extract_5R_store PARAMS ((unsigned int)); +static unsigned extract_10U_store PARAMS ((unsigned int)); +static unsigned extract_5Q_store PARAMS ((unsigned int)); +static int extract_11 PARAMS ((unsigned int)); +static int extract_14 PARAMS ((unsigned int)); +static int extract_16 PARAMS ((unsigned int)); +static int extract_21 PARAMS ((unsigned int)); +static int extract_12 PARAMS ((unsigned int)); +static int extract_17 PARAMS ((unsigned int)); +static int extract_22 PARAMS ((unsigned int)); + /* Utility function to print registers. Put these first, so gcc's function inlining can do its stuff. */ @@ -182,7 +206,7 @@ fput_creg (reg, info) (*info->fprintf_func) (info->stream, control_reg[reg]); } -/* print constants with sign */ +/* Print constants with sign. */ static void fput_const (num, info) @@ -196,9 +220,9 @@ fput_const (num, info) } /* Routines to extract various sized constants out of hppa - instructions. */ + instructions. */ -/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */ +/* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */ static int extract_3 (word) unsigned word; @@ -213,7 +237,7 @@ extract_5_load (word) return low_sign_extend (word >> 16 & MASK_5, 5); } -/* extract the immediate field from a st{bhw}s instruction */ +/* Extract the immediate field from a st{bhw}s instruction. */ static int extract_5_store (word) unsigned word; @@ -221,7 +245,7 @@ extract_5_store (word) return low_sign_extend (word & MASK_5, 5); } -/* extract the immediate field from a break instruction */ +/* Extract the immediate field from a break instruction. */ static unsigned extract_5r_store (word) unsigned word; @@ -229,7 +253,7 @@ extract_5r_store (word) return (word & MASK_5); } -/* extract the immediate field from a {sr}sm instruction */ +/* Extract the immediate field from a {sr}sm instruction. */ static unsigned extract_5R_store (word) unsigned word; @@ -237,7 +261,7 @@ extract_5R_store (word) return (word >> 16 & MASK_5); } -/* extract the 10 bit immediate field from a {sr}sm instruction */ +/* Extract the 10 bit immediate field from a {sr}sm instruction. */ static unsigned extract_10U_store (word) unsigned word; @@ -245,7 +269,7 @@ extract_10U_store (word) return (word >> 16 & MASK_10); } -/* extract the immediate field from a bb instruction */ +/* Extract the immediate field from a bb instruction. */ static unsigned extract_5Q_store (word) unsigned word; @@ -253,7 +277,7 @@ extract_5Q_store (word) return (word >> 21 & MASK_5); } -/* extract an 11 bit immediate field */ +/* Extract an 11 bit immediate field. */ static int extract_11 (word) unsigned word; @@ -261,7 +285,7 @@ extract_11 (word) return low_sign_extend (word & MASK_11, 11); } -/* extract a 14 bit immediate field */ +/* Extract a 14 bit immediate field. */ static int extract_14 (word) unsigned word; @@ -269,7 +293,21 @@ extract_14 (word) return low_sign_extend (word & MASK_14, 14); } -/* extract a 21 bit constant */ +/* Extract a 16 bit immediate field (PA2.0 wide only). */ +static int +extract_16 (word) + unsigned word; +{ + int m15, m0, m1; + m0 = GET_BIT (word, 16); + m1 = GET_BIT (word, 17); + m15 = GET_BIT (word, 31); + word = (word >> 1) & 0x1fff; + word = word | (m15 << 15) | ((m15 ^ m0) << 14) | ((m15 ^ m1) << 13); + return sign_extend (word, 16); +} + +/* Extract a 21 bit constant. */ static int extract_21 (word) @@ -291,7 +329,7 @@ extract_21 (word) return sign_extend (val, 21) << 11; } -/* extract a 12 bit constant from branch instructions */ +/* Extract a 12 bit constant from branch instructions. */ static int extract_12 (word) @@ -302,8 +340,8 @@ extract_12 (word) (word & 0x1) << 11, 12) << 2; } -/* extract a 17 bit constant from branch instructions, returning the - 19 bit signed value. */ +/* Extract a 17 bit constant from branch instructions, returning the + 19 bit signed value. */ static int extract_17 (word) @@ -353,7 +391,10 @@ print_insn_hppa (memaddr, info) if ((insn & opcode->mask) == opcode->match) { register const char *s; - +#ifndef BFD64 + if (opcode->arch == pa20w) + continue; +#endif (*info->fprintf_func) (info->stream, "%s", opcode->name); if (!strchr ("cfCY?-+nHNZFIuv", opcode->args[0])) @@ -474,13 +515,25 @@ print_insn_hppa (memaddr, info) fput_fp_reg (reg, info); break; } + + /* 'fe' will not generate a space before the register + name. Normally that is fine. Except that it + causes problems with fstw fe,y(b) which has no FP + format completer. */ + case 'E': + fputs_filtered (" ", info); + + /* FALLTHRU */ + case 'e': - if (GET_FIELD (insn, 25, 25)) + if (GET_FIELD (insn, 30, 30)) fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); else fput_fp_reg (GET_FIELD (insn, 11, 15), info); break; - + case 'x': + fput_fp_reg (GET_FIELD (insn, 11, 15), info); + break; } break; @@ -501,17 +554,29 @@ print_insn_hppa (memaddr, info) switch (*++s) { case 'x': + (*info->fprintf_func) (info->stream, "%s", + index_compl_names[GET_COMPL (insn)]); + break; + case 'X': (*info->fprintf_func) (info->stream, "%s ", index_compl_names[GET_COMPL (insn)]); break; case 'm': + (*info->fprintf_func) (info->stream, "%s", + short_ldst_compl_names[GET_COMPL (insn)]); + break; + case 'M': (*info->fprintf_func) (info->stream, "%s ", short_ldst_compl_names[GET_COMPL (insn)]); break; - case 's': + case 'A': (*info->fprintf_func) (info->stream, "%s ", short_bytes_compl_names[GET_COMPL (insn)]); break; + case 's': + (*info->fprintf_func) (info->stream, "%s", + short_bytes_compl_names[GET_COMPL (insn)]); + break; case 'c': case 'C': switch (GET_FIELD (insn, 20, 21)) @@ -633,7 +698,7 @@ print_insn_hppa (memaddr, info) break; case 'H': (*info->fprintf_func) - (info->stream, "%s", saturation_names[GET_FIELD + (info->stream, "%s ", saturation_names[GET_FIELD (insn, 24, 25)]); break; case '*': @@ -661,9 +726,9 @@ print_insn_hppa (memaddr, info) case 'J': { - int opcode = GET_FIELD (insn, 0, 5); + int opc = GET_FIELD (insn, 0, 5); - if (opcode == 0x16 || opcode == 0x1e) + if (opc == 0x16 || opc == 0x1e) { if (GET_FIELD (insn, 29, 29) == 0) fputs_filtered (",ma ", info); @@ -677,16 +742,16 @@ print_insn_hppa (memaddr, info) case 'e': { - int opcode = GET_FIELD (insn, 0, 5); + int opc = GET_FIELD (insn, 0, 5); - if (opcode == 0x13 || opcode == 0x1b) + if (opc == 0x13 || opc == 0x1b) { if (GET_FIELD (insn, 18, 18) == 1) fputs_filtered (",mb ", info); else fputs_filtered (",ma ", info); } - else if (opcode == 0x17 || opcode == 0x1f) + else if (opc == 0x17 || opc == 0x1f) { if (GET_FIELD (insn, 31, 31) == 1) fputs_filtered (",ma ", info); @@ -836,6 +901,11 @@ print_insn_hppa (memaddr, info) case 'k': fput_const (extract_21 (insn), info); break; + case '<': + case 'l': + /* 16-bit long disp., PA2.0 wide only. */ + fput_const (extract_16 (insn), info); + break; case 'n': if (insn & 0x2) (*info->fprintf_func) (info->stream, ",n "); @@ -1042,6 +1112,25 @@ print_insn_hppa (memaddr, info) break; } + case '>': + case 'y': + { + /* 16-bit long disp., PA2.0 wide only. */ + int disp = extract_16 (insn); + disp &= ~3; + fput_const (disp, info); + break; + } + + case '&': + { + /* 16-bit long disp., PA2.0 wide only. */ + int disp = extract_16 (insn); + disp &= ~7; + fput_const (disp, info); + break; + } + /* ?!? FIXME */ case '_': case '{':