X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fi386-dis.c;h=f2def134cef8635bca73286cc7d3850e149e2f03;hb=645ea3ea629261e7e66127db1438f64019fd5d08;hp=b8e65c3b39e81da0adad929259703fe71c088faa;hpb=47cf8fa0432ada88fe13435adfa67fb02629a571;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index b8e65c3b39..f2def134ce 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1,6 +1,6 @@ /* Print i386 instructions for GDB, the GNU debugger. Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -91,6 +91,7 @@ static void OP_M (int, int); static void OP_VEX (int, int); static void OP_EX_Vex (int, int); static void OP_EX_VexW (int, int); +static void OP_EX_VexImmW (int, int); static void OP_XMM_Vex (int, int); static void OP_XMM_VexW (int, int); static void OP_REG_VexI4 (int, int); @@ -113,7 +114,6 @@ static void CRC32_Fixup (int, int); static void FXSAVE_Fixup (int, int); static void OP_LWPCB_E (int, int); static void OP_LWP_E (int, int); -static void OP_LWP_I (int, int); static void OP_Vex_2src_1 (int, int); static void OP_Vex_2src_2 (int, int); @@ -253,6 +253,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Ib { OP_I, b_mode } #define sIb { OP_sI, b_mode } /* sign extened byte */ #define Iv { OP_I, v_mode } +#define sIv { OP_sI, v_mode } #define Iq { OP_I, q_mode } #define Iv64 { OP_I64, v_mode } #define Iw { OP_I, w_mode } @@ -281,7 +282,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define RMrSI { OP_REG, rSI_reg } #define RMrDI { OP_REG, rDI_reg } #define RMAL { OP_REG, al_reg } -#define RMAL { OP_REG, al_reg } #define RMCL { OP_REG, cl_reg } #define RMDL { OP_REG, dl_reg } #define RMBL { OP_REG, bl_reg } @@ -334,6 +334,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define MX { OP_MMX, 0 } #define XM { OP_XMM, 0 } +#define XMScalar { OP_XMM, scalar_mode } #define XMM { OP_XMM, xmm_mode } #define EM { OP_EM, v_mode } #define EMS { OP_EM, v_swap_mode } @@ -341,8 +342,11 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EMx { OP_EM, x_mode } #define EXw { OP_EX, w_mode } #define EXd { OP_EX, d_mode } +#define EXdScalar { OP_EX, d_scalar_mode } #define EXdS { OP_EX, d_swap_mode } #define EXq { OP_EX, q_mode } +#define EXqScalar { OP_EX, q_scalar_mode } +#define EXqScalarS { OP_EX, q_scalar_swap_mode } #define EXqS { OP_EX, q_swap_mode } #define EXx { OP_EX, x_mode } #define EXxS { OP_EX, x_swap_mode } @@ -350,6 +354,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EXxmmq { OP_EX, xmmq_mode } #define EXymmq { OP_EX, ymmq_mode } #define EXVexWdq { OP_EX, vex_w_dq_mode } +#define EXVexWdqScalar { OP_EX, vex_scalar_w_dq_mode } #define MS { OP_MS, v_mode } #define XS { OP_XS, v_mode } #define EMCq { OP_EMC, q_mode } @@ -362,17 +367,22 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Vex_2src_2 { OP_Vex_2src_2, 0 } #define Vex { OP_VEX, vex_mode } +#define VexScalar { OP_VEX, vex_scalar_mode } #define Vex128 { OP_VEX, vex128_mode } #define Vex256 { OP_VEX, vex256_mode } #define VexI4 { VEXI4_Fixup, 0} #define EXdVex { OP_EX_Vex, d_mode } #define EXdVexS { OP_EX_Vex, d_swap_mode } +#define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode } #define EXqVex { OP_EX_Vex, q_mode } #define EXqVexS { OP_EX_Vex, q_swap_mode } +#define EXqVexScalarS { OP_EX_Vex, q_scalar_swap_mode } #define EXVexW { OP_EX_VexW, x_mode } #define EXdVexW { OP_EX_VexW, d_mode } #define EXqVexW { OP_EX_VexW, q_mode } +#define EXVexImmW { OP_EX_VexImmW, x_mode } #define XMVex { OP_XMM_Vex, 0 } +#define XMVexScalar { OP_XMM_Vex, scalar_mode } #define XMVexW { OP_XMM_VexW, 0 } #define XMVexI4 { OP_REG_VexI4, x_mode } #define PCLMUL { PCLMUL_Fixup, 0 } @@ -461,6 +471,21 @@ enum /* operand size depends on the VEX.W bit. */ vex_w_dq_mode, + /* scalar, ignore vector length. */ + scalar_mode, + /* like d_mode, ignore vector length. */ + d_scalar_mode, + /* like d_swap_mode, ignore vector length. */ + d_scalar_swap_mode, + /* like q_mode, ignore vector length. */ + q_scalar_mode, + /* like q_swap_mode, ignore vector length. */ + q_scalar_swap_mode, + /* like vex_mode, ignore vector length. */ + vex_scalar_mode, + /* like vex_w_dq_mode, ignore vector length. */ + vex_scalar_w_dq_mode, + es_reg, cs_reg, ss_reg, @@ -569,10 +594,10 @@ enum REG_0FAE, REG_0FBA, REG_0FC7, - REG_VEX_71, - REG_VEX_72, - REG_VEX_73, - REG_VEX_AE, + REG_VEX_0F71, + REG_VEX_0F72, + REG_VEX_0F73, + REG_VEX_0FAE, REG_XOP_LWPCB, REG_XOP_LWP }; @@ -634,35 +659,35 @@ enum MOD_62_32BIT, MOD_C4_32BIT, MOD_C5_32BIT, - MOD_VEX_12_PREFIX_0, - MOD_VEX_13, - MOD_VEX_16_PREFIX_0, - MOD_VEX_17, - MOD_VEX_2B, - MOD_VEX_50, - MOD_VEX_71_REG_2, - MOD_VEX_71_REG_4, - MOD_VEX_71_REG_6, - MOD_VEX_72_REG_2, - MOD_VEX_72_REG_4, - MOD_VEX_72_REG_6, - MOD_VEX_73_REG_2, - MOD_VEX_73_REG_3, - MOD_VEX_73_REG_6, - MOD_VEX_73_REG_7, - MOD_VEX_AE_REG_2, - MOD_VEX_AE_REG_3, - MOD_VEX_D7_PREFIX_2, - MOD_VEX_E7_PREFIX_2, - MOD_VEX_F0_PREFIX_3, - MOD_VEX_3818_PREFIX_2, - MOD_VEX_3819_PREFIX_2, - MOD_VEX_381A_PREFIX_2, - MOD_VEX_382A_PREFIX_2, - MOD_VEX_382C_PREFIX_2, - MOD_VEX_382D_PREFIX_2, - MOD_VEX_382E_PREFIX_2, - MOD_VEX_382F_PREFIX_2 + MOD_VEX_0F12_PREFIX_0, + MOD_VEX_0F13, + MOD_VEX_0F16_PREFIX_0, + MOD_VEX_0F17, + MOD_VEX_0F2B, + MOD_VEX_0F50, + MOD_VEX_0F71_REG_2, + MOD_VEX_0F71_REG_4, + MOD_VEX_0F71_REG_6, + MOD_VEX_0F72_REG_2, + MOD_VEX_0F72_REG_4, + MOD_VEX_0F72_REG_6, + MOD_VEX_0F73_REG_2, + MOD_VEX_0F73_REG_3, + MOD_VEX_0F73_REG_6, + MOD_VEX_0F73_REG_7, + MOD_VEX_0FAE_REG_2, + MOD_VEX_0FAE_REG_3, + MOD_VEX_0FD7_PREFIX_2, + MOD_VEX_0FE7_PREFIX_2, + MOD_VEX_0FF0_PREFIX_3, + MOD_VEX_0F3818_PREFIX_2, + MOD_VEX_0F3819_PREFIX_2, + MOD_VEX_0F381A_PREFIX_2, + MOD_VEX_0F382A_PREFIX_2, + MOD_VEX_0F382C_PREFIX_2, + MOD_VEX_0F382D_PREFIX_2, + MOD_VEX_0F382E_PREFIX_2, + MOD_VEX_0F382F_PREFIX_2 }; enum @@ -716,6 +741,10 @@ enum PREFIX_0F7D, PREFIX_0F7E, PREFIX_0F7F, + PREFIX_0FAE_REG_0, + PREFIX_0FAE_REG_1, + PREFIX_0FAE_REG_2, + PREFIX_0FAE_REG_3, PREFIX_0FB8, PREFIX_0FBD, PREFIX_0FC2, @@ -790,252 +819,256 @@ enum PREFIX_0F3A62, PREFIX_0F3A63, PREFIX_0F3ADF, - PREFIX_VEX_10, - PREFIX_VEX_11, - PREFIX_VEX_12, - PREFIX_VEX_16, - PREFIX_VEX_2A, - PREFIX_VEX_2C, - PREFIX_VEX_2D, - PREFIX_VEX_2E, - PREFIX_VEX_2F, - PREFIX_VEX_51, - PREFIX_VEX_52, - PREFIX_VEX_53, - PREFIX_VEX_58, - PREFIX_VEX_59, - PREFIX_VEX_5A, - PREFIX_VEX_5B, - PREFIX_VEX_5C, - PREFIX_VEX_5D, - PREFIX_VEX_5E, - PREFIX_VEX_5F, - PREFIX_VEX_60, - PREFIX_VEX_61, - PREFIX_VEX_62, - PREFIX_VEX_63, - PREFIX_VEX_64, - PREFIX_VEX_65, - PREFIX_VEX_66, - PREFIX_VEX_67, - PREFIX_VEX_68, - PREFIX_VEX_69, - PREFIX_VEX_6A, - PREFIX_VEX_6B, - PREFIX_VEX_6C, - PREFIX_VEX_6D, - PREFIX_VEX_6E, - PREFIX_VEX_6F, - PREFIX_VEX_70, - PREFIX_VEX_71_REG_2, - PREFIX_VEX_71_REG_4, - PREFIX_VEX_71_REG_6, - PREFIX_VEX_72_REG_2, - PREFIX_VEX_72_REG_4, - PREFIX_VEX_72_REG_6, - PREFIX_VEX_73_REG_2, - PREFIX_VEX_73_REG_3, - PREFIX_VEX_73_REG_6, - PREFIX_VEX_73_REG_7, - PREFIX_VEX_74, - PREFIX_VEX_75, - PREFIX_VEX_76, - PREFIX_VEX_77, - PREFIX_VEX_7C, - PREFIX_VEX_7D, - PREFIX_VEX_7E, - PREFIX_VEX_7F, - PREFIX_VEX_C2, - PREFIX_VEX_C4, - PREFIX_VEX_C5, - PREFIX_VEX_D0, - PREFIX_VEX_D1, - PREFIX_VEX_D2, - PREFIX_VEX_D3, - PREFIX_VEX_D4, - PREFIX_VEX_D5, - PREFIX_VEX_D6, - PREFIX_VEX_D7, - PREFIX_VEX_D8, - PREFIX_VEX_D9, - PREFIX_VEX_DA, - PREFIX_VEX_DB, - PREFIX_VEX_DC, - PREFIX_VEX_DD, - PREFIX_VEX_DE, - PREFIX_VEX_DF, - PREFIX_VEX_E0, - PREFIX_VEX_E1, - PREFIX_VEX_E2, - PREFIX_VEX_E3, - PREFIX_VEX_E4, - PREFIX_VEX_E5, - PREFIX_VEX_E6, - PREFIX_VEX_E7, - PREFIX_VEX_E8, - PREFIX_VEX_E9, - PREFIX_VEX_EA, - PREFIX_VEX_EB, - PREFIX_VEX_EC, - PREFIX_VEX_ED, - PREFIX_VEX_EE, - PREFIX_VEX_EF, - PREFIX_VEX_F0, - PREFIX_VEX_F1, - PREFIX_VEX_F2, - PREFIX_VEX_F3, - PREFIX_VEX_F4, - PREFIX_VEX_F5, - PREFIX_VEX_F6, - PREFIX_VEX_F7, - PREFIX_VEX_F8, - PREFIX_VEX_F9, - PREFIX_VEX_FA, - PREFIX_VEX_FB, - PREFIX_VEX_FC, - PREFIX_VEX_FD, - PREFIX_VEX_FE, - PREFIX_VEX_3800, - PREFIX_VEX_3801, - PREFIX_VEX_3802, - PREFIX_VEX_3803, - PREFIX_VEX_3804, - PREFIX_VEX_3805, - PREFIX_VEX_3806, - PREFIX_VEX_3807, - PREFIX_VEX_3808, - PREFIX_VEX_3809, - PREFIX_VEX_380A, - PREFIX_VEX_380B, - PREFIX_VEX_380C, - PREFIX_VEX_380D, - PREFIX_VEX_380E, - PREFIX_VEX_380F, - PREFIX_VEX_3817, - PREFIX_VEX_3818, - PREFIX_VEX_3819, - PREFIX_VEX_381A, - PREFIX_VEX_381C, - PREFIX_VEX_381D, - PREFIX_VEX_381E, - PREFIX_VEX_3820, - PREFIX_VEX_3821, - PREFIX_VEX_3822, - PREFIX_VEX_3823, - PREFIX_VEX_3824, - PREFIX_VEX_3825, - PREFIX_VEX_3828, - PREFIX_VEX_3829, - PREFIX_VEX_382A, - PREFIX_VEX_382B, - PREFIX_VEX_382C, - PREFIX_VEX_382D, - PREFIX_VEX_382E, - PREFIX_VEX_382F, - PREFIX_VEX_3830, - PREFIX_VEX_3831, - PREFIX_VEX_3832, - PREFIX_VEX_3833, - PREFIX_VEX_3834, - PREFIX_VEX_3835, - PREFIX_VEX_3837, - PREFIX_VEX_3838, - PREFIX_VEX_3839, - PREFIX_VEX_383A, - PREFIX_VEX_383B, - PREFIX_VEX_383C, - PREFIX_VEX_383D, - PREFIX_VEX_383E, - PREFIX_VEX_383F, - PREFIX_VEX_3840, - PREFIX_VEX_3841, - PREFIX_VEX_3896, - PREFIX_VEX_3897, - PREFIX_VEX_3898, - PREFIX_VEX_3899, - PREFIX_VEX_389A, - PREFIX_VEX_389B, - PREFIX_VEX_389C, - PREFIX_VEX_389D, - PREFIX_VEX_389E, - PREFIX_VEX_389F, - PREFIX_VEX_38A6, - PREFIX_VEX_38A7, - PREFIX_VEX_38A8, - PREFIX_VEX_38A9, - PREFIX_VEX_38AA, - PREFIX_VEX_38AB, - PREFIX_VEX_38AC, - PREFIX_VEX_38AD, - PREFIX_VEX_38AE, - PREFIX_VEX_38AF, - PREFIX_VEX_38B6, - PREFIX_VEX_38B7, - PREFIX_VEX_38B8, - PREFIX_VEX_38B9, - PREFIX_VEX_38BA, - PREFIX_VEX_38BB, - PREFIX_VEX_38BC, - PREFIX_VEX_38BD, - PREFIX_VEX_38BE, - PREFIX_VEX_38BF, - PREFIX_VEX_38DB, - PREFIX_VEX_38DC, - PREFIX_VEX_38DD, - PREFIX_VEX_38DE, - PREFIX_VEX_38DF, - PREFIX_VEX_3A04, - PREFIX_VEX_3A05, - PREFIX_VEX_3A06, - PREFIX_VEX_3A08, - PREFIX_VEX_3A09, - PREFIX_VEX_3A0A, - PREFIX_VEX_3A0B, - PREFIX_VEX_3A0C, - PREFIX_VEX_3A0D, - PREFIX_VEX_3A0E, - PREFIX_VEX_3A0F, - PREFIX_VEX_3A14, - PREFIX_VEX_3A15, - PREFIX_VEX_3A16, - PREFIX_VEX_3A17, - PREFIX_VEX_3A18, - PREFIX_VEX_3A19, - PREFIX_VEX_3A20, - PREFIX_VEX_3A21, - PREFIX_VEX_3A22, - PREFIX_VEX_3A40, - PREFIX_VEX_3A41, - PREFIX_VEX_3A42, - PREFIX_VEX_3A44, - PREFIX_VEX_3A4A, - PREFIX_VEX_3A4B, - PREFIX_VEX_3A4C, - PREFIX_VEX_3A5C, - PREFIX_VEX_3A5D, - PREFIX_VEX_3A5E, - PREFIX_VEX_3A5F, - PREFIX_VEX_3A60, - PREFIX_VEX_3A61, - PREFIX_VEX_3A62, - PREFIX_VEX_3A63, - PREFIX_VEX_3A68, - PREFIX_VEX_3A69, - PREFIX_VEX_3A6A, - PREFIX_VEX_3A6B, - PREFIX_VEX_3A6C, - PREFIX_VEX_3A6D, - PREFIX_VEX_3A6E, - PREFIX_VEX_3A6F, - PREFIX_VEX_3A78, - PREFIX_VEX_3A79, - PREFIX_VEX_3A7A, - PREFIX_VEX_3A7B, - PREFIX_VEX_3A7C, - PREFIX_VEX_3A7D, - PREFIX_VEX_3A7E, - PREFIX_VEX_3A7F, - PREFIX_VEX_3ADF + PREFIX_VEX_0F10, + PREFIX_VEX_0F11, + PREFIX_VEX_0F12, + PREFIX_VEX_0F16, + PREFIX_VEX_0F2A, + PREFIX_VEX_0F2C, + PREFIX_VEX_0F2D, + PREFIX_VEX_0F2E, + PREFIX_VEX_0F2F, + PREFIX_VEX_0F51, + PREFIX_VEX_0F52, + PREFIX_VEX_0F53, + PREFIX_VEX_0F58, + PREFIX_VEX_0F59, + PREFIX_VEX_0F5A, + PREFIX_VEX_0F5B, + PREFIX_VEX_0F5C, + PREFIX_VEX_0F5D, + PREFIX_VEX_0F5E, + PREFIX_VEX_0F5F, + PREFIX_VEX_0F60, + PREFIX_VEX_0F61, + PREFIX_VEX_0F62, + PREFIX_VEX_0F63, + PREFIX_VEX_0F64, + PREFIX_VEX_0F65, + PREFIX_VEX_0F66, + PREFIX_VEX_0F67, + PREFIX_VEX_0F68, + PREFIX_VEX_0F69, + PREFIX_VEX_0F6A, + PREFIX_VEX_0F6B, + PREFIX_VEX_0F6C, + PREFIX_VEX_0F6D, + PREFIX_VEX_0F6E, + PREFIX_VEX_0F6F, + PREFIX_VEX_0F70, + PREFIX_VEX_0F71_REG_2, + PREFIX_VEX_0F71_REG_4, + PREFIX_VEX_0F71_REG_6, + PREFIX_VEX_0F72_REG_2, + PREFIX_VEX_0F72_REG_4, + PREFIX_VEX_0F72_REG_6, + PREFIX_VEX_0F73_REG_2, + PREFIX_VEX_0F73_REG_3, + PREFIX_VEX_0F73_REG_6, + PREFIX_VEX_0F73_REG_7, + PREFIX_VEX_0F74, + PREFIX_VEX_0F75, + PREFIX_VEX_0F76, + PREFIX_VEX_0F77, + PREFIX_VEX_0F7C, + PREFIX_VEX_0F7D, + PREFIX_VEX_0F7E, + PREFIX_VEX_0F7F, + PREFIX_VEX_0FC2, + PREFIX_VEX_0FC4, + PREFIX_VEX_0FC5, + PREFIX_VEX_0FD0, + PREFIX_VEX_0FD1, + PREFIX_VEX_0FD2, + PREFIX_VEX_0FD3, + PREFIX_VEX_0FD4, + PREFIX_VEX_0FD5, + PREFIX_VEX_0FD6, + PREFIX_VEX_0FD7, + PREFIX_VEX_0FD8, + PREFIX_VEX_0FD9, + PREFIX_VEX_0FDA, + PREFIX_VEX_0FDB, + PREFIX_VEX_0FDC, + PREFIX_VEX_0FDD, + PREFIX_VEX_0FDE, + PREFIX_VEX_0FDF, + PREFIX_VEX_0FE0, + PREFIX_VEX_0FE1, + PREFIX_VEX_0FE2, + PREFIX_VEX_0FE3, + PREFIX_VEX_0FE4, + PREFIX_VEX_0FE5, + PREFIX_VEX_0FE6, + PREFIX_VEX_0FE7, + PREFIX_VEX_0FE8, + PREFIX_VEX_0FE9, + PREFIX_VEX_0FEA, + PREFIX_VEX_0FEB, + PREFIX_VEX_0FEC, + PREFIX_VEX_0FED, + PREFIX_VEX_0FEE, + PREFIX_VEX_0FEF, + PREFIX_VEX_0FF0, + PREFIX_VEX_0FF1, + PREFIX_VEX_0FF2, + PREFIX_VEX_0FF3, + PREFIX_VEX_0FF4, + PREFIX_VEX_0FF5, + PREFIX_VEX_0FF6, + PREFIX_VEX_0FF7, + PREFIX_VEX_0FF8, + PREFIX_VEX_0FF9, + PREFIX_VEX_0FFA, + PREFIX_VEX_0FFB, + PREFIX_VEX_0FFC, + PREFIX_VEX_0FFD, + PREFIX_VEX_0FFE, + PREFIX_VEX_0F3800, + PREFIX_VEX_0F3801, + PREFIX_VEX_0F3802, + PREFIX_VEX_0F3803, + PREFIX_VEX_0F3804, + PREFIX_VEX_0F3805, + PREFIX_VEX_0F3806, + PREFIX_VEX_0F3807, + PREFIX_VEX_0F3808, + PREFIX_VEX_0F3809, + PREFIX_VEX_0F380A, + PREFIX_VEX_0F380B, + PREFIX_VEX_0F380C, + PREFIX_VEX_0F380D, + PREFIX_VEX_0F380E, + PREFIX_VEX_0F380F, + PREFIX_VEX_0F3813, + PREFIX_VEX_0F3817, + PREFIX_VEX_0F3818, + PREFIX_VEX_0F3819, + PREFIX_VEX_0F381A, + PREFIX_VEX_0F381C, + PREFIX_VEX_0F381D, + PREFIX_VEX_0F381E, + PREFIX_VEX_0F3820, + PREFIX_VEX_0F3821, + PREFIX_VEX_0F3822, + PREFIX_VEX_0F3823, + PREFIX_VEX_0F3824, + PREFIX_VEX_0F3825, + PREFIX_VEX_0F3828, + PREFIX_VEX_0F3829, + PREFIX_VEX_0F382A, + PREFIX_VEX_0F382B, + PREFIX_VEX_0F382C, + PREFIX_VEX_0F382D, + PREFIX_VEX_0F382E, + PREFIX_VEX_0F382F, + PREFIX_VEX_0F3830, + PREFIX_VEX_0F3831, + PREFIX_VEX_0F3832, + PREFIX_VEX_0F3833, + PREFIX_VEX_0F3834, + PREFIX_VEX_0F3835, + PREFIX_VEX_0F3837, + PREFIX_VEX_0F3838, + PREFIX_VEX_0F3839, + PREFIX_VEX_0F383A, + PREFIX_VEX_0F383B, + PREFIX_VEX_0F383C, + PREFIX_VEX_0F383D, + PREFIX_VEX_0F383E, + PREFIX_VEX_0F383F, + PREFIX_VEX_0F3840, + PREFIX_VEX_0F3841, + PREFIX_VEX_0F3896, + PREFIX_VEX_0F3897, + PREFIX_VEX_0F3898, + PREFIX_VEX_0F3899, + PREFIX_VEX_0F389A, + PREFIX_VEX_0F389B, + PREFIX_VEX_0F389C, + PREFIX_VEX_0F389D, + PREFIX_VEX_0F389E, + PREFIX_VEX_0F389F, + PREFIX_VEX_0F38A6, + PREFIX_VEX_0F38A7, + PREFIX_VEX_0F38A8, + PREFIX_VEX_0F38A9, + PREFIX_VEX_0F38AA, + PREFIX_VEX_0F38AB, + PREFIX_VEX_0F38AC, + PREFIX_VEX_0F38AD, + PREFIX_VEX_0F38AE, + PREFIX_VEX_0F38AF, + PREFIX_VEX_0F38B6, + PREFIX_VEX_0F38B7, + PREFIX_VEX_0F38B8, + PREFIX_VEX_0F38B9, + PREFIX_VEX_0F38BA, + PREFIX_VEX_0F38BB, + PREFIX_VEX_0F38BC, + PREFIX_VEX_0F38BD, + PREFIX_VEX_0F38BE, + PREFIX_VEX_0F38BF, + PREFIX_VEX_0F38DB, + PREFIX_VEX_0F38DC, + PREFIX_VEX_0F38DD, + PREFIX_VEX_0F38DE, + PREFIX_VEX_0F38DF, + PREFIX_VEX_0F3A04, + PREFIX_VEX_0F3A05, + PREFIX_VEX_0F3A06, + PREFIX_VEX_0F3A08, + PREFIX_VEX_0F3A09, + PREFIX_VEX_0F3A0A, + PREFIX_VEX_0F3A0B, + PREFIX_VEX_0F3A0C, + PREFIX_VEX_0F3A0D, + PREFIX_VEX_0F3A0E, + PREFIX_VEX_0F3A0F, + PREFIX_VEX_0F3A14, + PREFIX_VEX_0F3A15, + PREFIX_VEX_0F3A16, + PREFIX_VEX_0F3A17, + PREFIX_VEX_0F3A18, + PREFIX_VEX_0F3A19, + PREFIX_VEX_0F3A1D, + PREFIX_VEX_0F3A20, + PREFIX_VEX_0F3A21, + PREFIX_VEX_0F3A22, + PREFIX_VEX_0F3A40, + PREFIX_VEX_0F3A41, + PREFIX_VEX_0F3A42, + PREFIX_VEX_0F3A44, + PREFIX_VEX_0F3A48, + PREFIX_VEX_0F3A49, + PREFIX_VEX_0F3A4A, + PREFIX_VEX_0F3A4B, + PREFIX_VEX_0F3A4C, + PREFIX_VEX_0F3A5C, + PREFIX_VEX_0F3A5D, + PREFIX_VEX_0F3A5E, + PREFIX_VEX_0F3A5F, + PREFIX_VEX_0F3A60, + PREFIX_VEX_0F3A61, + PREFIX_VEX_0F3A62, + PREFIX_VEX_0F3A63, + PREFIX_VEX_0F3A68, + PREFIX_VEX_0F3A69, + PREFIX_VEX_0F3A6A, + PREFIX_VEX_0F3A6B, + PREFIX_VEX_0F3A6C, + PREFIX_VEX_0F3A6D, + PREFIX_VEX_0F3A6E, + PREFIX_VEX_0F3A6F, + PREFIX_VEX_0F3A78, + PREFIX_VEX_0F3A79, + PREFIX_VEX_0F3A7A, + PREFIX_VEX_0F3A7B, + PREFIX_VEX_0F3A7C, + PREFIX_VEX_0F3A7D, + PREFIX_VEX_0F3A7E, + PREFIX_VEX_0F3A7F, + PREFIX_VEX_0F3ADF }; enum @@ -1093,467 +1126,469 @@ enum enum { - VEX_LEN_10_P_1 = 0, - VEX_LEN_10_P_3, - VEX_LEN_11_P_1, - VEX_LEN_11_P_3, - VEX_LEN_12_P_0_M_0, - VEX_LEN_12_P_0_M_1, - VEX_LEN_12_P_2, - VEX_LEN_13_M_0, - VEX_LEN_16_P_0_M_0, - VEX_LEN_16_P_0_M_1, - VEX_LEN_16_P_2, - VEX_LEN_17_M_0, - VEX_LEN_2A_P_1, - VEX_LEN_2A_P_3, - VEX_LEN_2C_P_1, - VEX_LEN_2C_P_3, - VEX_LEN_2D_P_1, - VEX_LEN_2D_P_3, - VEX_LEN_2E_P_0, - VEX_LEN_2E_P_2, - VEX_LEN_2F_P_0, - VEX_LEN_2F_P_2, - VEX_LEN_51_P_1, - VEX_LEN_51_P_3, - VEX_LEN_52_P_1, - VEX_LEN_53_P_1, - VEX_LEN_58_P_1, - VEX_LEN_58_P_3, - VEX_LEN_59_P_1, - VEX_LEN_59_P_3, - VEX_LEN_5A_P_1, - VEX_LEN_5A_P_3, - VEX_LEN_5C_P_1, - VEX_LEN_5C_P_3, - VEX_LEN_5D_P_1, - VEX_LEN_5D_P_3, - VEX_LEN_5E_P_1, - VEX_LEN_5E_P_3, - VEX_LEN_5F_P_1, - VEX_LEN_5F_P_3, - VEX_LEN_60_P_2, - VEX_LEN_61_P_2, - VEX_LEN_62_P_2, - VEX_LEN_63_P_2, - VEX_LEN_64_P_2, - VEX_LEN_65_P_2, - VEX_LEN_66_P_2, - VEX_LEN_67_P_2, - VEX_LEN_68_P_2, - VEX_LEN_69_P_2, - VEX_LEN_6A_P_2, - VEX_LEN_6B_P_2, - VEX_LEN_6C_P_2, - VEX_LEN_6D_P_2, - VEX_LEN_6E_P_2, - VEX_LEN_70_P_1, - VEX_LEN_70_P_2, - VEX_LEN_70_P_3, - VEX_LEN_71_R_2_P_2, - VEX_LEN_71_R_4_P_2, - VEX_LEN_71_R_6_P_2, - VEX_LEN_72_R_2_P_2, - VEX_LEN_72_R_4_P_2, - VEX_LEN_72_R_6_P_2, - VEX_LEN_73_R_2_P_2, - VEX_LEN_73_R_3_P_2, - VEX_LEN_73_R_6_P_2, - VEX_LEN_73_R_7_P_2, - VEX_LEN_74_P_2, - VEX_LEN_75_P_2, - VEX_LEN_76_P_2, - VEX_LEN_7E_P_1, - VEX_LEN_7E_P_2, - VEX_LEN_AE_R_2_M_0, - VEX_LEN_AE_R_3_M_0, - VEX_LEN_C2_P_1, - VEX_LEN_C2_P_3, - VEX_LEN_C4_P_2, - VEX_LEN_C5_P_2, - VEX_LEN_D1_P_2, - VEX_LEN_D2_P_2, - VEX_LEN_D3_P_2, - VEX_LEN_D4_P_2, - VEX_LEN_D5_P_2, - VEX_LEN_D6_P_2, - VEX_LEN_D7_P_2_M_1, - VEX_LEN_D8_P_2, - VEX_LEN_D9_P_2, - VEX_LEN_DA_P_2, - VEX_LEN_DB_P_2, - VEX_LEN_DC_P_2, - VEX_LEN_DD_P_2, - VEX_LEN_DE_P_2, - VEX_LEN_DF_P_2, - VEX_LEN_E0_P_2, - VEX_LEN_E1_P_2, - VEX_LEN_E2_P_2, - VEX_LEN_E3_P_2, - VEX_LEN_E4_P_2, - VEX_LEN_E5_P_2, - VEX_LEN_E8_P_2, - VEX_LEN_E9_P_2, - VEX_LEN_EA_P_2, - VEX_LEN_EB_P_2, - VEX_LEN_EC_P_2, - VEX_LEN_ED_P_2, - VEX_LEN_EE_P_2, - VEX_LEN_EF_P_2, - VEX_LEN_F1_P_2, - VEX_LEN_F2_P_2, - VEX_LEN_F3_P_2, - VEX_LEN_F4_P_2, - VEX_LEN_F5_P_2, - VEX_LEN_F6_P_2, - VEX_LEN_F7_P_2, - VEX_LEN_F8_P_2, - VEX_LEN_F9_P_2, - VEX_LEN_FA_P_2, - VEX_LEN_FB_P_2, - VEX_LEN_FC_P_2, - VEX_LEN_FD_P_2, - VEX_LEN_FE_P_2, - VEX_LEN_3800_P_2, - VEX_LEN_3801_P_2, - VEX_LEN_3802_P_2, - VEX_LEN_3803_P_2, - VEX_LEN_3804_P_2, - VEX_LEN_3805_P_2, - VEX_LEN_3806_P_2, - VEX_LEN_3807_P_2, - VEX_LEN_3808_P_2, - VEX_LEN_3809_P_2, - VEX_LEN_380A_P_2, - VEX_LEN_380B_P_2, - VEX_LEN_3819_P_2_M_0, - VEX_LEN_381A_P_2_M_0, - VEX_LEN_381C_P_2, - VEX_LEN_381D_P_2, - VEX_LEN_381E_P_2, - VEX_LEN_3820_P_2, - VEX_LEN_3821_P_2, - VEX_LEN_3822_P_2, - VEX_LEN_3823_P_2, - VEX_LEN_3824_P_2, - VEX_LEN_3825_P_2, - VEX_LEN_3828_P_2, - VEX_LEN_3829_P_2, - VEX_LEN_382A_P_2_M_0, - VEX_LEN_382B_P_2, - VEX_LEN_3830_P_2, - VEX_LEN_3831_P_2, - VEX_LEN_3832_P_2, - VEX_LEN_3833_P_2, - VEX_LEN_3834_P_2, - VEX_LEN_3835_P_2, - VEX_LEN_3837_P_2, - VEX_LEN_3838_P_2, - VEX_LEN_3839_P_2, - VEX_LEN_383A_P_2, - VEX_LEN_383B_P_2, - VEX_LEN_383C_P_2, - VEX_LEN_383D_P_2, - VEX_LEN_383E_P_2, - VEX_LEN_383F_P_2, - VEX_LEN_3840_P_2, - VEX_LEN_3841_P_2, - VEX_LEN_38DB_P_2, - VEX_LEN_38DC_P_2, - VEX_LEN_38DD_P_2, - VEX_LEN_38DE_P_2, - VEX_LEN_38DF_P_2, - VEX_LEN_3A06_P_2, - VEX_LEN_3A0A_P_2, - VEX_LEN_3A0B_P_2, - VEX_LEN_3A0E_P_2, - VEX_LEN_3A0F_P_2, - VEX_LEN_3A14_P_2, - VEX_LEN_3A15_P_2, - VEX_LEN_3A16_P_2, - VEX_LEN_3A17_P_2, - VEX_LEN_3A18_P_2, - VEX_LEN_3A19_P_2, - VEX_LEN_3A20_P_2, - VEX_LEN_3A21_P_2, - VEX_LEN_3A22_P_2, - VEX_LEN_3A41_P_2, - VEX_LEN_3A42_P_2, - VEX_LEN_3A44_P_2, - VEX_LEN_3A4C_P_2, - VEX_LEN_3A60_P_2, - VEX_LEN_3A61_P_2, - VEX_LEN_3A62_P_2, - VEX_LEN_3A63_P_2, - VEX_LEN_3A6A_P_2, - VEX_LEN_3A6B_P_2, - VEX_LEN_3A6E_P_2, - VEX_LEN_3A6F_P_2, - VEX_LEN_3A7A_P_2, - VEX_LEN_3A7B_P_2, - VEX_LEN_3A7E_P_2, - VEX_LEN_3A7F_P_2, - VEX_LEN_3ADF_P_2, - VEX_LEN_XOP_09_80, - VEX_LEN_XOP_09_81 + VEX_LEN_0F10_P_1 = 0, + VEX_LEN_0F10_P_3, + VEX_LEN_0F11_P_1, + VEX_LEN_0F11_P_3, + VEX_LEN_0F12_P_0_M_0, + VEX_LEN_0F12_P_0_M_1, + VEX_LEN_0F12_P_2, + VEX_LEN_0F13_M_0, + VEX_LEN_0F16_P_0_M_0, + VEX_LEN_0F16_P_0_M_1, + VEX_LEN_0F16_P_2, + VEX_LEN_0F17_M_0, + VEX_LEN_0F2A_P_1, + VEX_LEN_0F2A_P_3, + VEX_LEN_0F2C_P_1, + VEX_LEN_0F2C_P_3, + VEX_LEN_0F2D_P_1, + VEX_LEN_0F2D_P_3, + VEX_LEN_0F2E_P_0, + VEX_LEN_0F2E_P_2, + VEX_LEN_0F2F_P_0, + VEX_LEN_0F2F_P_2, + VEX_LEN_0F51_P_1, + VEX_LEN_0F51_P_3, + VEX_LEN_0F52_P_1, + VEX_LEN_0F53_P_1, + VEX_LEN_0F58_P_1, + VEX_LEN_0F58_P_3, + VEX_LEN_0F59_P_1, + VEX_LEN_0F59_P_3, + VEX_LEN_0F5A_P_1, + VEX_LEN_0F5A_P_3, + VEX_LEN_0F5C_P_1, + VEX_LEN_0F5C_P_3, + VEX_LEN_0F5D_P_1, + VEX_LEN_0F5D_P_3, + VEX_LEN_0F5E_P_1, + VEX_LEN_0F5E_P_3, + VEX_LEN_0F5F_P_1, + VEX_LEN_0F5F_P_3, + VEX_LEN_0F60_P_2, + VEX_LEN_0F61_P_2, + VEX_LEN_0F62_P_2, + VEX_LEN_0F63_P_2, + VEX_LEN_0F64_P_2, + VEX_LEN_0F65_P_2, + VEX_LEN_0F66_P_2, + VEX_LEN_0F67_P_2, + VEX_LEN_0F68_P_2, + VEX_LEN_0F69_P_2, + VEX_LEN_0F6A_P_2, + VEX_LEN_0F6B_P_2, + VEX_LEN_0F6C_P_2, + VEX_LEN_0F6D_P_2, + VEX_LEN_0F6E_P_2, + VEX_LEN_0F70_P_1, + VEX_LEN_0F70_P_2, + VEX_LEN_0F70_P_3, + VEX_LEN_0F71_R_2_P_2, + VEX_LEN_0F71_R_4_P_2, + VEX_LEN_0F71_R_6_P_2, + VEX_LEN_0F72_R_2_P_2, + VEX_LEN_0F72_R_4_P_2, + VEX_LEN_0F72_R_6_P_2, + VEX_LEN_0F73_R_2_P_2, + VEX_LEN_0F73_R_3_P_2, + VEX_LEN_0F73_R_6_P_2, + VEX_LEN_0F73_R_7_P_2, + VEX_LEN_0F74_P_2, + VEX_LEN_0F75_P_2, + VEX_LEN_0F76_P_2, + VEX_LEN_0F7E_P_1, + VEX_LEN_0F7E_P_2, + VEX_LEN_0FAE_R_2_M_0, + VEX_LEN_0FAE_R_3_M_0, + VEX_LEN_0FC2_P_1, + VEX_LEN_0FC2_P_3, + VEX_LEN_0FC4_P_2, + VEX_LEN_0FC5_P_2, + VEX_LEN_0FD1_P_2, + VEX_LEN_0FD2_P_2, + VEX_LEN_0FD3_P_2, + VEX_LEN_0FD4_P_2, + VEX_LEN_0FD5_P_2, + VEX_LEN_0FD6_P_2, + VEX_LEN_0FD7_P_2_M_1, + VEX_LEN_0FD8_P_2, + VEX_LEN_0FD9_P_2, + VEX_LEN_0FDA_P_2, + VEX_LEN_0FDB_P_2, + VEX_LEN_0FDC_P_2, + VEX_LEN_0FDD_P_2, + VEX_LEN_0FDE_P_2, + VEX_LEN_0FDF_P_2, + VEX_LEN_0FE0_P_2, + VEX_LEN_0FE1_P_2, + VEX_LEN_0FE2_P_2, + VEX_LEN_0FE3_P_2, + VEX_LEN_0FE4_P_2, + VEX_LEN_0FE5_P_2, + VEX_LEN_0FE8_P_2, + VEX_LEN_0FE9_P_2, + VEX_LEN_0FEA_P_2, + VEX_LEN_0FEB_P_2, + VEX_LEN_0FEC_P_2, + VEX_LEN_0FED_P_2, + VEX_LEN_0FEE_P_2, + VEX_LEN_0FEF_P_2, + VEX_LEN_0FF1_P_2, + VEX_LEN_0FF2_P_2, + VEX_LEN_0FF3_P_2, + VEX_LEN_0FF4_P_2, + VEX_LEN_0FF5_P_2, + VEX_LEN_0FF6_P_2, + VEX_LEN_0FF7_P_2, + VEX_LEN_0FF8_P_2, + VEX_LEN_0FF9_P_2, + VEX_LEN_0FFA_P_2, + VEX_LEN_0FFB_P_2, + VEX_LEN_0FFC_P_2, + VEX_LEN_0FFD_P_2, + VEX_LEN_0FFE_P_2, + VEX_LEN_0F3800_P_2, + VEX_LEN_0F3801_P_2, + VEX_LEN_0F3802_P_2, + VEX_LEN_0F3803_P_2, + VEX_LEN_0F3804_P_2, + VEX_LEN_0F3805_P_2, + VEX_LEN_0F3806_P_2, + VEX_LEN_0F3807_P_2, + VEX_LEN_0F3808_P_2, + VEX_LEN_0F3809_P_2, + VEX_LEN_0F380A_P_2, + VEX_LEN_0F380B_P_2, + VEX_LEN_0F3819_P_2_M_0, + VEX_LEN_0F381A_P_2_M_0, + VEX_LEN_0F381C_P_2, + VEX_LEN_0F381D_P_2, + VEX_LEN_0F381E_P_2, + VEX_LEN_0F3820_P_2, + VEX_LEN_0F3821_P_2, + VEX_LEN_0F3822_P_2, + VEX_LEN_0F3823_P_2, + VEX_LEN_0F3824_P_2, + VEX_LEN_0F3825_P_2, + VEX_LEN_0F3828_P_2, + VEX_LEN_0F3829_P_2, + VEX_LEN_0F382A_P_2_M_0, + VEX_LEN_0F382B_P_2, + VEX_LEN_0F3830_P_2, + VEX_LEN_0F3831_P_2, + VEX_LEN_0F3832_P_2, + VEX_LEN_0F3833_P_2, + VEX_LEN_0F3834_P_2, + VEX_LEN_0F3835_P_2, + VEX_LEN_0F3837_P_2, + VEX_LEN_0F3838_P_2, + VEX_LEN_0F3839_P_2, + VEX_LEN_0F383A_P_2, + VEX_LEN_0F383B_P_2, + VEX_LEN_0F383C_P_2, + VEX_LEN_0F383D_P_2, + VEX_LEN_0F383E_P_2, + VEX_LEN_0F383F_P_2, + VEX_LEN_0F3840_P_2, + VEX_LEN_0F3841_P_2, + VEX_LEN_0F38DB_P_2, + VEX_LEN_0F38DC_P_2, + VEX_LEN_0F38DD_P_2, + VEX_LEN_0F38DE_P_2, + VEX_LEN_0F38DF_P_2, + VEX_LEN_0F3A06_P_2, + VEX_LEN_0F3A0A_P_2, + VEX_LEN_0F3A0B_P_2, + VEX_LEN_0F3A0E_P_2, + VEX_LEN_0F3A0F_P_2, + VEX_LEN_0F3A14_P_2, + VEX_LEN_0F3A15_P_2, + VEX_LEN_0F3A16_P_2, + VEX_LEN_0F3A17_P_2, + VEX_LEN_0F3A18_P_2, + VEX_LEN_0F3A19_P_2, + VEX_LEN_0F3A20_P_2, + VEX_LEN_0F3A21_P_2, + VEX_LEN_0F3A22_P_2, + VEX_LEN_0F3A41_P_2, + VEX_LEN_0F3A42_P_2, + VEX_LEN_0F3A44_P_2, + VEX_LEN_0F3A4C_P_2, + VEX_LEN_0F3A60_P_2, + VEX_LEN_0F3A61_P_2, + VEX_LEN_0F3A62_P_2, + VEX_LEN_0F3A63_P_2, + VEX_LEN_0F3A6A_P_2, + VEX_LEN_0F3A6B_P_2, + VEX_LEN_0F3A6E_P_2, + VEX_LEN_0F3A6F_P_2, + VEX_LEN_0F3A7A_P_2, + VEX_LEN_0F3A7B_P_2, + VEX_LEN_0F3A7E_P_2, + VEX_LEN_0F3A7F_P_2, + VEX_LEN_0F3ADF_P_2, + VEX_LEN_0FXOP_09_80, + VEX_LEN_0FXOP_09_81 }; enum { - VEX_W_10_P_0 = 0, - VEX_W_10_P_1, - VEX_W_10_P_2, - VEX_W_10_P_3, - VEX_W_11_P_0, - VEX_W_11_P_1, - VEX_W_11_P_2, - VEX_W_11_P_3, - VEX_W_12_P_0_M_0, - VEX_W_12_P_0_M_1, - VEX_W_12_P_1, - VEX_W_12_P_2, - VEX_W_12_P_3, - VEX_W_13_M_0, - VEX_W_14, - VEX_W_15, - VEX_W_16_P_0_M_0, - VEX_W_16_P_0_M_1, - VEX_W_16_P_1, - VEX_W_16_P_2, - VEX_W_17_M_0, - VEX_W_28, - VEX_W_29, - VEX_W_2B_M_0, - VEX_W_2E_P_0, - VEX_W_2E_P_2, - VEX_W_2F_P_0, - VEX_W_2F_P_2, - VEX_W_50_M_0, - VEX_W_51_P_0, - VEX_W_51_P_1, - VEX_W_51_P_2, - VEX_W_51_P_3, - VEX_W_52_P_0, - VEX_W_52_P_1, - VEX_W_53_P_0, - VEX_W_53_P_1, - VEX_W_58_P_0, - VEX_W_58_P_1, - VEX_W_58_P_2, - VEX_W_58_P_3, - VEX_W_59_P_0, - VEX_W_59_P_1, - VEX_W_59_P_2, - VEX_W_59_P_3, - VEX_W_5A_P_0, - VEX_W_5A_P_1, - VEX_W_5A_P_3, - VEX_W_5B_P_0, - VEX_W_5B_P_1, - VEX_W_5B_P_2, - VEX_W_5C_P_0, - VEX_W_5C_P_1, - VEX_W_5C_P_2, - VEX_W_5C_P_3, - VEX_W_5D_P_0, - VEX_W_5D_P_1, - VEX_W_5D_P_2, - VEX_W_5D_P_3, - VEX_W_5E_P_0, - VEX_W_5E_P_1, - VEX_W_5E_P_2, - VEX_W_5E_P_3, - VEX_W_5F_P_0, - VEX_W_5F_P_1, - VEX_W_5F_P_2, - VEX_W_5F_P_3, - VEX_W_60_P_2, - VEX_W_61_P_2, - VEX_W_62_P_2, - VEX_W_63_P_2, - VEX_W_64_P_2, - VEX_W_65_P_2, - VEX_W_66_P_2, - VEX_W_67_P_2, - VEX_W_68_P_2, - VEX_W_69_P_2, - VEX_W_6A_P_2, - VEX_W_6B_P_2, - VEX_W_6C_P_2, - VEX_W_6D_P_2, - VEX_W_6F_P_1, - VEX_W_6F_P_2, - VEX_W_70_P_1, - VEX_W_70_P_2, - VEX_W_70_P_3, - VEX_W_71_R_2_P_2, - VEX_W_71_R_4_P_2, - VEX_W_71_R_6_P_2, - VEX_W_72_R_2_P_2, - VEX_W_72_R_4_P_2, - VEX_W_72_R_6_P_2, - VEX_W_73_R_2_P_2, - VEX_W_73_R_3_P_2, - VEX_W_73_R_6_P_2, - VEX_W_73_R_7_P_2, - VEX_W_74_P_2, - VEX_W_75_P_2, - VEX_W_76_P_2, - VEX_W_77_P_0, - VEX_W_7C_P_2, - VEX_W_7C_P_3, - VEX_W_7D_P_2, - VEX_W_7D_P_3, - VEX_W_7E_P_1, - VEX_W_7F_P_1, - VEX_W_7F_P_2, - VEX_W_AE_R_2_M_0, - VEX_W_AE_R_3_M_0, - VEX_W_C2_P_0, - VEX_W_C2_P_1, - VEX_W_C2_P_2, - VEX_W_C2_P_3, - VEX_W_C4_P_2, - VEX_W_C5_P_2, - VEX_W_D0_P_2, - VEX_W_D0_P_3, - VEX_W_D1_P_2, - VEX_W_D2_P_2, - VEX_W_D3_P_2, - VEX_W_D4_P_2, - VEX_W_D5_P_2, - VEX_W_D6_P_2, - VEX_W_D7_P_2_M_1, - VEX_W_D8_P_2, - VEX_W_D9_P_2, - VEX_W_DA_P_2, - VEX_W_DB_P_2, - VEX_W_DC_P_2, - VEX_W_DD_P_2, - VEX_W_DE_P_2, - VEX_W_DF_P_2, - VEX_W_E0_P_2, - VEX_W_E1_P_2, - VEX_W_E2_P_2, - VEX_W_E3_P_2, - VEX_W_E4_P_2, - VEX_W_E5_P_2, - VEX_W_E6_P_1, - VEX_W_E6_P_2, - VEX_W_E6_P_3, - VEX_W_E7_P_2_M_0, - VEX_W_E8_P_2, - VEX_W_E9_P_2, - VEX_W_EA_P_2, - VEX_W_EB_P_2, - VEX_W_EC_P_2, - VEX_W_ED_P_2, - VEX_W_EE_P_2, - VEX_W_EF_P_2, - VEX_W_F0_P_3_M_0, - VEX_W_F1_P_2, - VEX_W_F2_P_2, - VEX_W_F3_P_2, - VEX_W_F4_P_2, - VEX_W_F5_P_2, - VEX_W_F6_P_2, - VEX_W_F7_P_2, - VEX_W_F8_P_2, - VEX_W_F9_P_2, - VEX_W_FA_P_2, - VEX_W_FB_P_2, - VEX_W_FC_P_2, - VEX_W_FD_P_2, - VEX_W_FE_P_2, - VEX_W_3800_P_2, - VEX_W_3801_P_2, - VEX_W_3802_P_2, - VEX_W_3803_P_2, - VEX_W_3804_P_2, - VEX_W_3805_P_2, - VEX_W_3806_P_2, - VEX_W_3807_P_2, - VEX_W_3808_P_2, - VEX_W_3809_P_2, - VEX_W_380A_P_2, - VEX_W_380B_P_2, - VEX_W_380C_P_2, - VEX_W_380D_P_2, - VEX_W_380E_P_2, - VEX_W_380F_P_2, - VEX_W_3817_P_2, - VEX_W_3818_P_2_M_0, - VEX_W_3819_P_2_M_0, - VEX_W_381A_P_2_M_0, - VEX_W_381C_P_2, - VEX_W_381D_P_2, - VEX_W_381E_P_2, - VEX_W_3820_P_2, - VEX_W_3821_P_2, - VEX_W_3822_P_2, - VEX_W_3823_P_2, - VEX_W_3824_P_2, - VEX_W_3825_P_2, - VEX_W_3828_P_2, - VEX_W_3829_P_2, - VEX_W_382A_P_2_M_0, - VEX_W_382B_P_2, - VEX_W_382C_P_2_M_0, - VEX_W_382D_P_2_M_0, - VEX_W_382E_P_2_M_0, - VEX_W_382F_P_2_M_0, - VEX_W_3830_P_2, - VEX_W_3831_P_2, - VEX_W_3832_P_2, - VEX_W_3833_P_2, - VEX_W_3834_P_2, - VEX_W_3835_P_2, - VEX_W_3837_P_2, - VEX_W_3838_P_2, - VEX_W_3839_P_2, - VEX_W_383A_P_2, - VEX_W_383B_P_2, - VEX_W_383C_P_2, - VEX_W_383D_P_2, - VEX_W_383E_P_2, - VEX_W_383F_P_2, - VEX_W_3840_P_2, - VEX_W_3841_P_2, - VEX_W_38DB_P_2, - VEX_W_38DC_P_2, - VEX_W_38DD_P_2, - VEX_W_38DE_P_2, - VEX_W_38DF_P_2, - VEX_W_3A04_P_2, - VEX_W_3A05_P_2, - VEX_W_3A06_P_2, - VEX_W_3A08_P_2, - VEX_W_3A09_P_2, - VEX_W_3A0A_P_2, - VEX_W_3A0B_P_2, - VEX_W_3A0C_P_2, - VEX_W_3A0D_P_2, - VEX_W_3A0E_P_2, - VEX_W_3A0F_P_2, - VEX_W_3A14_P_2, - VEX_W_3A15_P_2, - VEX_W_3A18_P_2, - VEX_W_3A19_P_2, - VEX_W_3A20_P_2, - VEX_W_3A21_P_2, - VEX_W_3A40_P_2, - VEX_W_3A41_P_2, - VEX_W_3A42_P_2, - VEX_W_3A44_P_2, - VEX_W_3A4A_P_2, - VEX_W_3A4B_P_2, - VEX_W_3A4C_P_2, - VEX_W_3A60_P_2, - VEX_W_3A61_P_2, - VEX_W_3A62_P_2, - VEX_W_3A63_P_2, - VEX_W_3ADF_P_2 + VEX_W_0F10_P_0 = 0, + VEX_W_0F10_P_1, + VEX_W_0F10_P_2, + VEX_W_0F10_P_3, + VEX_W_0F11_P_0, + VEX_W_0F11_P_1, + VEX_W_0F11_P_2, + VEX_W_0F11_P_3, + VEX_W_0F12_P_0_M_0, + VEX_W_0F12_P_0_M_1, + VEX_W_0F12_P_1, + VEX_W_0F12_P_2, + VEX_W_0F12_P_3, + VEX_W_0F13_M_0, + VEX_W_0F14, + VEX_W_0F15, + VEX_W_0F16_P_0_M_0, + VEX_W_0F16_P_0_M_1, + VEX_W_0F16_P_1, + VEX_W_0F16_P_2, + VEX_W_0F17_M_0, + VEX_W_0F28, + VEX_W_0F29, + VEX_W_0F2B_M_0, + VEX_W_0F2E_P_0, + VEX_W_0F2E_P_2, + VEX_W_0F2F_P_0, + VEX_W_0F2F_P_2, + VEX_W_0F50_M_0, + VEX_W_0F51_P_0, + VEX_W_0F51_P_1, + VEX_W_0F51_P_2, + VEX_W_0F51_P_3, + VEX_W_0F52_P_0, + VEX_W_0F52_P_1, + VEX_W_0F53_P_0, + VEX_W_0F53_P_1, + VEX_W_0F58_P_0, + VEX_W_0F58_P_1, + VEX_W_0F58_P_2, + VEX_W_0F58_P_3, + VEX_W_0F59_P_0, + VEX_W_0F59_P_1, + VEX_W_0F59_P_2, + VEX_W_0F59_P_3, + VEX_W_0F5A_P_0, + VEX_W_0F5A_P_1, + VEX_W_0F5A_P_3, + VEX_W_0F5B_P_0, + VEX_W_0F5B_P_1, + VEX_W_0F5B_P_2, + VEX_W_0F5C_P_0, + VEX_W_0F5C_P_1, + VEX_W_0F5C_P_2, + VEX_W_0F5C_P_3, + VEX_W_0F5D_P_0, + VEX_W_0F5D_P_1, + VEX_W_0F5D_P_2, + VEX_W_0F5D_P_3, + VEX_W_0F5E_P_0, + VEX_W_0F5E_P_1, + VEX_W_0F5E_P_2, + VEX_W_0F5E_P_3, + VEX_W_0F5F_P_0, + VEX_W_0F5F_P_1, + VEX_W_0F5F_P_2, + VEX_W_0F5F_P_3, + VEX_W_0F60_P_2, + VEX_W_0F61_P_2, + VEX_W_0F62_P_2, + VEX_W_0F63_P_2, + VEX_W_0F64_P_2, + VEX_W_0F65_P_2, + VEX_W_0F66_P_2, + VEX_W_0F67_P_2, + VEX_W_0F68_P_2, + VEX_W_0F69_P_2, + VEX_W_0F6A_P_2, + VEX_W_0F6B_P_2, + VEX_W_0F6C_P_2, + VEX_W_0F6D_P_2, + VEX_W_0F6F_P_1, + VEX_W_0F6F_P_2, + VEX_W_0F70_P_1, + VEX_W_0F70_P_2, + VEX_W_0F70_P_3, + VEX_W_0F71_R_2_P_2, + VEX_W_0F71_R_4_P_2, + VEX_W_0F71_R_6_P_2, + VEX_W_0F72_R_2_P_2, + VEX_W_0F72_R_4_P_2, + VEX_W_0F72_R_6_P_2, + VEX_W_0F73_R_2_P_2, + VEX_W_0F73_R_3_P_2, + VEX_W_0F73_R_6_P_2, + VEX_W_0F73_R_7_P_2, + VEX_W_0F74_P_2, + VEX_W_0F75_P_2, + VEX_W_0F76_P_2, + VEX_W_0F77_P_0, + VEX_W_0F7C_P_2, + VEX_W_0F7C_P_3, + VEX_W_0F7D_P_2, + VEX_W_0F7D_P_3, + VEX_W_0F7E_P_1, + VEX_W_0F7F_P_1, + VEX_W_0F7F_P_2, + VEX_W_0FAE_R_2_M_0, + VEX_W_0FAE_R_3_M_0, + VEX_W_0FC2_P_0, + VEX_W_0FC2_P_1, + VEX_W_0FC2_P_2, + VEX_W_0FC2_P_3, + VEX_W_0FC4_P_2, + VEX_W_0FC5_P_2, + VEX_W_0FD0_P_2, + VEX_W_0FD0_P_3, + VEX_W_0FD1_P_2, + VEX_W_0FD2_P_2, + VEX_W_0FD3_P_2, + VEX_W_0FD4_P_2, + VEX_W_0FD5_P_2, + VEX_W_0FD6_P_2, + VEX_W_0FD7_P_2_M_1, + VEX_W_0FD8_P_2, + VEX_W_0FD9_P_2, + VEX_W_0FDA_P_2, + VEX_W_0FDB_P_2, + VEX_W_0FDC_P_2, + VEX_W_0FDD_P_2, + VEX_W_0FDE_P_2, + VEX_W_0FDF_P_2, + VEX_W_0FE0_P_2, + VEX_W_0FE1_P_2, + VEX_W_0FE2_P_2, + VEX_W_0FE3_P_2, + VEX_W_0FE4_P_2, + VEX_W_0FE5_P_2, + VEX_W_0FE6_P_1, + VEX_W_0FE6_P_2, + VEX_W_0FE6_P_3, + VEX_W_0FE7_P_2_M_0, + VEX_W_0FE8_P_2, + VEX_W_0FE9_P_2, + VEX_W_0FEA_P_2, + VEX_W_0FEB_P_2, + VEX_W_0FEC_P_2, + VEX_W_0FED_P_2, + VEX_W_0FEE_P_2, + VEX_W_0FEF_P_2, + VEX_W_0FF0_P_3_M_0, + VEX_W_0FF1_P_2, + VEX_W_0FF2_P_2, + VEX_W_0FF3_P_2, + VEX_W_0FF4_P_2, + VEX_W_0FF5_P_2, + VEX_W_0FF6_P_2, + VEX_W_0FF7_P_2, + VEX_W_0FF8_P_2, + VEX_W_0FF9_P_2, + VEX_W_0FFA_P_2, + VEX_W_0FFB_P_2, + VEX_W_0FFC_P_2, + VEX_W_0FFD_P_2, + VEX_W_0FFE_P_2, + VEX_W_0F3800_P_2, + VEX_W_0F3801_P_2, + VEX_W_0F3802_P_2, + VEX_W_0F3803_P_2, + VEX_W_0F3804_P_2, + VEX_W_0F3805_P_2, + VEX_W_0F3806_P_2, + VEX_W_0F3807_P_2, + VEX_W_0F3808_P_2, + VEX_W_0F3809_P_2, + VEX_W_0F380A_P_2, + VEX_W_0F380B_P_2, + VEX_W_0F380C_P_2, + VEX_W_0F380D_P_2, + VEX_W_0F380E_P_2, + VEX_W_0F380F_P_2, + VEX_W_0F3817_P_2, + VEX_W_0F3818_P_2_M_0, + VEX_W_0F3819_P_2_M_0, + VEX_W_0F381A_P_2_M_0, + VEX_W_0F381C_P_2, + VEX_W_0F381D_P_2, + VEX_W_0F381E_P_2, + VEX_W_0F3820_P_2, + VEX_W_0F3821_P_2, + VEX_W_0F3822_P_2, + VEX_W_0F3823_P_2, + VEX_W_0F3824_P_2, + VEX_W_0F3825_P_2, + VEX_W_0F3828_P_2, + VEX_W_0F3829_P_2, + VEX_W_0F382A_P_2_M_0, + VEX_W_0F382B_P_2, + VEX_W_0F382C_P_2_M_0, + VEX_W_0F382D_P_2_M_0, + VEX_W_0F382E_P_2_M_0, + VEX_W_0F382F_P_2_M_0, + VEX_W_0F3830_P_2, + VEX_W_0F3831_P_2, + VEX_W_0F3832_P_2, + VEX_W_0F3833_P_2, + VEX_W_0F3834_P_2, + VEX_W_0F3835_P_2, + VEX_W_0F3837_P_2, + VEX_W_0F3838_P_2, + VEX_W_0F3839_P_2, + VEX_W_0F383A_P_2, + VEX_W_0F383B_P_2, + VEX_W_0F383C_P_2, + VEX_W_0F383D_P_2, + VEX_W_0F383E_P_2, + VEX_W_0F383F_P_2, + VEX_W_0F3840_P_2, + VEX_W_0F3841_P_2, + VEX_W_0F38DB_P_2, + VEX_W_0F38DC_P_2, + VEX_W_0F38DD_P_2, + VEX_W_0F38DE_P_2, + VEX_W_0F38DF_P_2, + VEX_W_0F3A04_P_2, + VEX_W_0F3A05_P_2, + VEX_W_0F3A06_P_2, + VEX_W_0F3A08_P_2, + VEX_W_0F3A09_P_2, + VEX_W_0F3A0A_P_2, + VEX_W_0F3A0B_P_2, + VEX_W_0F3A0C_P_2, + VEX_W_0F3A0D_P_2, + VEX_W_0F3A0E_P_2, + VEX_W_0F3A0F_P_2, + VEX_W_0F3A14_P_2, + VEX_W_0F3A15_P_2, + VEX_W_0F3A18_P_2, + VEX_W_0F3A19_P_2, + VEX_W_0F3A20_P_2, + VEX_W_0F3A21_P_2, + VEX_W_0F3A40_P_2, + VEX_W_0F3A41_P_2, + VEX_W_0F3A42_P_2, + VEX_W_0F3A44_P_2, + VEX_W_0F3A48_P_2, + VEX_W_0F3A49_P_2, + VEX_W_0F3A4A_P_2, + VEX_W_0F3A4B_P_2, + VEX_W_0F3A4C_P_2, + VEX_W_0F3A60_P_2, + VEX_W_0F3A61_P_2, + VEX_W_0F3A62_P_2, + VEX_W_0F3A63_P_2, + VEX_W_0F3ADF_P_2 }; typedef void (*op_rtn) (int bytemode, int sizeflag); @@ -1738,7 +1773,7 @@ static const struct dis386 dis386[] = { { Bad_Opcode }, /* op size prefix */ { Bad_Opcode }, /* adr size prefix */ /* 68 */ - { "pushT", { Iq } }, + { "pushT", { sIv } }, { "imulS", { Gv, Ev, Iv } }, { "pushT", { sIb } }, { "imulS", { Gv, Ev, sIb } }, @@ -1924,7 +1959,7 @@ static const struct dis386 dis386_twobyte[] = { { "invd", { XX } }, { "wbinvd", { XX } }, { Bad_Opcode }, - { "ud2a", { XX } }, + { "ud2", { XX } }, { Bad_Opcode }, { REG_TABLE (REG_0F0D) }, { "femms", { XX } }, @@ -2120,7 +2155,7 @@ static const struct dis386 dis386_twobyte[] = { { "movz{wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */ /* b8 */ { PREFIX_TABLE (PREFIX_0FB8) }, - { "ud2b", { XX } }, + { "ud1", { XX } }, { REG_TABLE (REG_0FBA) }, { "btcS", { Ev, Gv } }, { "bsfS", { Gv, Ev } }, @@ -2274,6 +2309,13 @@ static struct } modrm; static unsigned char need_modrm; +static struct + { + int scale; + int index; + int base; + } +sib; static struct { int register_specifier; @@ -2549,10 +2591,10 @@ static const struct dis386 reg_table[][8] = { { { "incQ", { Ev } }, { "decQ", { Ev } }, - { "callT", { indirEv } }, - { "JcallT", { indirEp } }, - { "jmpT", { indirEv } }, - { "JjmpT", { indirEp } }, + { "call{T|}", { indirEv } }, + { "Jcall{T|}", { indirEp } }, + { "jmp{T|}", { indirEv } }, + { "Jjmp{T|}", { indirEp } }, { "pushU", { stackEv } }, { Bad_Opcode }, }, @@ -2580,8 +2622,8 @@ static const struct dis386 reg_table[][8] = { }, /* REG_0F0D */ { - { "prefetch", { Eb } }, - { "prefetchw", { Eb } }, + { "prefetch", { Mb } }, + { "prefetchw", { Mb } }, }, /* REG_0F18 */ { @@ -2669,43 +2711,43 @@ static const struct dis386 reg_table[][8] = { { MOD_TABLE (MOD_0FC7_REG_6) }, { MOD_TABLE (MOD_0FC7_REG_7) }, }, - /* REG_VEX_71 */ + /* REG_VEX_0F71 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_71_REG_2) }, + { MOD_TABLE (MOD_VEX_0F71_REG_2) }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_71_REG_4) }, + { MOD_TABLE (MOD_VEX_0F71_REG_4) }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_71_REG_6) }, + { MOD_TABLE (MOD_VEX_0F71_REG_6) }, }, - /* REG_VEX_72 */ + /* REG_VEX_0F72 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_72_REG_2) }, + { MOD_TABLE (MOD_VEX_0F72_REG_2) }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_72_REG_4) }, + { MOD_TABLE (MOD_VEX_0F72_REG_4) }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_72_REG_6) }, + { MOD_TABLE (MOD_VEX_0F72_REG_6) }, }, - /* REG_VEX_73 */ + /* REG_VEX_0F73 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_73_REG_2) }, - { MOD_TABLE (MOD_VEX_73_REG_3) }, + { MOD_TABLE (MOD_VEX_0F73_REG_2) }, + { MOD_TABLE (MOD_VEX_0F73_REG_3) }, { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_73_REG_6) }, - { MOD_TABLE (MOD_VEX_73_REG_7) }, + { MOD_TABLE (MOD_VEX_0F73_REG_6) }, + { MOD_TABLE (MOD_VEX_0F73_REG_7) }, }, - /* REG_VEX_AE */ + /* REG_VEX_0FAE */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_AE_REG_2) }, - { MOD_TABLE (MOD_VEX_AE_REG_3) }, + { MOD_TABLE (MOD_VEX_0FAE_REG_2) }, + { MOD_TABLE (MOD_VEX_0FAE_REG_3) }, }, /* REG_XOP_LWPCB */ { @@ -2714,8 +2756,8 @@ static const struct dis386 reg_table[][8] = { }, /* REG_XOP_LWP */ { - { "lwpins", { { OP_LWP_E, 0 }, Ed, { OP_LWP_I, 0 } } }, - { "lwpval", { { OP_LWP_E, 0 }, Ed, { OP_LWP_I, 0 } } }, + { "lwpins", { { OP_LWP_E, 0 }, Ed, Iq } }, + { "lwpval", { { OP_LWP_E, 0 }, Ed, Iq } }, }, }; @@ -2997,6 +3039,30 @@ static const struct dis386 prefix_table[][4] = { { "movdqa", { EXxS, XM } }, }, + /* PREFIX_0FAE_REG_0 */ + { + { Bad_Opcode }, + { "rdfsbase", { Ev } }, + }, + + /* PREFIX_0FAE_REG_1 */ + { + { Bad_Opcode }, + { "rdgsbase", { Ev } }, + }, + + /* PREFIX_0FAE_REG_2 */ + { + { Bad_Opcode }, + { "wrfsbase", { Ev } }, + }, + + /* PREFIX_0FAE_REG_3 */ + { + { Bad_Opcode }, + { "wrgsbase", { Ev } }, + }, + /* PREFIX_0FB8 */ { { Bad_Opcode }, @@ -3519,1208 +3585,1214 @@ static const struct dis386 prefix_table[][4] = { { "aeskeygenassist", { XM, EXx, Ib } }, }, - /* PREFIX_VEX_10 */ + /* PREFIX_VEX_0F10 */ { - { VEX_W_TABLE (VEX_W_10_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_10_P_1) }, - { VEX_W_TABLE (VEX_W_10_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_10_P_3) }, + { VEX_W_TABLE (VEX_W_0F10_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F10_P_1) }, + { VEX_W_TABLE (VEX_W_0F10_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F10_P_3) }, }, - /* PREFIX_VEX_11 */ + /* PREFIX_VEX_0F11 */ { - { VEX_W_TABLE (VEX_W_11_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_11_P_1) }, - { VEX_W_TABLE (VEX_W_11_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_11_P_3) }, + { VEX_W_TABLE (VEX_W_0F11_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F11_P_1) }, + { VEX_W_TABLE (VEX_W_0F11_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F11_P_3) }, }, - /* PREFIX_VEX_12 */ + /* PREFIX_VEX_0F12 */ { - { MOD_TABLE (MOD_VEX_12_PREFIX_0) }, - { VEX_W_TABLE (VEX_W_12_P_1) }, - { VEX_LEN_TABLE (VEX_LEN_12_P_2) }, - { VEX_W_TABLE (VEX_W_12_P_3) }, + { MOD_TABLE (MOD_VEX_0F12_PREFIX_0) }, + { VEX_W_TABLE (VEX_W_0F12_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F12_P_2) }, + { VEX_W_TABLE (VEX_W_0F12_P_3) }, }, - /* PREFIX_VEX_16 */ + /* PREFIX_VEX_0F16 */ { - { MOD_TABLE (MOD_VEX_16_PREFIX_0) }, - { VEX_W_TABLE (VEX_W_16_P_1) }, - { VEX_LEN_TABLE (VEX_LEN_16_P_2) }, + { MOD_TABLE (MOD_VEX_0F16_PREFIX_0) }, + { VEX_W_TABLE (VEX_W_0F16_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F16_P_2) }, }, - /* PREFIX_VEX_2A */ + /* PREFIX_VEX_0F2A */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2A_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F2A_P_1) }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2A_P_3) }, + { VEX_LEN_TABLE (VEX_LEN_0F2A_P_3) }, }, - /* PREFIX_VEX_2C */ + /* PREFIX_VEX_0F2C */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2C_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F2C_P_1) }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2C_P_3) }, + { VEX_LEN_TABLE (VEX_LEN_0F2C_P_3) }, }, - /* PREFIX_VEX_2D */ + /* PREFIX_VEX_0F2D */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2D_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F2D_P_1) }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2D_P_3) }, + { VEX_LEN_TABLE (VEX_LEN_0F2D_P_3) }, }, - /* PREFIX_VEX_2E */ + /* PREFIX_VEX_0F2E */ { - { VEX_LEN_TABLE (VEX_LEN_2E_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F2E_P_0) }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F2E_P_2) }, }, - /* PREFIX_VEX_2F */ + /* PREFIX_VEX_0F2F */ { - { VEX_LEN_TABLE (VEX_LEN_2F_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F2F_P_0) }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_2F_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F2F_P_2) }, }, - /* PREFIX_VEX_51 */ + /* PREFIX_VEX_0F51 */ { - { VEX_W_TABLE (VEX_W_51_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_51_P_1) }, - { VEX_W_TABLE (VEX_W_51_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_51_P_3) }, + { VEX_W_TABLE (VEX_W_0F51_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F51_P_1) }, + { VEX_W_TABLE (VEX_W_0F51_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F51_P_3) }, }, - /* PREFIX_VEX_52 */ + /* PREFIX_VEX_0F52 */ { - { VEX_W_TABLE (VEX_W_52_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_52_P_1) }, + { VEX_W_TABLE (VEX_W_0F52_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F52_P_1) }, }, - /* PREFIX_VEX_53 */ + /* PREFIX_VEX_0F53 */ { - { VEX_W_TABLE (VEX_W_53_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_53_P_1) }, + { VEX_W_TABLE (VEX_W_0F53_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F53_P_1) }, }, - /* PREFIX_VEX_58 */ + /* PREFIX_VEX_0F58 */ { - { VEX_W_TABLE (VEX_W_58_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_58_P_1) }, - { VEX_W_TABLE (VEX_W_58_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_58_P_3) }, + { VEX_W_TABLE (VEX_W_0F58_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F58_P_1) }, + { VEX_W_TABLE (VEX_W_0F58_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F58_P_3) }, }, - /* PREFIX_VEX_59 */ + /* PREFIX_VEX_0F59 */ { - { VEX_W_TABLE (VEX_W_59_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_59_P_1) }, - { VEX_W_TABLE (VEX_W_59_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_59_P_3) }, + { VEX_W_TABLE (VEX_W_0F59_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F59_P_1) }, + { VEX_W_TABLE (VEX_W_0F59_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F59_P_3) }, }, - /* PREFIX_VEX_5A */ + /* PREFIX_VEX_0F5A */ { - { VEX_W_TABLE (VEX_W_5A_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_5A_P_1) }, + { VEX_W_TABLE (VEX_W_0F5A_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F5A_P_1) }, { "vcvtpd2ps%XY", { XMM, EXx } }, - { VEX_LEN_TABLE (VEX_LEN_5A_P_3) }, + { VEX_LEN_TABLE (VEX_LEN_0F5A_P_3) }, }, - /* PREFIX_VEX_5B */ + /* PREFIX_VEX_0F5B */ { - { VEX_W_TABLE (VEX_W_5B_P_0) }, - { VEX_W_TABLE (VEX_W_5B_P_1) }, - { VEX_W_TABLE (VEX_W_5B_P_2) }, + { VEX_W_TABLE (VEX_W_0F5B_P_0) }, + { VEX_W_TABLE (VEX_W_0F5B_P_1) }, + { VEX_W_TABLE (VEX_W_0F5B_P_2) }, }, - /* PREFIX_VEX_5C */ + /* PREFIX_VEX_0F5C */ { - { VEX_W_TABLE (VEX_W_5C_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_5C_P_1) }, - { VEX_W_TABLE (VEX_W_5C_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_5C_P_3) }, + { VEX_W_TABLE (VEX_W_0F5C_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F5C_P_1) }, + { VEX_W_TABLE (VEX_W_0F5C_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F5C_P_3) }, }, - /* PREFIX_VEX_5D */ + /* PREFIX_VEX_0F5D */ { - { VEX_W_TABLE (VEX_W_5D_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_5D_P_1) }, - { VEX_W_TABLE (VEX_W_5D_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_5D_P_3) }, + { VEX_W_TABLE (VEX_W_0F5D_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F5D_P_1) }, + { VEX_W_TABLE (VEX_W_0F5D_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F5D_P_3) }, }, - /* PREFIX_VEX_5E */ + /* PREFIX_VEX_0F5E */ { - { VEX_W_TABLE (VEX_W_5E_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_5E_P_1) }, - { VEX_W_TABLE (VEX_W_5E_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_5E_P_3) }, + { VEX_W_TABLE (VEX_W_0F5E_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F5E_P_1) }, + { VEX_W_TABLE (VEX_W_0F5E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F5E_P_3) }, }, - /* PREFIX_VEX_5F */ + /* PREFIX_VEX_0F5F */ { - { VEX_W_TABLE (VEX_W_5F_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_5F_P_1) }, - { VEX_W_TABLE (VEX_W_5F_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_5F_P_3) }, + { VEX_W_TABLE (VEX_W_0F5F_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F5F_P_1) }, + { VEX_W_TABLE (VEX_W_0F5F_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F5F_P_3) }, }, - /* PREFIX_VEX_60 */ + /* PREFIX_VEX_0F60 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_60_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F60_P_2) }, }, - /* PREFIX_VEX_61 */ + /* PREFIX_VEX_0F61 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_61_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F61_P_2) }, }, - /* PREFIX_VEX_62 */ + /* PREFIX_VEX_0F62 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_62_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F62_P_2) }, }, - /* PREFIX_VEX_63 */ + /* PREFIX_VEX_0F63 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_63_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F63_P_2) }, }, - /* PREFIX_VEX_64 */ + /* PREFIX_VEX_0F64 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_64_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F64_P_2) }, }, - /* PREFIX_VEX_65 */ + /* PREFIX_VEX_0F65 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_65_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F65_P_2) }, }, - /* PREFIX_VEX_66 */ + /* PREFIX_VEX_0F66 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_66_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F66_P_2) }, }, - /* PREFIX_VEX_67 */ + /* PREFIX_VEX_0F67 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_67_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F67_P_2) }, }, - /* PREFIX_VEX_68 */ + /* PREFIX_VEX_0F68 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_68_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F68_P_2) }, }, - /* PREFIX_VEX_69 */ + /* PREFIX_VEX_0F69 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_69_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F69_P_2) }, }, - /* PREFIX_VEX_6A */ + /* PREFIX_VEX_0F6A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_6A_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F6A_P_2) }, }, - /* PREFIX_VEX_6B */ + /* PREFIX_VEX_0F6B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_6B_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F6B_P_2) }, }, - /* PREFIX_VEX_6C */ + /* PREFIX_VEX_0F6C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_6C_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F6C_P_2) }, }, - /* PREFIX_VEX_6D */ + /* PREFIX_VEX_0F6D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_6D_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F6D_P_2) }, }, - /* PREFIX_VEX_6E */ + /* PREFIX_VEX_0F6E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_6E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F6E_P_2) }, }, - /* PREFIX_VEX_6F */ + /* PREFIX_VEX_0F6F */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_6F_P_1) }, - { VEX_W_TABLE (VEX_W_6F_P_2) }, + { VEX_W_TABLE (VEX_W_0F6F_P_1) }, + { VEX_W_TABLE (VEX_W_0F6F_P_2) }, }, - /* PREFIX_VEX_70 */ + /* PREFIX_VEX_0F70 */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_70_P_1) }, - { VEX_LEN_TABLE (VEX_LEN_70_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_70_P_3) }, + { VEX_LEN_TABLE (VEX_LEN_0F70_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F70_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F70_P_3) }, }, - /* PREFIX_VEX_71_REG_2 */ + /* PREFIX_VEX_0F71_REG_2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_71_R_2_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F71_R_2_P_2) }, }, - /* PREFIX_VEX_71_REG_4 */ + /* PREFIX_VEX_0F71_REG_4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_71_R_4_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F71_R_4_P_2) }, }, - /* PREFIX_VEX_71_REG_6 */ + /* PREFIX_VEX_0F71_REG_6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_71_R_6_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F71_R_6_P_2) }, }, - /* PREFIX_VEX_72_REG_2 */ + /* PREFIX_VEX_0F72_REG_2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_72_R_2_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F72_R_2_P_2) }, }, - /* PREFIX_VEX_72_REG_4 */ + /* PREFIX_VEX_0F72_REG_4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_72_R_4_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F72_R_4_P_2) }, }, - /* PREFIX_VEX_72_REG_6 */ + /* PREFIX_VEX_0F72_REG_6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_72_R_6_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F72_R_6_P_2) }, }, - /* PREFIX_VEX_73_REG_2 */ + /* PREFIX_VEX_0F73_REG_2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_73_R_2_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F73_R_2_P_2) }, }, - /* PREFIX_VEX_73_REG_3 */ + /* PREFIX_VEX_0F73_REG_3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_73_R_3_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F73_R_3_P_2) }, }, - /* PREFIX_VEX_73_REG_6 */ + /* PREFIX_VEX_0F73_REG_6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_73_R_6_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F73_R_6_P_2) }, }, - /* PREFIX_VEX_73_REG_7 */ + /* PREFIX_VEX_0F73_REG_7 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_73_R_7_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F73_R_7_P_2) }, }, - /* PREFIX_VEX_74 */ + /* PREFIX_VEX_0F74 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_74_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F74_P_2) }, }, - /* PREFIX_VEX_75 */ + /* PREFIX_VEX_0F75 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_75_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F75_P_2) }, }, - /* PREFIX_VEX_76 */ + /* PREFIX_VEX_0F76 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_76_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F76_P_2) }, }, - /* PREFIX_VEX_77 */ + /* PREFIX_VEX_0F77 */ { - { VEX_W_TABLE (VEX_W_77_P_0) }, + { VEX_W_TABLE (VEX_W_0F77_P_0) }, }, - /* PREFIX_VEX_7C */ + /* PREFIX_VEX_0F7C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_7C_P_2) }, - { VEX_W_TABLE (VEX_W_7C_P_3) }, + { VEX_W_TABLE (VEX_W_0F7C_P_2) }, + { VEX_W_TABLE (VEX_W_0F7C_P_3) }, }, - /* PREFIX_VEX_7D */ + /* PREFIX_VEX_0F7D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_7D_P_2) }, - { VEX_W_TABLE (VEX_W_7D_P_3) }, + { VEX_W_TABLE (VEX_W_0F7D_P_2) }, + { VEX_W_TABLE (VEX_W_0F7D_P_3) }, }, - /* PREFIX_VEX_7E */ + /* PREFIX_VEX_0F7E */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_7E_P_1) }, - { VEX_LEN_TABLE (VEX_LEN_7E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) }, + { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) }, }, - /* PREFIX_VEX_7F */ + /* PREFIX_VEX_0F7F */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_7F_P_1) }, - { VEX_W_TABLE (VEX_W_7F_P_2) }, + { VEX_W_TABLE (VEX_W_0F7F_P_1) }, + { VEX_W_TABLE (VEX_W_0F7F_P_2) }, }, - /* PREFIX_VEX_C2 */ + /* PREFIX_VEX_0FC2 */ { - { VEX_W_TABLE (VEX_W_C2_P_0) }, - { VEX_LEN_TABLE (VEX_LEN_C2_P_1) }, - { VEX_W_TABLE (VEX_W_C2_P_2) }, - { VEX_LEN_TABLE (VEX_LEN_C2_P_3) }, + { VEX_W_TABLE (VEX_W_0FC2_P_0) }, + { VEX_LEN_TABLE (VEX_LEN_0FC2_P_1) }, + { VEX_W_TABLE (VEX_W_0FC2_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FC2_P_3) }, }, - /* PREFIX_VEX_C4 */ + /* PREFIX_VEX_0FC4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_C4_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FC4_P_2) }, }, - /* PREFIX_VEX_C5 */ + /* PREFIX_VEX_0FC5 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_C5_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FC5_P_2) }, }, - /* PREFIX_VEX_D0 */ + /* PREFIX_VEX_0FD0 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_D0_P_2) }, - { VEX_W_TABLE (VEX_W_D0_P_3) }, + { VEX_W_TABLE (VEX_W_0FD0_P_2) }, + { VEX_W_TABLE (VEX_W_0FD0_P_3) }, }, - /* PREFIX_VEX_D1 */ + /* PREFIX_VEX_0FD1 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D1_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD1_P_2) }, }, - /* PREFIX_VEX_D2 */ + /* PREFIX_VEX_0FD2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D2_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD2_P_2) }, }, - /* PREFIX_VEX_D3 */ + /* PREFIX_VEX_0FD3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D3_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD3_P_2) }, }, - /* PREFIX_VEX_D4 */ + /* PREFIX_VEX_0FD4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D4_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD4_P_2) }, }, - /* PREFIX_VEX_D5 */ + /* PREFIX_VEX_0FD5 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D5_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD5_P_2) }, }, - /* PREFIX_VEX_D6 */ + /* PREFIX_VEX_0FD6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D6_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD6_P_2) }, }, - /* PREFIX_VEX_D7 */ + /* PREFIX_VEX_0FD7 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_D7_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0FD7_PREFIX_2) }, }, - /* PREFIX_VEX_D8 */ + /* PREFIX_VEX_0FD8 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D8_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD8_P_2) }, }, - /* PREFIX_VEX_D9 */ + /* PREFIX_VEX_0FD9 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D9_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FD9_P_2) }, }, - /* PREFIX_VEX_DA */ + /* PREFIX_VEX_0FDA */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_DA_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FDA_P_2) }, }, - /* PREFIX_VEX_DB */ + /* PREFIX_VEX_0FDB */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_DB_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FDB_P_2) }, }, - /* PREFIX_VEX_DC */ + /* PREFIX_VEX_0FDC */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_DC_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FDC_P_2) }, }, - /* PREFIX_VEX_DD */ + /* PREFIX_VEX_0FDD */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_DD_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FDD_P_2) }, }, - /* PREFIX_VEX_DE */ + /* PREFIX_VEX_0FDE */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_DE_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FDE_P_2) }, }, - /* PREFIX_VEX_DF */ + /* PREFIX_VEX_0FDF */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_DF_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FDF_P_2) }, }, - /* PREFIX_VEX_E0 */ + /* PREFIX_VEX_0FE0 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E0_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE0_P_2) }, }, - /* PREFIX_VEX_E1 */ + /* PREFIX_VEX_0FE1 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E1_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE1_P_2) }, }, - /* PREFIX_VEX_E2 */ + /* PREFIX_VEX_0FE2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E2_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE2_P_2) }, }, - /* PREFIX_VEX_E3 */ + /* PREFIX_VEX_0FE3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E3_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE3_P_2) }, }, - /* PREFIX_VEX_E4 */ + /* PREFIX_VEX_0FE4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E4_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE4_P_2) }, }, - /* PREFIX_VEX_E5 */ + /* PREFIX_VEX_0FE5 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E5_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE5_P_2) }, }, - /* PREFIX_VEX_E6 */ + /* PREFIX_VEX_0FE6 */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_E6_P_1) }, - { VEX_W_TABLE (VEX_W_E6_P_2) }, - { VEX_W_TABLE (VEX_W_E6_P_3) }, + { VEX_W_TABLE (VEX_W_0FE6_P_1) }, + { VEX_W_TABLE (VEX_W_0FE6_P_2) }, + { VEX_W_TABLE (VEX_W_0FE6_P_3) }, }, - /* PREFIX_VEX_E7 */ + /* PREFIX_VEX_0FE7 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_E7_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0FE7_PREFIX_2) }, }, - /* PREFIX_VEX_E8 */ + /* PREFIX_VEX_0FE8 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E8_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE8_P_2) }, }, - /* PREFIX_VEX_E9 */ + /* PREFIX_VEX_0FE9 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_E9_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FE9_P_2) }, }, - /* PREFIX_VEX_EA */ + /* PREFIX_VEX_0FEA */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_EA_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FEA_P_2) }, }, - /* PREFIX_VEX_EB */ + /* PREFIX_VEX_0FEB */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_EB_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FEB_P_2) }, }, - /* PREFIX_VEX_EC */ + /* PREFIX_VEX_0FEC */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_EC_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FEC_P_2) }, }, - /* PREFIX_VEX_ED */ + /* PREFIX_VEX_0FED */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_ED_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FED_P_2) }, }, - /* PREFIX_VEX_EE */ + /* PREFIX_VEX_0FEE */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_EE_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FEE_P_2) }, }, - /* PREFIX_VEX_EF */ + /* PREFIX_VEX_0FEF */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_EF_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FEF_P_2) }, }, - /* PREFIX_VEX_F0 */ + /* PREFIX_VEX_0FF0 */ { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_F0_PREFIX_3) }, + { MOD_TABLE (MOD_VEX_0FF0_PREFIX_3) }, }, - /* PREFIX_VEX_F1 */ + /* PREFIX_VEX_0FF1 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F1_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF1_P_2) }, }, - /* PREFIX_VEX_F2 */ + /* PREFIX_VEX_0FF2 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F2_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF2_P_2) }, }, - /* PREFIX_VEX_F3 */ + /* PREFIX_VEX_0FF3 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F3_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF3_P_2) }, }, - /* PREFIX_VEX_F4 */ + /* PREFIX_VEX_0FF4 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F4_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF4_P_2) }, }, - /* PREFIX_VEX_F5 */ + /* PREFIX_VEX_0FF5 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F5_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF5_P_2) }, }, - /* PREFIX_VEX_F6 */ + /* PREFIX_VEX_0FF6 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F6_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF6_P_2) }, }, - /* PREFIX_VEX_F7 */ + /* PREFIX_VEX_0FF7 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F7_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF7_P_2) }, }, - /* PREFIX_VEX_F8 */ + /* PREFIX_VEX_0FF8 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F8_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF8_P_2) }, }, - /* PREFIX_VEX_F9 */ + /* PREFIX_VEX_0FF9 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_F9_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FF9_P_2) }, }, - /* PREFIX_VEX_FA */ + /* PREFIX_VEX_0FFA */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_FA_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FFA_P_2) }, }, - /* PREFIX_VEX_FB */ + /* PREFIX_VEX_0FFB */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_FB_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FFB_P_2) }, }, - /* PREFIX_VEX_FC */ + /* PREFIX_VEX_0FFC */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_FC_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FFC_P_2) }, }, - /* PREFIX_VEX_FD */ + /* PREFIX_VEX_0FFD */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_FD_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FFD_P_2) }, }, - /* PREFIX_VEX_FE */ + /* PREFIX_VEX_0FFE */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_FE_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0FFE_P_2) }, }, - /* PREFIX_VEX_3800 */ + /* PREFIX_VEX_0F3800 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3800_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3800_P_2) }, }, - /* PREFIX_VEX_3801 */ + /* PREFIX_VEX_0F3801 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3801_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3801_P_2) }, }, - /* PREFIX_VEX_3802 */ + /* PREFIX_VEX_0F3802 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3802_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3802_P_2) }, }, - /* PREFIX_VEX_3803 */ + /* PREFIX_VEX_0F3803 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3803_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3803_P_2) }, }, - /* PREFIX_VEX_3804 */ + /* PREFIX_VEX_0F3804 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3804_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3804_P_2) }, }, - /* PREFIX_VEX_3805 */ + /* PREFIX_VEX_0F3805 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3805_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3805_P_2) }, }, - /* PREFIX_VEX_3806 */ + /* PREFIX_VEX_0F3806 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3806_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3806_P_2) }, }, - /* PREFIX_VEX_3807 */ + /* PREFIX_VEX_0F3807 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3807_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3807_P_2) }, }, - /* PREFIX_VEX_3808 */ + /* PREFIX_VEX_0F3808 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3808_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3808_P_2) }, }, - /* PREFIX_VEX_3809 */ + /* PREFIX_VEX_0F3809 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3809_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3809_P_2) }, }, - /* PREFIX_VEX_380A */ + /* PREFIX_VEX_0F380A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_380A_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F380A_P_2) }, }, - /* PREFIX_VEX_380B */ + /* PREFIX_VEX_0F380B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_380B_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F380B_P_2) }, }, - /* PREFIX_VEX_380C */ + /* PREFIX_VEX_0F380C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_380C_P_2) }, + { VEX_W_TABLE (VEX_W_0F380C_P_2) }, }, - /* PREFIX_VEX_380D */ + /* PREFIX_VEX_0F380D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_380D_P_2) }, + { VEX_W_TABLE (VEX_W_0F380D_P_2) }, }, - /* PREFIX_VEX_380E */ + /* PREFIX_VEX_0F380E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_380E_P_2) }, + { VEX_W_TABLE (VEX_W_0F380E_P_2) }, }, - /* PREFIX_VEX_380F */ + /* PREFIX_VEX_0F380F */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_380F_P_2) }, + { VEX_W_TABLE (VEX_W_0F380F_P_2) }, }, - /* PREFIX_VEX_3817 */ + /* PREFIX_VEX_0F3813 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3817_P_2) }, + { "vcvtph2ps", { XM, EXxmmq } }, }, - /* PREFIX_VEX_3818 */ + /* PREFIX_VEX_0F3817 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_3818_PREFIX_2) }, + { VEX_W_TABLE (VEX_W_0F3817_P_2) }, }, - /* PREFIX_VEX_3819 */ + /* PREFIX_VEX_0F3818 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_3819_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0F3818_PREFIX_2) }, }, - /* PREFIX_VEX_381A */ + /* PREFIX_VEX_0F3819 */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_381A_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0F3819_PREFIX_2) }, }, - /* PREFIX_VEX_381C */ + /* PREFIX_VEX_0F381A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_381C_P_2) }, + { MOD_TABLE (MOD_VEX_0F381A_PREFIX_2) }, }, - /* PREFIX_VEX_381D */ + /* PREFIX_VEX_0F381C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_381D_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F381C_P_2) }, }, - /* PREFIX_VEX_381E */ + /* PREFIX_VEX_0F381D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_381E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F381D_P_2) }, }, - /* PREFIX_VEX_3820 */ + /* PREFIX_VEX_0F381E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3820_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F381E_P_2) }, + }, + + /* PREFIX_VEX_0F3820 */ + { { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3820_P_2) }, }, - /* PREFIX_VEX_3821 */ + /* PREFIX_VEX_0F3821 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3821_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3821_P_2) }, }, - /* PREFIX_VEX_3822 */ + /* PREFIX_VEX_0F3822 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3822_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3822_P_2) }, }, - /* PREFIX_VEX_3823 */ + /* PREFIX_VEX_0F3823 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3823_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3823_P_2) }, }, - /* PREFIX_VEX_3824 */ + /* PREFIX_VEX_0F3824 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3824_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3824_P_2) }, }, - /* PREFIX_VEX_3825 */ + /* PREFIX_VEX_0F3825 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3825_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3825_P_2) }, }, - /* PREFIX_VEX_3828 */ + /* PREFIX_VEX_0F3828 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3828_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3828_P_2) }, }, - /* PREFIX_VEX_3829 */ + /* PREFIX_VEX_0F3829 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3829_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3829_P_2) }, }, - /* PREFIX_VEX_382A */ + /* PREFIX_VEX_0F382A */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_382A_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0F382A_PREFIX_2) }, }, - /* PREFIX_VEX_382B */ + /* PREFIX_VEX_0F382B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_382B_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F382B_P_2) }, }, - /* PREFIX_VEX_382C */ + /* PREFIX_VEX_0F382C */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_382C_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0F382C_PREFIX_2) }, }, - /* PREFIX_VEX_382D */ + /* PREFIX_VEX_0F382D */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_382D_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0F382D_PREFIX_2) }, }, - /* PREFIX_VEX_382E */ + /* PREFIX_VEX_0F382E */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_382E_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0F382E_PREFIX_2) }, }, - /* PREFIX_VEX_382F */ + /* PREFIX_VEX_0F382F */ { { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_VEX_382F_PREFIX_2) }, + { MOD_TABLE (MOD_VEX_0F382F_PREFIX_2) }, }, - /* PREFIX_VEX_3830 */ + /* PREFIX_VEX_0F3830 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3830_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3830_P_2) }, }, - /* PREFIX_VEX_3831 */ + /* PREFIX_VEX_0F3831 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3831_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3831_P_2) }, }, - /* PREFIX_VEX_3832 */ + /* PREFIX_VEX_0F3832 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3832_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3832_P_2) }, }, - /* PREFIX_VEX_3833 */ + /* PREFIX_VEX_0F3833 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3833_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3833_P_2) }, }, - /* PREFIX_VEX_3834 */ + /* PREFIX_VEX_0F3834 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3834_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3834_P_2) }, }, - /* PREFIX_VEX_3835 */ + /* PREFIX_VEX_0F3835 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3835_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3835_P_2) }, }, - /* PREFIX_VEX_3837 */ + /* PREFIX_VEX_0F3837 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3837_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3837_P_2) }, }, - /* PREFIX_VEX_3838 */ + /* PREFIX_VEX_0F3838 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3838_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3838_P_2) }, }, - /* PREFIX_VEX_3839 */ + /* PREFIX_VEX_0F3839 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3839_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3839_P_2) }, }, - /* PREFIX_VEX_383A */ + /* PREFIX_VEX_0F383A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_383A_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F383A_P_2) }, }, - /* PREFIX_VEX_383B */ + /* PREFIX_VEX_0F383B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_383B_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F383B_P_2) }, }, - /* PREFIX_VEX_383C */ + /* PREFIX_VEX_0F383C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_383C_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F383C_P_2) }, }, - /* PREFIX_VEX_383D */ + /* PREFIX_VEX_0F383D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_383D_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F383D_P_2) }, }, - /* PREFIX_VEX_383E */ + /* PREFIX_VEX_0F383E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_383E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F383E_P_2) }, }, - /* PREFIX_VEX_383F */ + /* PREFIX_VEX_0F383F */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_383F_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F383F_P_2) }, }, - /* PREFIX_VEX_3840 */ + /* PREFIX_VEX_0F3840 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3840_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3840_P_2) }, }, - /* PREFIX_VEX_3841 */ + /* PREFIX_VEX_0F3841 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3841_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3841_P_2) }, }, - /* PREFIX_VEX_3896 */ + /* PREFIX_VEX_0F3896 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmaddsub132p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_3897 */ + /* PREFIX_VEX_0F3897 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsubadd132p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_3898 */ + /* PREFIX_VEX_0F3898 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmadd132p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_3899 */ + /* PREFIX_VEX_0F3899 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfmadd132s%XW", { XM, Vex, EXVexWdq } }, + { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_389A */ + /* PREFIX_VEX_0F389A */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsub132p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_389B */ + /* PREFIX_VEX_0F389B */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfmsub132s%XW", { XM, Vex, EXVexWdq } }, + { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_389C */ + /* PREFIX_VEX_0F389C */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmadd132p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_389D */ + /* PREFIX_VEX_0F389D */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfnmadd132s%XW", { XM, Vex, EXVexWdq } }, + { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_389E */ + /* PREFIX_VEX_0F389E */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmsub132p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_389F */ + /* PREFIX_VEX_0F389F */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfnmsub132s%XW", { XM, Vex, EXVexWdq } }, + { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38A6 */ + /* PREFIX_VEX_0F38A6 */ { { Bad_Opcode }, { Bad_Opcode }, @@ -4728,505 +4800,526 @@ static const struct dis386 prefix_table[][4] = { { Bad_Opcode }, }, - /* PREFIX_VEX_38A7 */ + /* PREFIX_VEX_0F38A7 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsubadd213p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38A8 */ + /* PREFIX_VEX_0F38A8 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmadd213p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38A9 */ + /* PREFIX_VEX_0F38A9 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfmadd213s%XW", { XM, Vex, EXVexWdq } }, + { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38AA */ + /* PREFIX_VEX_0F38AA */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsub213p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38AB */ + /* PREFIX_VEX_0F38AB */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfmsub213s%XW", { XM, Vex, EXVexWdq } }, + { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38AC */ + /* PREFIX_VEX_0F38AC */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmadd213p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38AD */ + /* PREFIX_VEX_0F38AD */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfnmadd213s%XW", { XM, Vex, EXVexWdq } }, + { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38AE */ + /* PREFIX_VEX_0F38AE */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmsub213p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38AF */ + /* PREFIX_VEX_0F38AF */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfnmsub213s%XW", { XM, Vex, EXVexWdq } }, + { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38B6 */ + /* PREFIX_VEX_0F38B6 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmaddsub231p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38B7 */ + /* PREFIX_VEX_0F38B7 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsubadd231p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38B8 */ + /* PREFIX_VEX_0F38B8 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmadd231p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38B9 */ + /* PREFIX_VEX_0F38B9 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfmadd231s%XW", { XM, Vex, EXVexWdq } }, + { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38BA */ + /* PREFIX_VEX_0F38BA */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsub231p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38BB */ + /* PREFIX_VEX_0F38BB */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfmsub231s%XW", { XM, Vex, EXVexWdq } }, + { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38BC */ + /* PREFIX_VEX_0F38BC */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmadd231p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38BD */ + /* PREFIX_VEX_0F38BD */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfnmadd231s%XW", { XM, Vex, EXVexWdq } }, + { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, }, - /* PREFIX_VEX_38BE */ + /* PREFIX_VEX_0F38BE */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmsub231p%XW", { XM, Vex, EXx } }, }, - /* PREFIX_VEX_38BF */ + /* PREFIX_VEX_0F38BF */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar } }, + }, + + /* PREFIX_VEX_0F38DB */ { { Bad_Opcode }, { Bad_Opcode }, - { "vfnmsub231s%XW", { XM, Vex, EXVexWdq } }, + { VEX_LEN_TABLE (VEX_LEN_0F38DB_P_2) }, }, - /* PREFIX_VEX_38DB */ + /* PREFIX_VEX_0F38DC */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_38DB_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F38DC_P_2) }, }, - /* PREFIX_VEX_38DC */ + /* PREFIX_VEX_0F38DD */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_38DC_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F38DD_P_2) }, }, - /* PREFIX_VEX_38DD */ + /* PREFIX_VEX_0F38DE */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_38DD_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F38DE_P_2) }, }, - /* PREFIX_VEX_38DE */ + /* PREFIX_VEX_0F38DF */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_38DE_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F38DF_P_2) }, }, - /* PREFIX_VEX_38DF */ + /* PREFIX_VEX_0F3A04 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_38DF_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A04_P_2) }, }, - /* PREFIX_VEX_3A04 */ + /* PREFIX_VEX_0F3A05 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A04_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A05_P_2) }, }, - /* PREFIX_VEX_3A05 */ + /* PREFIX_VEX_0F3A06 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A05_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A06_P_2) }, }, - /* PREFIX_VEX_3A06 */ + /* PREFIX_VEX_0F3A08 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A06_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A08_P_2) }, }, - /* PREFIX_VEX_3A08 */ + /* PREFIX_VEX_0F3A09 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A08_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A09_P_2) }, }, - /* PREFIX_VEX_3A09 */ + /* PREFIX_VEX_0F3A0A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A09_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A0A_P_2) }, }, - /* PREFIX_VEX_3A0A */ + /* PREFIX_VEX_0F3A0B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A0A_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A0B_P_2) }, }, - /* PREFIX_VEX_3A0B */ + /* PREFIX_VEX_0F3A0C */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A0B_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0C_P_2) }, }, - /* PREFIX_VEX_3A0C */ + /* PREFIX_VEX_0F3A0D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A0C_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0D_P_2) }, }, - /* PREFIX_VEX_3A0D */ + /* PREFIX_VEX_0F3A0E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A0D_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A0E_P_2) }, }, - /* PREFIX_VEX_3A0E */ + /* PREFIX_VEX_0F3A0F */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A0E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A0F_P_2) }, }, - /* PREFIX_VEX_3A0F */ + /* PREFIX_VEX_0F3A14 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A0F_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A14_P_2) }, }, - /* PREFIX_VEX_3A14 */ + /* PREFIX_VEX_0F3A15 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A14_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A15_P_2) }, }, - /* PREFIX_VEX_3A15 */ + /* PREFIX_VEX_0F3A16 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A15_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A16_P_2) }, }, - /* PREFIX_VEX_3A16 */ + /* PREFIX_VEX_0F3A17 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A16_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A17_P_2) }, }, - /* PREFIX_VEX_3A17 */ + /* PREFIX_VEX_0F3A18 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A17_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A18_P_2) }, }, - /* PREFIX_VEX_3A18 */ + /* PREFIX_VEX_0F3A19 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A18_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A19_P_2) }, }, - /* PREFIX_VEX_3A19 */ + /* PREFIX_VEX_0F3A1D */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A19_P_2) }, + { "vcvtps2ph", { EXxmmq, XM, Ib } }, }, - /* PREFIX_VEX_3A20 */ + /* PREFIX_VEX_0F3A20 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A20_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A20_P_2) }, }, - /* PREFIX_VEX_3A21 */ + /* PREFIX_VEX_0F3A21 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A21_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A21_P_2) }, }, - /* PREFIX_VEX_3A22 */ + /* PREFIX_VEX_0F3A22 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A22_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A22_P_2) }, }, - /* PREFIX_VEX_3A40 */ + /* PREFIX_VEX_0F3A40 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A40_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A40_P_2) }, }, - /* PREFIX_VEX_3A41 */ + /* PREFIX_VEX_0F3A41 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A41_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A41_P_2) }, }, - /* PREFIX_VEX_3A42 */ + /* PREFIX_VEX_0F3A42 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A42_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A42_P_2) }, }, - /* PREFIX_VEX_3A44 */ + /* PREFIX_VEX_0F3A44 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A44_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A44_P_2) }, }, - /* PREFIX_VEX_3A4A */ + /* PREFIX_VEX_0F3A48 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A4A_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A48_P_2) }, }, - /* PREFIX_VEX_3A4B */ + /* PREFIX_VEX_0F3A49 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A4B_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A49_P_2) }, }, - /* PREFIX_VEX_3A4C */ + /* PREFIX_VEX_0F3A4A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A4C_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A4A_P_2) }, }, - /* PREFIX_VEX_3A5C */ + /* PREFIX_VEX_0F3A4B */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3A4B_P_2) }, + }, + + /* PREFIX_VEX_0F3A4C */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3A4C_P_2) }, + }, + + /* PREFIX_VEX_0F3A5C */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmaddsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A5D */ + /* PREFIX_VEX_0F3A5D */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmaddsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A5E */ + /* PREFIX_VEX_0F3A5E */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsubaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A5F */ + /* PREFIX_VEX_0F3A5F */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsubaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A60 */ + /* PREFIX_VEX_0F3A60 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A60_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A60_P_2) }, { Bad_Opcode }, }, - /* PREFIX_VEX_3A61 */ + /* PREFIX_VEX_0F3A61 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A61_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A61_P_2) }, }, - /* PREFIX_VEX_3A62 */ + /* PREFIX_VEX_0F3A62 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A62_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A62_P_2) }, }, - /* PREFIX_VEX_3A63 */ + /* PREFIX_VEX_0F3A63 */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A63_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A63_P_2) }, }, - /* PREFIX_VEX_3A68 */ + /* PREFIX_VEX_0F3A68 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A69 */ + /* PREFIX_VEX_0F3A69 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A6A */ + /* PREFIX_VEX_0F3A6A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A6A_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A6A_P_2) }, }, - /* PREFIX_VEX_3A6B */ + /* PREFIX_VEX_0F3A6B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A6B_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A6B_P_2) }, }, - /* PREFIX_VEX_3A6C */ + /* PREFIX_VEX_0F3A6C */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A6D */ + /* PREFIX_VEX_0F3A6D */ { { Bad_Opcode }, { Bad_Opcode }, { "vfmsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A6E */ + /* PREFIX_VEX_0F3A6E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A6E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A6E_P_2) }, }, - /* PREFIX_VEX_3A6F */ + /* PREFIX_VEX_0F3A6F */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A6F_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A6F_P_2) }, }, - /* PREFIX_VEX_3A78 */ + /* PREFIX_VEX_0F3A78 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A79 */ + /* PREFIX_VEX_0F3A79 */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A7A */ + /* PREFIX_VEX_0F3A7A */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A7A_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A7A_P_2) }, }, - /* PREFIX_VEX_3A7B */ + /* PREFIX_VEX_0F3A7B */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A7B_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A7B_P_2) }, }, - /* PREFIX_VEX_3A7C */ + /* PREFIX_VEX_0F3A7C */ { { Bad_Opcode }, { Bad_Opcode }, @@ -5234,69 +5327,69 @@ static const struct dis386 prefix_table[][4] = { { Bad_Opcode }, }, - /* PREFIX_VEX_3A7D */ + /* PREFIX_VEX_0F3A7D */ { { Bad_Opcode }, { Bad_Opcode }, { "vfnmsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } }, }, - /* PREFIX_VEX_3A7E */ + /* PREFIX_VEX_0F3A7E */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A7E_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A7E_P_2) }, }, - /* PREFIX_VEX_3A7F */ + /* PREFIX_VEX_0F3A7F */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3A7F_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3A7F_P_2) }, }, - /* PREFIX_VEX_3ADF */ + /* PREFIX_VEX_0F3ADF */ { { Bad_Opcode }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_3ADF_P_2) }, + { VEX_LEN_TABLE (VEX_LEN_0F3ADF_P_2) }, }, }; static const struct dis386 x86_64_table[][2] = { /* X86_64_06 */ { - { "push{T|}", { es } }, + { "pushP", { es } }, }, /* X86_64_07 */ { - { "pop{T|}", { es } }, + { "popP", { es } }, }, /* X86_64_0D */ { - { "push{T|}", { cs } }, + { "pushP", { cs } }, }, /* X86_64_16 */ { - { "push{T|}", { ss } }, + { "pushP", { ss } }, }, /* X86_64_17 */ { - { "pop{T|}", { ss } }, + { "popP", { ss } }, }, /* X86_64_1E */ { - { "push{T|}", { ds } }, + { "pushP", { ds } }, }, /* X86_64_1F */ { - { "pop{T|}", { ds } }, + { "popP", { ds } }, }, /* X86_64_27 */ @@ -5321,12 +5414,12 @@ static const struct dis386 x86_64_table[][2] = { /* X86_64_60 */ { - { "pusha{P|}", { XX } }, + { "pushaP", { XX } }, }, /* X86_64_61 */ { - { "popa{P|}", { XX } }, + { "popaP", { XX } }, }, /* X86_64_62 */ @@ -6731,8 +6824,8 @@ static const struct dis386 xop_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 80 */ - { VEX_LEN_TABLE (VEX_LEN_XOP_09_80) }, - { VEX_LEN_TABLE (VEX_LEN_XOP_09_81) }, + { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_80) }, + { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_81) }, { "vfrczss", { XM, EXd } }, { "vfrczsd", { XM, EXq } }, { Bad_Opcode }, @@ -7190,14 +7283,14 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 10 */ - { PREFIX_TABLE (PREFIX_VEX_10) }, - { PREFIX_TABLE (PREFIX_VEX_11) }, - { PREFIX_TABLE (PREFIX_VEX_12) }, - { MOD_TABLE (MOD_VEX_13) }, - { VEX_W_TABLE (VEX_W_14) }, - { VEX_W_TABLE (VEX_W_15) }, - { PREFIX_TABLE (PREFIX_VEX_16) }, - { MOD_TABLE (MOD_VEX_17) }, + { PREFIX_TABLE (PREFIX_VEX_0F10) }, + { PREFIX_TABLE (PREFIX_VEX_0F11) }, + { PREFIX_TABLE (PREFIX_VEX_0F12) }, + { MOD_TABLE (MOD_VEX_0F13) }, + { VEX_W_TABLE (VEX_W_0F14) }, + { VEX_W_TABLE (VEX_W_0F15) }, + { PREFIX_TABLE (PREFIX_VEX_0F16) }, + { MOD_TABLE (MOD_VEX_0F17) }, /* 18 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7217,14 +7310,14 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 28 */ - { VEX_W_TABLE (VEX_W_28) }, - { VEX_W_TABLE (VEX_W_29) }, - { PREFIX_TABLE (PREFIX_VEX_2A) }, - { MOD_TABLE (MOD_VEX_2B) }, - { PREFIX_TABLE (PREFIX_VEX_2C) }, - { PREFIX_TABLE (PREFIX_VEX_2D) }, - { PREFIX_TABLE (PREFIX_VEX_2E) }, - { PREFIX_TABLE (PREFIX_VEX_2F) }, + { VEX_W_TABLE (VEX_W_0F28) }, + { VEX_W_TABLE (VEX_W_0F29) }, + { PREFIX_TABLE (PREFIX_VEX_0F2A) }, + { MOD_TABLE (MOD_VEX_0F2B) }, + { PREFIX_TABLE (PREFIX_VEX_0F2C) }, + { PREFIX_TABLE (PREFIX_VEX_0F2D) }, + { PREFIX_TABLE (PREFIX_VEX_0F2E) }, + { PREFIX_TABLE (PREFIX_VEX_0F2F) }, /* 30 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7262,59 +7355,59 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 50 */ - { MOD_TABLE (MOD_VEX_50) }, - { PREFIX_TABLE (PREFIX_VEX_51) }, - { PREFIX_TABLE (PREFIX_VEX_52) }, - { PREFIX_TABLE (PREFIX_VEX_53) }, + { MOD_TABLE (MOD_VEX_0F50) }, + { PREFIX_TABLE (PREFIX_VEX_0F51) }, + { PREFIX_TABLE (PREFIX_VEX_0F52) }, + { PREFIX_TABLE (PREFIX_VEX_0F53) }, { "vandpX", { XM, Vex, EXx } }, { "vandnpX", { XM, Vex, EXx } }, { "vorpX", { XM, Vex, EXx } }, { "vxorpX", { XM, Vex, EXx } }, /* 58 */ - { PREFIX_TABLE (PREFIX_VEX_58) }, - { PREFIX_TABLE (PREFIX_VEX_59) }, - { PREFIX_TABLE (PREFIX_VEX_5A) }, - { PREFIX_TABLE (PREFIX_VEX_5B) }, - { PREFIX_TABLE (PREFIX_VEX_5C) }, - { PREFIX_TABLE (PREFIX_VEX_5D) }, - { PREFIX_TABLE (PREFIX_VEX_5E) }, - { PREFIX_TABLE (PREFIX_VEX_5F) }, + { PREFIX_TABLE (PREFIX_VEX_0F58) }, + { PREFIX_TABLE (PREFIX_VEX_0F59) }, + { PREFIX_TABLE (PREFIX_VEX_0F5A) }, + { PREFIX_TABLE (PREFIX_VEX_0F5B) }, + { PREFIX_TABLE (PREFIX_VEX_0F5C) }, + { PREFIX_TABLE (PREFIX_VEX_0F5D) }, + { PREFIX_TABLE (PREFIX_VEX_0F5E) }, + { PREFIX_TABLE (PREFIX_VEX_0F5F) }, /* 60 */ - { PREFIX_TABLE (PREFIX_VEX_60) }, - { PREFIX_TABLE (PREFIX_VEX_61) }, - { PREFIX_TABLE (PREFIX_VEX_62) }, - { PREFIX_TABLE (PREFIX_VEX_63) }, - { PREFIX_TABLE (PREFIX_VEX_64) }, - { PREFIX_TABLE (PREFIX_VEX_65) }, - { PREFIX_TABLE (PREFIX_VEX_66) }, - { PREFIX_TABLE (PREFIX_VEX_67) }, + { PREFIX_TABLE (PREFIX_VEX_0F60) }, + { PREFIX_TABLE (PREFIX_VEX_0F61) }, + { PREFIX_TABLE (PREFIX_VEX_0F62) }, + { PREFIX_TABLE (PREFIX_VEX_0F63) }, + { PREFIX_TABLE (PREFIX_VEX_0F64) }, + { PREFIX_TABLE (PREFIX_VEX_0F65) }, + { PREFIX_TABLE (PREFIX_VEX_0F66) }, + { PREFIX_TABLE (PREFIX_VEX_0F67) }, /* 68 */ - { PREFIX_TABLE (PREFIX_VEX_68) }, - { PREFIX_TABLE (PREFIX_VEX_69) }, - { PREFIX_TABLE (PREFIX_VEX_6A) }, - { PREFIX_TABLE (PREFIX_VEX_6B) }, - { PREFIX_TABLE (PREFIX_VEX_6C) }, - { PREFIX_TABLE (PREFIX_VEX_6D) }, - { PREFIX_TABLE (PREFIX_VEX_6E) }, - { PREFIX_TABLE (PREFIX_VEX_6F) }, + { PREFIX_TABLE (PREFIX_VEX_0F68) }, + { PREFIX_TABLE (PREFIX_VEX_0F69) }, + { PREFIX_TABLE (PREFIX_VEX_0F6A) }, + { PREFIX_TABLE (PREFIX_VEX_0F6B) }, + { PREFIX_TABLE (PREFIX_VEX_0F6C) }, + { PREFIX_TABLE (PREFIX_VEX_0F6D) }, + { PREFIX_TABLE (PREFIX_VEX_0F6E) }, + { PREFIX_TABLE (PREFIX_VEX_0F6F) }, /* 70 */ - { PREFIX_TABLE (PREFIX_VEX_70) }, - { REG_TABLE (REG_VEX_71) }, - { REG_TABLE (REG_VEX_72) }, - { REG_TABLE (REG_VEX_73) }, - { PREFIX_TABLE (PREFIX_VEX_74) }, - { PREFIX_TABLE (PREFIX_VEX_75) }, - { PREFIX_TABLE (PREFIX_VEX_76) }, - { PREFIX_TABLE (PREFIX_VEX_77) }, + { PREFIX_TABLE (PREFIX_VEX_0F70) }, + { REG_TABLE (REG_VEX_0F71) }, + { REG_TABLE (REG_VEX_0F72) }, + { REG_TABLE (REG_VEX_0F73) }, + { PREFIX_TABLE (PREFIX_VEX_0F74) }, + { PREFIX_TABLE (PREFIX_VEX_0F75) }, + { PREFIX_TABLE (PREFIX_VEX_0F76) }, + { PREFIX_TABLE (PREFIX_VEX_0F77) }, /* 78 */ { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_7C) }, - { PREFIX_TABLE (PREFIX_VEX_7D) }, - { PREFIX_TABLE (PREFIX_VEX_7E) }, - { PREFIX_TABLE (PREFIX_VEX_7F) }, + { PREFIX_TABLE (PREFIX_VEX_0F7C) }, + { PREFIX_TABLE (PREFIX_VEX_0F7D) }, + { PREFIX_TABLE (PREFIX_VEX_0F7E) }, + { PREFIX_TABLE (PREFIX_VEX_0F7F) }, /* 80 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7367,7 +7460,7 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { REG_TABLE (REG_VEX_AE) }, + { REG_TABLE (REG_VEX_0FAE) }, { Bad_Opcode }, /* b0 */ { Bad_Opcode }, @@ -7390,10 +7483,10 @@ static const struct dis386 vex_table[][256] = { /* c0 */ { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_C2) }, + { PREFIX_TABLE (PREFIX_VEX_0FC2) }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_C4) }, - { PREFIX_TABLE (PREFIX_VEX_C5) }, + { PREFIX_TABLE (PREFIX_VEX_0FC4) }, + { PREFIX_TABLE (PREFIX_VEX_0FC5) }, { "vshufpX", { XM, Vex, EXx, Ib } }, { Bad_Opcode }, /* c8 */ @@ -7406,137 +7499,137 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* d0 */ - { PREFIX_TABLE (PREFIX_VEX_D0) }, - { PREFIX_TABLE (PREFIX_VEX_D1) }, - { PREFIX_TABLE (PREFIX_VEX_D2) }, - { PREFIX_TABLE (PREFIX_VEX_D3) }, - { PREFIX_TABLE (PREFIX_VEX_D4) }, - { PREFIX_TABLE (PREFIX_VEX_D5) }, - { PREFIX_TABLE (PREFIX_VEX_D6) }, - { PREFIX_TABLE (PREFIX_VEX_D7) }, + { PREFIX_TABLE (PREFIX_VEX_0FD0) }, + { PREFIX_TABLE (PREFIX_VEX_0FD1) }, + { PREFIX_TABLE (PREFIX_VEX_0FD2) }, + { PREFIX_TABLE (PREFIX_VEX_0FD3) }, + { PREFIX_TABLE (PREFIX_VEX_0FD4) }, + { PREFIX_TABLE (PREFIX_VEX_0FD5) }, + { PREFIX_TABLE (PREFIX_VEX_0FD6) }, + { PREFIX_TABLE (PREFIX_VEX_0FD7) }, /* d8 */ - { PREFIX_TABLE (PREFIX_VEX_D8) }, - { PREFIX_TABLE (PREFIX_VEX_D9) }, - { PREFIX_TABLE (PREFIX_VEX_DA) }, - { PREFIX_TABLE (PREFIX_VEX_DB) }, - { PREFIX_TABLE (PREFIX_VEX_DC) }, - { PREFIX_TABLE (PREFIX_VEX_DD) }, - { PREFIX_TABLE (PREFIX_VEX_DE) }, - { PREFIX_TABLE (PREFIX_VEX_DF) }, + { PREFIX_TABLE (PREFIX_VEX_0FD8) }, + { PREFIX_TABLE (PREFIX_VEX_0FD9) }, + { PREFIX_TABLE (PREFIX_VEX_0FDA) }, + { PREFIX_TABLE (PREFIX_VEX_0FDB) }, + { PREFIX_TABLE (PREFIX_VEX_0FDC) }, + { PREFIX_TABLE (PREFIX_VEX_0FDD) }, + { PREFIX_TABLE (PREFIX_VEX_0FDE) }, + { PREFIX_TABLE (PREFIX_VEX_0FDF) }, /* e0 */ - { PREFIX_TABLE (PREFIX_VEX_E0) }, - { PREFIX_TABLE (PREFIX_VEX_E1) }, - { PREFIX_TABLE (PREFIX_VEX_E2) }, - { PREFIX_TABLE (PREFIX_VEX_E3) }, - { PREFIX_TABLE (PREFIX_VEX_E4) }, - { PREFIX_TABLE (PREFIX_VEX_E5) }, - { PREFIX_TABLE (PREFIX_VEX_E6) }, - { PREFIX_TABLE (PREFIX_VEX_E7) }, + { PREFIX_TABLE (PREFIX_VEX_0FE0) }, + { PREFIX_TABLE (PREFIX_VEX_0FE1) }, + { PREFIX_TABLE (PREFIX_VEX_0FE2) }, + { PREFIX_TABLE (PREFIX_VEX_0FE3) }, + { PREFIX_TABLE (PREFIX_VEX_0FE4) }, + { PREFIX_TABLE (PREFIX_VEX_0FE5) }, + { PREFIX_TABLE (PREFIX_VEX_0FE6) }, + { PREFIX_TABLE (PREFIX_VEX_0FE7) }, /* e8 */ - { PREFIX_TABLE (PREFIX_VEX_E8) }, - { PREFIX_TABLE (PREFIX_VEX_E9) }, - { PREFIX_TABLE (PREFIX_VEX_EA) }, - { PREFIX_TABLE (PREFIX_VEX_EB) }, - { PREFIX_TABLE (PREFIX_VEX_EC) }, - { PREFIX_TABLE (PREFIX_VEX_ED) }, - { PREFIX_TABLE (PREFIX_VEX_EE) }, - { PREFIX_TABLE (PREFIX_VEX_EF) }, + { PREFIX_TABLE (PREFIX_VEX_0FE8) }, + { PREFIX_TABLE (PREFIX_VEX_0FE9) }, + { PREFIX_TABLE (PREFIX_VEX_0FEA) }, + { PREFIX_TABLE (PREFIX_VEX_0FEB) }, + { PREFIX_TABLE (PREFIX_VEX_0FEC) }, + { PREFIX_TABLE (PREFIX_VEX_0FED) }, + { PREFIX_TABLE (PREFIX_VEX_0FEE) }, + { PREFIX_TABLE (PREFIX_VEX_0FEF) }, /* f0 */ - { PREFIX_TABLE (PREFIX_VEX_F0) }, - { PREFIX_TABLE (PREFIX_VEX_F1) }, - { PREFIX_TABLE (PREFIX_VEX_F2) }, - { PREFIX_TABLE (PREFIX_VEX_F3) }, - { PREFIX_TABLE (PREFIX_VEX_F4) }, - { PREFIX_TABLE (PREFIX_VEX_F5) }, - { PREFIX_TABLE (PREFIX_VEX_F6) }, - { PREFIX_TABLE (PREFIX_VEX_F7) }, + { PREFIX_TABLE (PREFIX_VEX_0FF0) }, + { PREFIX_TABLE (PREFIX_VEX_0FF1) }, + { PREFIX_TABLE (PREFIX_VEX_0FF2) }, + { PREFIX_TABLE (PREFIX_VEX_0FF3) }, + { PREFIX_TABLE (PREFIX_VEX_0FF4) }, + { PREFIX_TABLE (PREFIX_VEX_0FF5) }, + { PREFIX_TABLE (PREFIX_VEX_0FF6) }, + { PREFIX_TABLE (PREFIX_VEX_0FF7) }, /* f8 */ - { PREFIX_TABLE (PREFIX_VEX_F8) }, - { PREFIX_TABLE (PREFIX_VEX_F9) }, - { PREFIX_TABLE (PREFIX_VEX_FA) }, - { PREFIX_TABLE (PREFIX_VEX_FB) }, - { PREFIX_TABLE (PREFIX_VEX_FC) }, - { PREFIX_TABLE (PREFIX_VEX_FD) }, - { PREFIX_TABLE (PREFIX_VEX_FE) }, + { PREFIX_TABLE (PREFIX_VEX_0FF8) }, + { PREFIX_TABLE (PREFIX_VEX_0FF9) }, + { PREFIX_TABLE (PREFIX_VEX_0FFA) }, + { PREFIX_TABLE (PREFIX_VEX_0FFB) }, + { PREFIX_TABLE (PREFIX_VEX_0FFC) }, + { PREFIX_TABLE (PREFIX_VEX_0FFD) }, + { PREFIX_TABLE (PREFIX_VEX_0FFE) }, { Bad_Opcode }, }, /* VEX_0F38 */ { /* 00 */ - { PREFIX_TABLE (PREFIX_VEX_3800) }, - { PREFIX_TABLE (PREFIX_VEX_3801) }, - { PREFIX_TABLE (PREFIX_VEX_3802) }, - { PREFIX_TABLE (PREFIX_VEX_3803) }, - { PREFIX_TABLE (PREFIX_VEX_3804) }, - { PREFIX_TABLE (PREFIX_VEX_3805) }, - { PREFIX_TABLE (PREFIX_VEX_3806) }, - { PREFIX_TABLE (PREFIX_VEX_3807) }, + { PREFIX_TABLE (PREFIX_VEX_0F3800) }, + { PREFIX_TABLE (PREFIX_VEX_0F3801) }, + { PREFIX_TABLE (PREFIX_VEX_0F3802) }, + { PREFIX_TABLE (PREFIX_VEX_0F3803) }, + { PREFIX_TABLE (PREFIX_VEX_0F3804) }, + { PREFIX_TABLE (PREFIX_VEX_0F3805) }, + { PREFIX_TABLE (PREFIX_VEX_0F3806) }, + { PREFIX_TABLE (PREFIX_VEX_0F3807) }, /* 08 */ - { PREFIX_TABLE (PREFIX_VEX_3808) }, - { PREFIX_TABLE (PREFIX_VEX_3809) }, - { PREFIX_TABLE (PREFIX_VEX_380A) }, - { PREFIX_TABLE (PREFIX_VEX_380B) }, - { PREFIX_TABLE (PREFIX_VEX_380C) }, - { PREFIX_TABLE (PREFIX_VEX_380D) }, - { PREFIX_TABLE (PREFIX_VEX_380E) }, - { PREFIX_TABLE (PREFIX_VEX_380F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3808) }, + { PREFIX_TABLE (PREFIX_VEX_0F3809) }, + { PREFIX_TABLE (PREFIX_VEX_0F380A) }, + { PREFIX_TABLE (PREFIX_VEX_0F380B) }, + { PREFIX_TABLE (PREFIX_VEX_0F380C) }, + { PREFIX_TABLE (PREFIX_VEX_0F380D) }, + { PREFIX_TABLE (PREFIX_VEX_0F380E) }, + { PREFIX_TABLE (PREFIX_VEX_0F380F) }, /* 10 */ { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3813) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3817) }, + { PREFIX_TABLE (PREFIX_VEX_0F3817) }, /* 18 */ - { PREFIX_TABLE (PREFIX_VEX_3818) }, - { PREFIX_TABLE (PREFIX_VEX_3819) }, - { PREFIX_TABLE (PREFIX_VEX_381A) }, + { PREFIX_TABLE (PREFIX_VEX_0F3818) }, + { PREFIX_TABLE (PREFIX_VEX_0F3819) }, + { PREFIX_TABLE (PREFIX_VEX_0F381A) }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_381C) }, - { PREFIX_TABLE (PREFIX_VEX_381D) }, - { PREFIX_TABLE (PREFIX_VEX_381E) }, + { PREFIX_TABLE (PREFIX_VEX_0F381C) }, + { PREFIX_TABLE (PREFIX_VEX_0F381D) }, + { PREFIX_TABLE (PREFIX_VEX_0F381E) }, { Bad_Opcode }, /* 20 */ - { PREFIX_TABLE (PREFIX_VEX_3820) }, - { PREFIX_TABLE (PREFIX_VEX_3821) }, - { PREFIX_TABLE (PREFIX_VEX_3822) }, - { PREFIX_TABLE (PREFIX_VEX_3823) }, - { PREFIX_TABLE (PREFIX_VEX_3824) }, - { PREFIX_TABLE (PREFIX_VEX_3825) }, + { PREFIX_TABLE (PREFIX_VEX_0F3820) }, + { PREFIX_TABLE (PREFIX_VEX_0F3821) }, + { PREFIX_TABLE (PREFIX_VEX_0F3822) }, + { PREFIX_TABLE (PREFIX_VEX_0F3823) }, + { PREFIX_TABLE (PREFIX_VEX_0F3824) }, + { PREFIX_TABLE (PREFIX_VEX_0F3825) }, { Bad_Opcode }, { Bad_Opcode }, /* 28 */ - { PREFIX_TABLE (PREFIX_VEX_3828) }, - { PREFIX_TABLE (PREFIX_VEX_3829) }, - { PREFIX_TABLE (PREFIX_VEX_382A) }, - { PREFIX_TABLE (PREFIX_VEX_382B) }, - { PREFIX_TABLE (PREFIX_VEX_382C) }, - { PREFIX_TABLE (PREFIX_VEX_382D) }, - { PREFIX_TABLE (PREFIX_VEX_382E) }, - { PREFIX_TABLE (PREFIX_VEX_382F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3828) }, + { PREFIX_TABLE (PREFIX_VEX_0F3829) }, + { PREFIX_TABLE (PREFIX_VEX_0F382A) }, + { PREFIX_TABLE (PREFIX_VEX_0F382B) }, + { PREFIX_TABLE (PREFIX_VEX_0F382C) }, + { PREFIX_TABLE (PREFIX_VEX_0F382D) }, + { PREFIX_TABLE (PREFIX_VEX_0F382E) }, + { PREFIX_TABLE (PREFIX_VEX_0F382F) }, /* 30 */ - { PREFIX_TABLE (PREFIX_VEX_3830) }, - { PREFIX_TABLE (PREFIX_VEX_3831) }, - { PREFIX_TABLE (PREFIX_VEX_3832) }, - { PREFIX_TABLE (PREFIX_VEX_3833) }, - { PREFIX_TABLE (PREFIX_VEX_3834) }, - { PREFIX_TABLE (PREFIX_VEX_3835) }, - { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3837) }, + { PREFIX_TABLE (PREFIX_VEX_0F3830) }, + { PREFIX_TABLE (PREFIX_VEX_0F3831) }, + { PREFIX_TABLE (PREFIX_VEX_0F3832) }, + { PREFIX_TABLE (PREFIX_VEX_0F3833) }, + { PREFIX_TABLE (PREFIX_VEX_0F3834) }, + { PREFIX_TABLE (PREFIX_VEX_0F3835) }, + { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3837) }, /* 38 */ - { PREFIX_TABLE (PREFIX_VEX_3838) }, - { PREFIX_TABLE (PREFIX_VEX_3839) }, - { PREFIX_TABLE (PREFIX_VEX_383A) }, - { PREFIX_TABLE (PREFIX_VEX_383B) }, - { PREFIX_TABLE (PREFIX_VEX_383C) }, - { PREFIX_TABLE (PREFIX_VEX_383D) }, - { PREFIX_TABLE (PREFIX_VEX_383E) }, - { PREFIX_TABLE (PREFIX_VEX_383F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3838) }, + { PREFIX_TABLE (PREFIX_VEX_0F3839) }, + { PREFIX_TABLE (PREFIX_VEX_0F383A) }, + { PREFIX_TABLE (PREFIX_VEX_0F383B) }, + { PREFIX_TABLE (PREFIX_VEX_0F383C) }, + { PREFIX_TABLE (PREFIX_VEX_0F383D) }, + { PREFIX_TABLE (PREFIX_VEX_0F383E) }, + { PREFIX_TABLE (PREFIX_VEX_0F383F) }, /* 40 */ - { PREFIX_TABLE (PREFIX_VEX_3840) }, - { PREFIX_TABLE (PREFIX_VEX_3841) }, + { PREFIX_TABLE (PREFIX_VEX_0F3840) }, + { PREFIX_TABLE (PREFIX_VEX_0F3841) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -7631,17 +7724,17 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3896) }, - { PREFIX_TABLE (PREFIX_VEX_3897) }, + { PREFIX_TABLE (PREFIX_VEX_0F3896) }, + { PREFIX_TABLE (PREFIX_VEX_0F3897) }, /* 98 */ - { PREFIX_TABLE (PREFIX_VEX_3898) }, - { PREFIX_TABLE (PREFIX_VEX_3899) }, - { PREFIX_TABLE (PREFIX_VEX_389A) }, - { PREFIX_TABLE (PREFIX_VEX_389B) }, - { PREFIX_TABLE (PREFIX_VEX_389C) }, - { PREFIX_TABLE (PREFIX_VEX_389D) }, - { PREFIX_TABLE (PREFIX_VEX_389E) }, - { PREFIX_TABLE (PREFIX_VEX_389F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3898) }, + { PREFIX_TABLE (PREFIX_VEX_0F3899) }, + { PREFIX_TABLE (PREFIX_VEX_0F389A) }, + { PREFIX_TABLE (PREFIX_VEX_0F389B) }, + { PREFIX_TABLE (PREFIX_VEX_0F389C) }, + { PREFIX_TABLE (PREFIX_VEX_0F389D) }, + { PREFIX_TABLE (PREFIX_VEX_0F389E) }, + { PREFIX_TABLE (PREFIX_VEX_0F389F) }, /* a0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7649,17 +7742,17 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_38A6) }, - { PREFIX_TABLE (PREFIX_VEX_38A7) }, + { PREFIX_TABLE (PREFIX_VEX_0F38A6) }, + { PREFIX_TABLE (PREFIX_VEX_0F38A7) }, /* a8 */ - { PREFIX_TABLE (PREFIX_VEX_38A8) }, - { PREFIX_TABLE (PREFIX_VEX_38A9) }, - { PREFIX_TABLE (PREFIX_VEX_38AA) }, - { PREFIX_TABLE (PREFIX_VEX_38AB) }, - { PREFIX_TABLE (PREFIX_VEX_38AC) }, - { PREFIX_TABLE (PREFIX_VEX_38AD) }, - { PREFIX_TABLE (PREFIX_VEX_38AE) }, - { PREFIX_TABLE (PREFIX_VEX_38AF) }, + { PREFIX_TABLE (PREFIX_VEX_0F38A8) }, + { PREFIX_TABLE (PREFIX_VEX_0F38A9) }, + { PREFIX_TABLE (PREFIX_VEX_0F38AA) }, + { PREFIX_TABLE (PREFIX_VEX_0F38AB) }, + { PREFIX_TABLE (PREFIX_VEX_0F38AC) }, + { PREFIX_TABLE (PREFIX_VEX_0F38AD) }, + { PREFIX_TABLE (PREFIX_VEX_0F38AE) }, + { PREFIX_TABLE (PREFIX_VEX_0F38AF) }, /* b0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7667,17 +7760,17 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_38B6) }, - { PREFIX_TABLE (PREFIX_VEX_38B7) }, + { PREFIX_TABLE (PREFIX_VEX_0F38B6) }, + { PREFIX_TABLE (PREFIX_VEX_0F38B7) }, /* b8 */ - { PREFIX_TABLE (PREFIX_VEX_38B8) }, - { PREFIX_TABLE (PREFIX_VEX_38B9) }, - { PREFIX_TABLE (PREFIX_VEX_38BA) }, - { PREFIX_TABLE (PREFIX_VEX_38BB) }, - { PREFIX_TABLE (PREFIX_VEX_38BC) }, - { PREFIX_TABLE (PREFIX_VEX_38BD) }, - { PREFIX_TABLE (PREFIX_VEX_38BE) }, - { PREFIX_TABLE (PREFIX_VEX_38BF) }, + { PREFIX_TABLE (PREFIX_VEX_0F38B8) }, + { PREFIX_TABLE (PREFIX_VEX_0F38B9) }, + { PREFIX_TABLE (PREFIX_VEX_0F38BA) }, + { PREFIX_TABLE (PREFIX_VEX_0F38BB) }, + { PREFIX_TABLE (PREFIX_VEX_0F38BC) }, + { PREFIX_TABLE (PREFIX_VEX_0F38BD) }, + { PREFIX_TABLE (PREFIX_VEX_0F38BE) }, + { PREFIX_TABLE (PREFIX_VEX_0F38BF) }, /* c0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7709,11 +7802,11 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_38DB) }, - { PREFIX_TABLE (PREFIX_VEX_38DC) }, - { PREFIX_TABLE (PREFIX_VEX_38DD) }, - { PREFIX_TABLE (PREFIX_VEX_38DE) }, - { PREFIX_TABLE (PREFIX_VEX_38DF) }, + { PREFIX_TABLE (PREFIX_VEX_0F38DB) }, + { PREFIX_TABLE (PREFIX_VEX_0F38DC) }, + { PREFIX_TABLE (PREFIX_VEX_0F38DD) }, + { PREFIX_TABLE (PREFIX_VEX_0F38DE) }, + { PREFIX_TABLE (PREFIX_VEX_0F38DF) }, /* e0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7758,41 +7851,41 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3A04) }, - { PREFIX_TABLE (PREFIX_VEX_3A05) }, - { PREFIX_TABLE (PREFIX_VEX_3A06) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A04) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A05) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A06) }, { Bad_Opcode }, /* 08 */ - { PREFIX_TABLE (PREFIX_VEX_3A08) }, - { PREFIX_TABLE (PREFIX_VEX_3A09) }, - { PREFIX_TABLE (PREFIX_VEX_3A0A) }, - { PREFIX_TABLE (PREFIX_VEX_3A0B) }, - { PREFIX_TABLE (PREFIX_VEX_3A0C) }, - { PREFIX_TABLE (PREFIX_VEX_3A0D) }, - { PREFIX_TABLE (PREFIX_VEX_3A0E) }, - { PREFIX_TABLE (PREFIX_VEX_3A0F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A08) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A09) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A0A) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A0B) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A0C) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A0D) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A0E) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A0F) }, /* 10 */ { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3A14) }, - { PREFIX_TABLE (PREFIX_VEX_3A15) }, - { PREFIX_TABLE (PREFIX_VEX_3A16) }, - { PREFIX_TABLE (PREFIX_VEX_3A17) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A14) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A15) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A16) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A17) }, /* 18 */ - { PREFIX_TABLE (PREFIX_VEX_3A18) }, - { PREFIX_TABLE (PREFIX_VEX_3A19) }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3A18) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A19) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3A1D) }, { Bad_Opcode }, { Bad_Opcode }, /* 20 */ - { PREFIX_TABLE (PREFIX_VEX_3A20) }, - { PREFIX_TABLE (PREFIX_VEX_3A21) }, - { PREFIX_TABLE (PREFIX_VEX_3A22) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A20) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A21) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A22) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -7826,20 +7919,20 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 40 */ - { PREFIX_TABLE (PREFIX_VEX_3A40) }, - { PREFIX_TABLE (PREFIX_VEX_3A41) }, - { PREFIX_TABLE (PREFIX_VEX_3A42) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A40) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A41) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A42) }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3A44) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A44) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, /* 48 */ - { Bad_Opcode }, - { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3A4A) }, - { PREFIX_TABLE (PREFIX_VEX_3A4B) }, - { PREFIX_TABLE (PREFIX_VEX_3A4C) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A48) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A49) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A4A) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A4B) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A4C) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -7857,28 +7950,28 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3A5C) }, - { PREFIX_TABLE (PREFIX_VEX_3A5D) }, - { PREFIX_TABLE (PREFIX_VEX_3A5E) }, - { PREFIX_TABLE (PREFIX_VEX_3A5F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A5C) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A5D) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A5E) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A5F) }, /* 60 */ - { PREFIX_TABLE (PREFIX_VEX_3A60) }, - { PREFIX_TABLE (PREFIX_VEX_3A61) }, - { PREFIX_TABLE (PREFIX_VEX_3A62) }, - { PREFIX_TABLE (PREFIX_VEX_3A63) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A60) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A61) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A62) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A63) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, /* 68 */ - { PREFIX_TABLE (PREFIX_VEX_3A68) }, - { PREFIX_TABLE (PREFIX_VEX_3A69) }, - { PREFIX_TABLE (PREFIX_VEX_3A6A) }, - { PREFIX_TABLE (PREFIX_VEX_3A6B) }, - { PREFIX_TABLE (PREFIX_VEX_3A6C) }, - { PREFIX_TABLE (PREFIX_VEX_3A6D) }, - { PREFIX_TABLE (PREFIX_VEX_3A6E) }, - { PREFIX_TABLE (PREFIX_VEX_3A6F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A68) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A69) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A6A) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A6B) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A6C) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A6D) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A6E) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A6F) }, /* 70 */ { Bad_Opcode }, { Bad_Opcode }, @@ -7889,14 +7982,14 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 78 */ - { PREFIX_TABLE (PREFIX_VEX_3A78) }, - { PREFIX_TABLE (PREFIX_VEX_3A79) }, - { PREFIX_TABLE (PREFIX_VEX_3A7A) }, - { PREFIX_TABLE (PREFIX_VEX_3A7B) }, - { PREFIX_TABLE (PREFIX_VEX_3A7C) }, - { PREFIX_TABLE (PREFIX_VEX_3A7D) }, - { PREFIX_TABLE (PREFIX_VEX_3A7E) }, - { PREFIX_TABLE (PREFIX_VEX_3A7F) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A78) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A79) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A7A) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A7B) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A7C) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A7D) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A7E) }, + { PREFIX_TABLE (PREFIX_VEX_0F3A7F) }, /* 80 */ { Bad_Opcode }, { Bad_Opcode }, @@ -8004,7 +8097,7 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_3ADF) }, + { PREFIX_TABLE (PREFIX_VEX_0F3ADF) }, /* e0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -8045,1029 +8138,1068 @@ static const struct dis386 vex_table[][256] = { }; static const struct dis386 vex_len_table[][2] = { - /* VEX_LEN_10_P_1 */ + /* VEX_LEN_0F10_P_1 */ { - { VEX_W_TABLE (VEX_W_10_P_1) }, + { VEX_W_TABLE (VEX_W_0F10_P_1) }, + { VEX_W_TABLE (VEX_W_0F10_P_1) }, }, - /* VEX_LEN_10_P_3 */ + /* VEX_LEN_0F10_P_3 */ { - { VEX_W_TABLE (VEX_W_10_P_3) }, + { VEX_W_TABLE (VEX_W_0F10_P_3) }, + { VEX_W_TABLE (VEX_W_0F10_P_3) }, }, - /* VEX_LEN_11_P_1 */ + /* VEX_LEN_0F11_P_1 */ { - { VEX_W_TABLE (VEX_W_11_P_1) }, + { VEX_W_TABLE (VEX_W_0F11_P_1) }, + { VEX_W_TABLE (VEX_W_0F11_P_1) }, }, - /* VEX_LEN_11_P_3 */ + /* VEX_LEN_0F11_P_3 */ { - { VEX_W_TABLE (VEX_W_11_P_3) }, + { VEX_W_TABLE (VEX_W_0F11_P_3) }, + { VEX_W_TABLE (VEX_W_0F11_P_3) }, }, - /* VEX_LEN_12_P_0_M_0 */ + /* VEX_LEN_0F12_P_0_M_0 */ { - { VEX_W_TABLE (VEX_W_12_P_0_M_0) }, + { VEX_W_TABLE (VEX_W_0F12_P_0_M_0) }, }, - /* VEX_LEN_12_P_0_M_1 */ + /* VEX_LEN_0F12_P_0_M_1 */ { - { VEX_W_TABLE (VEX_W_12_P_0_M_1) }, + { VEX_W_TABLE (VEX_W_0F12_P_0_M_1) }, }, - /* VEX_LEN_12_P_2 */ + /* VEX_LEN_0F12_P_2 */ { - { VEX_W_TABLE (VEX_W_12_P_2) }, + { VEX_W_TABLE (VEX_W_0F12_P_2) }, }, - /* VEX_LEN_13_M_0 */ + /* VEX_LEN_0F13_M_0 */ { - { VEX_W_TABLE (VEX_W_13_M_0) }, + { VEX_W_TABLE (VEX_W_0F13_M_0) }, }, - /* VEX_LEN_16_P_0_M_0 */ + /* VEX_LEN_0F16_P_0_M_0 */ { - { VEX_W_TABLE (VEX_W_16_P_0_M_0) }, + { VEX_W_TABLE (VEX_W_0F16_P_0_M_0) }, }, - /* VEX_LEN_16_P_0_M_1 */ + /* VEX_LEN_0F16_P_0_M_1 */ { - { VEX_W_TABLE (VEX_W_16_P_0_M_1) }, + { VEX_W_TABLE (VEX_W_0F16_P_0_M_1) }, }, - /* VEX_LEN_16_P_2 */ + /* VEX_LEN_0F16_P_2 */ { - { VEX_W_TABLE (VEX_W_16_P_2) }, + { VEX_W_TABLE (VEX_W_0F16_P_2) }, }, - /* VEX_LEN_17_M_0 */ + /* VEX_LEN_0F17_M_0 */ { - { VEX_W_TABLE (VEX_W_17_M_0) }, + { VEX_W_TABLE (VEX_W_0F17_M_0) }, }, - /* VEX_LEN_2A_P_1 */ + /* VEX_LEN_0F2A_P_1 */ { - { "vcvtsi2ss%LQ", { XM, Vex128, Ev } }, + { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Ev } }, + { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Ev } }, }, - /* VEX_LEN_2A_P_3 */ + /* VEX_LEN_0F2A_P_3 */ { - { "vcvtsi2sd%LQ", { XM, Vex128, Ev } }, + { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Ev } }, + { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Ev } }, }, - /* VEX_LEN_2C_P_1 */ + /* VEX_LEN_0F2C_P_1 */ { - { "vcvttss2siY", { Gv, EXd } }, + { "vcvttss2siY", { Gv, EXdScalar } }, + { "vcvttss2siY", { Gv, EXdScalar } }, }, - /* VEX_LEN_2C_P_3 */ + /* VEX_LEN_0F2C_P_3 */ { - { "vcvttsd2siY", { Gv, EXq } }, + { "vcvttsd2siY", { Gv, EXqScalar } }, + { "vcvttsd2siY", { Gv, EXqScalar } }, }, - /* VEX_LEN_2D_P_1 */ + /* VEX_LEN_0F2D_P_1 */ { - { "vcvtss2siY", { Gv, EXd } }, + { "vcvtss2siY", { Gv, EXdScalar } }, + { "vcvtss2siY", { Gv, EXdScalar } }, }, - /* VEX_LEN_2D_P_3 */ + /* VEX_LEN_0F2D_P_3 */ { - { "vcvtsd2siY", { Gv, EXq } }, + { "vcvtsd2siY", { Gv, EXqScalar } }, + { "vcvtsd2siY", { Gv, EXqScalar } }, }, - /* VEX_LEN_2E_P_0 */ + /* VEX_LEN_0F2E_P_0 */ { - { VEX_W_TABLE (VEX_W_2E_P_0) }, + { VEX_W_TABLE (VEX_W_0F2E_P_0) }, + { VEX_W_TABLE (VEX_W_0F2E_P_0) }, }, - /* VEX_LEN_2E_P_2 */ + /* VEX_LEN_0F2E_P_2 */ { - { VEX_W_TABLE (VEX_W_2E_P_2) }, + { VEX_W_TABLE (VEX_W_0F2E_P_2) }, + { VEX_W_TABLE (VEX_W_0F2E_P_2) }, }, - /* VEX_LEN_2F_P_0 */ + /* VEX_LEN_0F2F_P_0 */ { - { VEX_W_TABLE (VEX_W_2F_P_0) }, + { VEX_W_TABLE (VEX_W_0F2F_P_0) }, + { VEX_W_TABLE (VEX_W_0F2F_P_0) }, }, - /* VEX_LEN_2F_P_2 */ + /* VEX_LEN_0F2F_P_2 */ { - { VEX_W_TABLE (VEX_W_2F_P_2) }, + { VEX_W_TABLE (VEX_W_0F2F_P_2) }, + { VEX_W_TABLE (VEX_W_0F2F_P_2) }, }, - /* VEX_LEN_51_P_1 */ + /* VEX_LEN_0F51_P_1 */ { - { VEX_W_TABLE (VEX_W_51_P_1) }, + { VEX_W_TABLE (VEX_W_0F51_P_1) }, + { VEX_W_TABLE (VEX_W_0F51_P_1) }, }, - /* VEX_LEN_51_P_3 */ + /* VEX_LEN_0F51_P_3 */ { - { VEX_W_TABLE (VEX_W_51_P_3) }, + { VEX_W_TABLE (VEX_W_0F51_P_3) }, + { VEX_W_TABLE (VEX_W_0F51_P_3) }, }, - /* VEX_LEN_52_P_1 */ + /* VEX_LEN_0F52_P_1 */ { - { VEX_W_TABLE (VEX_W_52_P_1) }, + { VEX_W_TABLE (VEX_W_0F52_P_1) }, + { VEX_W_TABLE (VEX_W_0F52_P_1) }, }, - /* VEX_LEN_53_P_1 */ + /* VEX_LEN_0F53_P_1 */ { - { VEX_W_TABLE (VEX_W_53_P_1) }, + { VEX_W_TABLE (VEX_W_0F53_P_1) }, + { VEX_W_TABLE (VEX_W_0F53_P_1) }, }, - /* VEX_LEN_58_P_1 */ + /* VEX_LEN_0F58_P_1 */ { - { VEX_W_TABLE (VEX_W_58_P_1) }, + { VEX_W_TABLE (VEX_W_0F58_P_1) }, + { VEX_W_TABLE (VEX_W_0F58_P_1) }, }, - /* VEX_LEN_58_P_3 */ + /* VEX_LEN_0F58_P_3 */ { - { VEX_W_TABLE (VEX_W_58_P_3) }, + { VEX_W_TABLE (VEX_W_0F58_P_3) }, + { VEX_W_TABLE (VEX_W_0F58_P_3) }, }, - /* VEX_LEN_59_P_1 */ + /* VEX_LEN_0F59_P_1 */ { - { VEX_W_TABLE (VEX_W_59_P_1) }, + { VEX_W_TABLE (VEX_W_0F59_P_1) }, + { VEX_W_TABLE (VEX_W_0F59_P_1) }, }, - /* VEX_LEN_59_P_3 */ + /* VEX_LEN_0F59_P_3 */ { - { VEX_W_TABLE (VEX_W_59_P_3) }, + { VEX_W_TABLE (VEX_W_0F59_P_3) }, + { VEX_W_TABLE (VEX_W_0F59_P_3) }, }, - /* VEX_LEN_5A_P_1 */ + /* VEX_LEN_0F5A_P_1 */ { - { VEX_W_TABLE (VEX_W_5A_P_1) }, + { VEX_W_TABLE (VEX_W_0F5A_P_1) }, + { VEX_W_TABLE (VEX_W_0F5A_P_1) }, }, - /* VEX_LEN_5A_P_3 */ + /* VEX_LEN_0F5A_P_3 */ { - { VEX_W_TABLE (VEX_W_5A_P_3) }, + { VEX_W_TABLE (VEX_W_0F5A_P_3) }, + { VEX_W_TABLE (VEX_W_0F5A_P_3) }, }, - /* VEX_LEN_5C_P_1 */ + /* VEX_LEN_0F5C_P_1 */ { - { VEX_W_TABLE (VEX_W_5C_P_1) }, + { VEX_W_TABLE (VEX_W_0F5C_P_1) }, + { VEX_W_TABLE (VEX_W_0F5C_P_1) }, }, - /* VEX_LEN_5C_P_3 */ + /* VEX_LEN_0F5C_P_3 */ { - { VEX_W_TABLE (VEX_W_5C_P_3) }, + { VEX_W_TABLE (VEX_W_0F5C_P_3) }, + { VEX_W_TABLE (VEX_W_0F5C_P_3) }, }, - /* VEX_LEN_5D_P_1 */ + /* VEX_LEN_0F5D_P_1 */ { - { VEX_W_TABLE (VEX_W_5D_P_1) }, + { VEX_W_TABLE (VEX_W_0F5D_P_1) }, + { VEX_W_TABLE (VEX_W_0F5D_P_1) }, }, - /* VEX_LEN_5D_P_3 */ + /* VEX_LEN_0F5D_P_3 */ { - { VEX_W_TABLE (VEX_W_5D_P_3) }, + { VEX_W_TABLE (VEX_W_0F5D_P_3) }, + { VEX_W_TABLE (VEX_W_0F5D_P_3) }, }, - /* VEX_LEN_5E_P_1 */ + /* VEX_LEN_0F5E_P_1 */ { - { VEX_W_TABLE (VEX_W_5E_P_1) }, + { VEX_W_TABLE (VEX_W_0F5E_P_1) }, + { VEX_W_TABLE (VEX_W_0F5E_P_1) }, }, - /* VEX_LEN_5E_P_3 */ + /* VEX_LEN_0F5E_P_3 */ { - { VEX_W_TABLE (VEX_W_5E_P_3) }, + { VEX_W_TABLE (VEX_W_0F5E_P_3) }, + { VEX_W_TABLE (VEX_W_0F5E_P_3) }, }, - /* VEX_LEN_5F_P_1 */ + /* VEX_LEN_0F5F_P_1 */ { - { VEX_W_TABLE (VEX_W_5F_P_1) }, + { VEX_W_TABLE (VEX_W_0F5F_P_1) }, + { VEX_W_TABLE (VEX_W_0F5F_P_1) }, }, - /* VEX_LEN_5F_P_3 */ + /* VEX_LEN_0F5F_P_3 */ { - { VEX_W_TABLE (VEX_W_5F_P_3) }, + { VEX_W_TABLE (VEX_W_0F5F_P_3) }, + { VEX_W_TABLE (VEX_W_0F5F_P_3) }, }, - /* VEX_LEN_60_P_2 */ + /* VEX_LEN_0F60_P_2 */ { - { VEX_W_TABLE (VEX_W_60_P_2) }, + { VEX_W_TABLE (VEX_W_0F60_P_2) }, }, - /* VEX_LEN_61_P_2 */ + /* VEX_LEN_0F61_P_2 */ { - { VEX_W_TABLE (VEX_W_61_P_2) }, + { VEX_W_TABLE (VEX_W_0F61_P_2) }, }, - /* VEX_LEN_62_P_2 */ + /* VEX_LEN_0F62_P_2 */ { - { VEX_W_TABLE (VEX_W_62_P_2) }, + { VEX_W_TABLE (VEX_W_0F62_P_2) }, }, - /* VEX_LEN_63_P_2 */ + /* VEX_LEN_0F63_P_2 */ { - { VEX_W_TABLE (VEX_W_63_P_2) }, + { VEX_W_TABLE (VEX_W_0F63_P_2) }, }, - /* VEX_LEN_64_P_2 */ + /* VEX_LEN_0F64_P_2 */ { - { VEX_W_TABLE (VEX_W_64_P_2) }, + { VEX_W_TABLE (VEX_W_0F64_P_2) }, }, - /* VEX_LEN_65_P_2 */ + /* VEX_LEN_0F65_P_2 */ { - { VEX_W_TABLE (VEX_W_65_P_2) }, + { VEX_W_TABLE (VEX_W_0F65_P_2) }, }, - /* VEX_LEN_66_P_2 */ + /* VEX_LEN_0F66_P_2 */ { - { VEX_W_TABLE (VEX_W_66_P_2) }, + { VEX_W_TABLE (VEX_W_0F66_P_2) }, }, - /* VEX_LEN_67_P_2 */ + /* VEX_LEN_0F67_P_2 */ { - { VEX_W_TABLE (VEX_W_67_P_2) }, + { VEX_W_TABLE (VEX_W_0F67_P_2) }, }, - /* VEX_LEN_68_P_2 */ + /* VEX_LEN_0F68_P_2 */ { - { VEX_W_TABLE (VEX_W_68_P_2) }, + { VEX_W_TABLE (VEX_W_0F68_P_2) }, }, - /* VEX_LEN_69_P_2 */ + /* VEX_LEN_0F69_P_2 */ { - { VEX_W_TABLE (VEX_W_69_P_2) }, + { VEX_W_TABLE (VEX_W_0F69_P_2) }, }, - /* VEX_LEN_6A_P_2 */ + /* VEX_LEN_0F6A_P_2 */ { - { VEX_W_TABLE (VEX_W_6A_P_2) }, + { VEX_W_TABLE (VEX_W_0F6A_P_2) }, }, - /* VEX_LEN_6B_P_2 */ + /* VEX_LEN_0F6B_P_2 */ { - { VEX_W_TABLE (VEX_W_6B_P_2) }, + { VEX_W_TABLE (VEX_W_0F6B_P_2) }, }, - /* VEX_LEN_6C_P_2 */ + /* VEX_LEN_0F6C_P_2 */ { - { VEX_W_TABLE (VEX_W_6C_P_2) }, + { VEX_W_TABLE (VEX_W_0F6C_P_2) }, }, - /* VEX_LEN_6D_P_2 */ + /* VEX_LEN_0F6D_P_2 */ { - { VEX_W_TABLE (VEX_W_6D_P_2) }, + { VEX_W_TABLE (VEX_W_0F6D_P_2) }, }, - /* VEX_LEN_6E_P_2 */ + /* VEX_LEN_0F6E_P_2 */ { - { "vmovK", { XM, Edq } }, + { "vmovK", { XMScalar, Edq } }, + { "vmovK", { XMScalar, Edq } }, }, - /* VEX_LEN_70_P_1 */ + /* VEX_LEN_0F70_P_1 */ { - { VEX_W_TABLE (VEX_W_70_P_1) }, + { VEX_W_TABLE (VEX_W_0F70_P_1) }, }, - /* VEX_LEN_70_P_2 */ + /* VEX_LEN_0F70_P_2 */ { - { VEX_W_TABLE (VEX_W_70_P_2) }, + { VEX_W_TABLE (VEX_W_0F70_P_2) }, }, - /* VEX_LEN_70_P_3 */ + /* VEX_LEN_0F70_P_3 */ { - { VEX_W_TABLE (VEX_W_70_P_3) }, + { VEX_W_TABLE (VEX_W_0F70_P_3) }, }, - /* VEX_LEN_71_R_2_P_2 */ + /* VEX_LEN_0F71_R_2_P_2 */ { - { VEX_W_TABLE (VEX_W_71_R_2_P_2) }, + { VEX_W_TABLE (VEX_W_0F71_R_2_P_2) }, }, - /* VEX_LEN_71_R_4_P_2 */ + /* VEX_LEN_0F71_R_4_P_2 */ { - { VEX_W_TABLE (VEX_W_71_R_4_P_2) }, + { VEX_W_TABLE (VEX_W_0F71_R_4_P_2) }, }, - /* VEX_LEN_71_R_6_P_2 */ + /* VEX_LEN_0F71_R_6_P_2 */ { - { VEX_W_TABLE (VEX_W_71_R_6_P_2) }, + { VEX_W_TABLE (VEX_W_0F71_R_6_P_2) }, }, - /* VEX_LEN_72_R_2_P_2 */ + /* VEX_LEN_0F72_R_2_P_2 */ { - { VEX_W_TABLE (VEX_W_72_R_2_P_2) }, + { VEX_W_TABLE (VEX_W_0F72_R_2_P_2) }, }, - /* VEX_LEN_72_R_4_P_2 */ + /* VEX_LEN_0F72_R_4_P_2 */ { - { VEX_W_TABLE (VEX_W_72_R_4_P_2) }, + { VEX_W_TABLE (VEX_W_0F72_R_4_P_2) }, }, - /* VEX_LEN_72_R_6_P_2 */ + /* VEX_LEN_0F72_R_6_P_2 */ { - { VEX_W_TABLE (VEX_W_72_R_6_P_2) }, + { VEX_W_TABLE (VEX_W_0F72_R_6_P_2) }, }, - /* VEX_LEN_73_R_2_P_2 */ + /* VEX_LEN_0F73_R_2_P_2 */ { - { VEX_W_TABLE (VEX_W_73_R_2_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_2_P_2) }, }, - /* VEX_LEN_73_R_3_P_2 */ + /* VEX_LEN_0F73_R_3_P_2 */ { - { VEX_W_TABLE (VEX_W_73_R_3_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_3_P_2) }, }, - /* VEX_LEN_73_R_6_P_2 */ + /* VEX_LEN_0F73_R_6_P_2 */ { - { VEX_W_TABLE (VEX_W_73_R_6_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_6_P_2) }, }, - /* VEX_LEN_73_R_7_P_2 */ + /* VEX_LEN_0F73_R_7_P_2 */ { - { VEX_W_TABLE (VEX_W_73_R_7_P_2) }, + { VEX_W_TABLE (VEX_W_0F73_R_7_P_2) }, }, - /* VEX_LEN_74_P_2 */ + /* VEX_LEN_0F74_P_2 */ { - { VEX_W_TABLE (VEX_W_74_P_2) }, + { VEX_W_TABLE (VEX_W_0F74_P_2) }, }, - /* VEX_LEN_75_P_2 */ + /* VEX_LEN_0F75_P_2 */ { - { VEX_W_TABLE (VEX_W_75_P_2) }, + { VEX_W_TABLE (VEX_W_0F75_P_2) }, }, - /* VEX_LEN_76_P_2 */ + /* VEX_LEN_0F76_P_2 */ { - { VEX_W_TABLE (VEX_W_76_P_2) }, + { VEX_W_TABLE (VEX_W_0F76_P_2) }, }, - /* VEX_LEN_7E_P_1 */ + /* VEX_LEN_0F7E_P_1 */ { - { VEX_W_TABLE (VEX_W_7E_P_1) }, + { VEX_W_TABLE (VEX_W_0F7E_P_1) }, + { VEX_W_TABLE (VEX_W_0F7E_P_1) }, }, - /* VEX_LEN_7E_P_2 */ + /* VEX_LEN_0F7E_P_2 */ { - { "vmovK", { Edq, XM } }, + { "vmovK", { Edq, XMScalar } }, + { "vmovK", { Edq, XMScalar } }, }, - /* VEX_LEN_AE_R_2_M_0 */ + /* VEX_LEN_0FAE_R_2_M_0 */ { - { VEX_W_TABLE (VEX_W_AE_R_2_M_0) }, + { VEX_W_TABLE (VEX_W_0FAE_R_2_M_0) }, }, - /* VEX_LEN_AE_R_3_M_0 */ + /* VEX_LEN_0FAE_R_3_M_0 */ { - { VEX_W_TABLE (VEX_W_AE_R_3_M_0) }, + { VEX_W_TABLE (VEX_W_0FAE_R_3_M_0) }, }, - /* VEX_LEN_C2_P_1 */ + /* VEX_LEN_0FC2_P_1 */ { - { VEX_W_TABLE (VEX_W_C2_P_1) }, + { VEX_W_TABLE (VEX_W_0FC2_P_1) }, + { VEX_W_TABLE (VEX_W_0FC2_P_1) }, }, - /* VEX_LEN_C2_P_3 */ + /* VEX_LEN_0FC2_P_3 */ { - { VEX_W_TABLE (VEX_W_C2_P_3) }, + { VEX_W_TABLE (VEX_W_0FC2_P_3) }, + { VEX_W_TABLE (VEX_W_0FC2_P_3) }, }, - /* VEX_LEN_C4_P_2 */ + /* VEX_LEN_0FC4_P_2 */ { - { VEX_W_TABLE (VEX_W_C4_P_2) }, + { VEX_W_TABLE (VEX_W_0FC4_P_2) }, }, - /* VEX_LEN_C5_P_2 */ + /* VEX_LEN_0FC5_P_2 */ { - { VEX_W_TABLE (VEX_W_C5_P_2) }, + { VEX_W_TABLE (VEX_W_0FC5_P_2) }, }, - /* VEX_LEN_D1_P_2 */ + /* VEX_LEN_0FD1_P_2 */ { - { VEX_W_TABLE (VEX_W_D1_P_2) }, + { VEX_W_TABLE (VEX_W_0FD1_P_2) }, }, - /* VEX_LEN_D2_P_2 */ + /* VEX_LEN_0FD2_P_2 */ { - { VEX_W_TABLE (VEX_W_D2_P_2) }, + { VEX_W_TABLE (VEX_W_0FD2_P_2) }, }, - /* VEX_LEN_D3_P_2 */ + /* VEX_LEN_0FD3_P_2 */ { - { VEX_W_TABLE (VEX_W_D3_P_2) }, + { VEX_W_TABLE (VEX_W_0FD3_P_2) }, }, - /* VEX_LEN_D4_P_2 */ + /* VEX_LEN_0FD4_P_2 */ { - { VEX_W_TABLE (VEX_W_D4_P_2) }, + { VEX_W_TABLE (VEX_W_0FD4_P_2) }, }, - /* VEX_LEN_D5_P_2 */ + /* VEX_LEN_0FD5_P_2 */ { - { VEX_W_TABLE (VEX_W_D5_P_2) }, + { VEX_W_TABLE (VEX_W_0FD5_P_2) }, }, - /* VEX_LEN_D6_P_2 */ + /* VEX_LEN_0FD6_P_2 */ { - { VEX_W_TABLE (VEX_W_D6_P_2) }, + { VEX_W_TABLE (VEX_W_0FD6_P_2) }, + { VEX_W_TABLE (VEX_W_0FD6_P_2) }, }, - /* VEX_LEN_D7_P_2_M_1 */ + /* VEX_LEN_0FD7_P_2_M_1 */ { - { VEX_W_TABLE (VEX_W_D7_P_2_M_1) }, + { VEX_W_TABLE (VEX_W_0FD7_P_2_M_1) }, }, - /* VEX_LEN_D8_P_2 */ + /* VEX_LEN_0FD8_P_2 */ { - { VEX_W_TABLE (VEX_W_D8_P_2) }, + { VEX_W_TABLE (VEX_W_0FD8_P_2) }, }, - /* VEX_LEN_D9_P_2 */ + /* VEX_LEN_0FD9_P_2 */ { - { VEX_W_TABLE (VEX_W_D9_P_2) }, + { VEX_W_TABLE (VEX_W_0FD9_P_2) }, }, - /* VEX_LEN_DA_P_2 */ + /* VEX_LEN_0FDA_P_2 */ { - { VEX_W_TABLE (VEX_W_DA_P_2) }, + { VEX_W_TABLE (VEX_W_0FDA_P_2) }, }, - /* VEX_LEN_DB_P_2 */ + /* VEX_LEN_0FDB_P_2 */ { - { VEX_W_TABLE (VEX_W_DB_P_2) }, + { VEX_W_TABLE (VEX_W_0FDB_P_2) }, }, - /* VEX_LEN_DC_P_2 */ + /* VEX_LEN_0FDC_P_2 */ { - { VEX_W_TABLE (VEX_W_DC_P_2) }, + { VEX_W_TABLE (VEX_W_0FDC_P_2) }, }, - /* VEX_LEN_DD_P_2 */ + /* VEX_LEN_0FDD_P_2 */ { - { VEX_W_TABLE (VEX_W_DD_P_2) }, + { VEX_W_TABLE (VEX_W_0FDD_P_2) }, }, - /* VEX_LEN_DE_P_2 */ + /* VEX_LEN_0FDE_P_2 */ { - { VEX_W_TABLE (VEX_W_DE_P_2) }, + { VEX_W_TABLE (VEX_W_0FDE_P_2) }, }, - /* VEX_LEN_DF_P_2 */ + /* VEX_LEN_0FDF_P_2 */ { - { VEX_W_TABLE (VEX_W_DF_P_2) }, + { VEX_W_TABLE (VEX_W_0FDF_P_2) }, }, - /* VEX_LEN_E0_P_2 */ + /* VEX_LEN_0FE0_P_2 */ { - { VEX_W_TABLE (VEX_W_E0_P_2) }, + { VEX_W_TABLE (VEX_W_0FE0_P_2) }, }, - /* VEX_LEN_E1_P_2 */ + /* VEX_LEN_0FE1_P_2 */ { - { VEX_W_TABLE (VEX_W_E1_P_2) }, + { VEX_W_TABLE (VEX_W_0FE1_P_2) }, }, - /* VEX_LEN_E2_P_2 */ + /* VEX_LEN_0FE2_P_2 */ { - { VEX_W_TABLE (VEX_W_E2_P_2) }, + { VEX_W_TABLE (VEX_W_0FE2_P_2) }, }, - /* VEX_LEN_E3_P_2 */ + /* VEX_LEN_0FE3_P_2 */ { - { VEX_W_TABLE (VEX_W_E3_P_2) }, + { VEX_W_TABLE (VEX_W_0FE3_P_2) }, }, - /* VEX_LEN_E4_P_2 */ + /* VEX_LEN_0FE4_P_2 */ { - { VEX_W_TABLE (VEX_W_E4_P_2) }, + { VEX_W_TABLE (VEX_W_0FE4_P_2) }, }, - /* VEX_LEN_E5_P_2 */ + /* VEX_LEN_0FE5_P_2 */ { - { VEX_W_TABLE (VEX_W_E5_P_2) }, + { VEX_W_TABLE (VEX_W_0FE5_P_2) }, }, - /* VEX_LEN_E8_P_2 */ + /* VEX_LEN_0FE8_P_2 */ { - { VEX_W_TABLE (VEX_W_E8_P_2) }, + { VEX_W_TABLE (VEX_W_0FE8_P_2) }, }, - /* VEX_LEN_E9_P_2 */ + /* VEX_LEN_0FE9_P_2 */ { - { VEX_W_TABLE (VEX_W_E9_P_2) }, + { VEX_W_TABLE (VEX_W_0FE9_P_2) }, }, - /* VEX_LEN_EA_P_2 */ + /* VEX_LEN_0FEA_P_2 */ { - { VEX_W_TABLE (VEX_W_EA_P_2) }, + { VEX_W_TABLE (VEX_W_0FEA_P_2) }, }, - /* VEX_LEN_EB_P_2 */ + /* VEX_LEN_0FEB_P_2 */ { - { VEX_W_TABLE (VEX_W_EB_P_2) }, + { VEX_W_TABLE (VEX_W_0FEB_P_2) }, }, - /* VEX_LEN_EC_P_2 */ + /* VEX_LEN_0FEC_P_2 */ { - { VEX_W_TABLE (VEX_W_EC_P_2) }, + { VEX_W_TABLE (VEX_W_0FEC_P_2) }, }, - /* VEX_LEN_ED_P_2 */ + /* VEX_LEN_0FED_P_2 */ { - { VEX_W_TABLE (VEX_W_ED_P_2) }, + { VEX_W_TABLE (VEX_W_0FED_P_2) }, }, - /* VEX_LEN_EE_P_2 */ + /* VEX_LEN_0FEE_P_2 */ { - { VEX_W_TABLE (VEX_W_EE_P_2) }, + { VEX_W_TABLE (VEX_W_0FEE_P_2) }, }, - /* VEX_LEN_EF_P_2 */ + /* VEX_LEN_0FEF_P_2 */ { - { VEX_W_TABLE (VEX_W_EF_P_2) }, + { VEX_W_TABLE (VEX_W_0FEF_P_2) }, }, - /* VEX_LEN_F1_P_2 */ + /* VEX_LEN_0FF1_P_2 */ { - { VEX_W_TABLE (VEX_W_F1_P_2) }, + { VEX_W_TABLE (VEX_W_0FF1_P_2) }, }, - /* VEX_LEN_F2_P_2 */ + /* VEX_LEN_0FF2_P_2 */ { - { VEX_W_TABLE (VEX_W_F2_P_2) }, - { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0FF2_P_2) }, }, - /* VEX_LEN_F3_P_2 */ + /* VEX_LEN_0FF3_P_2 */ { - { VEX_W_TABLE (VEX_W_F3_P_2) }, + { VEX_W_TABLE (VEX_W_0FF3_P_2) }, }, - /* VEX_LEN_F4_P_2 */ + /* VEX_LEN_0FF4_P_2 */ { - { VEX_W_TABLE (VEX_W_F4_P_2) }, + { VEX_W_TABLE (VEX_W_0FF4_P_2) }, }, - /* VEX_LEN_F5_P_2 */ + /* VEX_LEN_0FF5_P_2 */ { - { VEX_W_TABLE (VEX_W_F5_P_2) }, + { VEX_W_TABLE (VEX_W_0FF5_P_2) }, }, - /* VEX_LEN_F6_P_2 */ + /* VEX_LEN_0FF6_P_2 */ { - { VEX_W_TABLE (VEX_W_F6_P_2) }, + { VEX_W_TABLE (VEX_W_0FF6_P_2) }, }, - /* VEX_LEN_F7_P_2 */ + /* VEX_LEN_0FF7_P_2 */ { - { VEX_W_TABLE (VEX_W_F7_P_2) }, + { VEX_W_TABLE (VEX_W_0FF7_P_2) }, }, - /* VEX_LEN_F8_P_2 */ + /* VEX_LEN_0FF8_P_2 */ { - { VEX_W_TABLE (VEX_W_F8_P_2) }, + { VEX_W_TABLE (VEX_W_0FF8_P_2) }, }, - /* VEX_LEN_F9_P_2 */ + /* VEX_LEN_0FF9_P_2 */ { - { VEX_W_TABLE (VEX_W_F9_P_2) }, + { VEX_W_TABLE (VEX_W_0FF9_P_2) }, }, - /* VEX_LEN_FA_P_2 */ + /* VEX_LEN_0FFA_P_2 */ { - { VEX_W_TABLE (VEX_W_FA_P_2) }, + { VEX_W_TABLE (VEX_W_0FFA_P_2) }, }, - /* VEX_LEN_FB_P_2 */ + /* VEX_LEN_0FFB_P_2 */ { - { VEX_W_TABLE (VEX_W_FB_P_2) }, + { VEX_W_TABLE (VEX_W_0FFB_P_2) }, }, - /* VEX_LEN_FC_P_2 */ + /* VEX_LEN_0FFC_P_2 */ { - { VEX_W_TABLE (VEX_W_FC_P_2) }, + { VEX_W_TABLE (VEX_W_0FFC_P_2) }, }, - /* VEX_LEN_FD_P_2 */ + /* VEX_LEN_0FFD_P_2 */ { - { VEX_W_TABLE (VEX_W_FD_P_2) }, + { VEX_W_TABLE (VEX_W_0FFD_P_2) }, }, - /* VEX_LEN_FE_P_2 */ + /* VEX_LEN_0FFE_P_2 */ { - { VEX_W_TABLE (VEX_W_FE_P_2) }, + { VEX_W_TABLE (VEX_W_0FFE_P_2) }, }, - /* VEX_LEN_3800_P_2 */ + /* VEX_LEN_0F3800_P_2 */ { - { VEX_W_TABLE (VEX_W_3800_P_2) }, + { VEX_W_TABLE (VEX_W_0F3800_P_2) }, }, - /* VEX_LEN_3801_P_2 */ + /* VEX_LEN_0F3801_P_2 */ { - { VEX_W_TABLE (VEX_W_3801_P_2) }, + { VEX_W_TABLE (VEX_W_0F3801_P_2) }, }, - /* VEX_LEN_3802_P_2 */ + /* VEX_LEN_0F3802_P_2 */ { - { VEX_W_TABLE (VEX_W_3802_P_2) }, + { VEX_W_TABLE (VEX_W_0F3802_P_2) }, }, - /* VEX_LEN_3803_P_2 */ + /* VEX_LEN_0F3803_P_2 */ { - { VEX_W_TABLE (VEX_W_3803_P_2) }, + { VEX_W_TABLE (VEX_W_0F3803_P_2) }, }, - /* VEX_LEN_3804_P_2 */ + /* VEX_LEN_0F3804_P_2 */ { - { VEX_W_TABLE (VEX_W_3804_P_2) }, + { VEX_W_TABLE (VEX_W_0F3804_P_2) }, }, - /* VEX_LEN_3805_P_2 */ + /* VEX_LEN_0F3805_P_2 */ { - { VEX_W_TABLE (VEX_W_3805_P_2) }, + { VEX_W_TABLE (VEX_W_0F3805_P_2) }, }, - /* VEX_LEN_3806_P_2 */ + /* VEX_LEN_0F3806_P_2 */ { - { VEX_W_TABLE (VEX_W_3806_P_2) }, + { VEX_W_TABLE (VEX_W_0F3806_P_2) }, }, - /* VEX_LEN_3807_P_2 */ + /* VEX_LEN_0F3807_P_2 */ { - { VEX_W_TABLE (VEX_W_3807_P_2) }, + { VEX_W_TABLE (VEX_W_0F3807_P_2) }, }, - /* VEX_LEN_3808_P_2 */ + /* VEX_LEN_0F3808_P_2 */ { - { VEX_W_TABLE (VEX_W_3808_P_2) }, + { VEX_W_TABLE (VEX_W_0F3808_P_2) }, }, - /* VEX_LEN_3809_P_2 */ + /* VEX_LEN_0F3809_P_2 */ { - { VEX_W_TABLE (VEX_W_3809_P_2) }, + { VEX_W_TABLE (VEX_W_0F3809_P_2) }, }, - /* VEX_LEN_380A_P_2 */ + /* VEX_LEN_0F380A_P_2 */ { - { VEX_W_TABLE (VEX_W_380A_P_2) }, + { VEX_W_TABLE (VEX_W_0F380A_P_2) }, }, - /* VEX_LEN_380B_P_2 */ + /* VEX_LEN_0F380B_P_2 */ { - { VEX_W_TABLE (VEX_W_380B_P_2) }, + { VEX_W_TABLE (VEX_W_0F380B_P_2) }, }, - /* VEX_LEN_3819_P_2_M_0 */ + /* VEX_LEN_0F3819_P_2_M_0 */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3819_P_2_M_0) }, + { VEX_W_TABLE (VEX_W_0F3819_P_2_M_0) }, }, - /* VEX_LEN_381A_P_2_M_0 */ + /* VEX_LEN_0F381A_P_2_M_0 */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_381A_P_2_M_0) }, + { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0) }, }, - /* VEX_LEN_381C_P_2 */ + /* VEX_LEN_0F381C_P_2 */ { - { VEX_W_TABLE (VEX_W_381C_P_2) }, + { VEX_W_TABLE (VEX_W_0F381C_P_2) }, }, - /* VEX_LEN_381D_P_2 */ + /* VEX_LEN_0F381D_P_2 */ { - { VEX_W_TABLE (VEX_W_381D_P_2) }, + { VEX_W_TABLE (VEX_W_0F381D_P_2) }, }, - /* VEX_LEN_381E_P_2 */ + /* VEX_LEN_0F381E_P_2 */ { - { VEX_W_TABLE (VEX_W_381E_P_2) }, + { VEX_W_TABLE (VEX_W_0F381E_P_2) }, }, - /* VEX_LEN_3820_P_2 */ + /* VEX_LEN_0F3820_P_2 */ { - { VEX_W_TABLE (VEX_W_3820_P_2) }, + { VEX_W_TABLE (VEX_W_0F3820_P_2) }, }, - /* VEX_LEN_3821_P_2 */ + /* VEX_LEN_0F3821_P_2 */ { - { VEX_W_TABLE (VEX_W_3821_P_2) }, + { VEX_W_TABLE (VEX_W_0F3821_P_2) }, }, - /* VEX_LEN_3822_P_2 */ + /* VEX_LEN_0F3822_P_2 */ { - { VEX_W_TABLE (VEX_W_3822_P_2) }, + { VEX_W_TABLE (VEX_W_0F3822_P_2) }, }, - /* VEX_LEN_3823_P_2 */ + /* VEX_LEN_0F3823_P_2 */ { - { VEX_W_TABLE (VEX_W_3823_P_2) }, + { VEX_W_TABLE (VEX_W_0F3823_P_2) }, }, - /* VEX_LEN_3824_P_2 */ + /* VEX_LEN_0F3824_P_2 */ { - { VEX_W_TABLE (VEX_W_3824_P_2) }, + { VEX_W_TABLE (VEX_W_0F3824_P_2) }, }, - /* VEX_LEN_3825_P_2 */ + /* VEX_LEN_0F3825_P_2 */ { - { VEX_W_TABLE (VEX_W_3825_P_2) }, + { VEX_W_TABLE (VEX_W_0F3825_P_2) }, }, - /* VEX_LEN_3828_P_2 */ + /* VEX_LEN_0F3828_P_2 */ { - { VEX_W_TABLE (VEX_W_3828_P_2) }, + { VEX_W_TABLE (VEX_W_0F3828_P_2) }, }, - /* VEX_LEN_3829_P_2 */ + /* VEX_LEN_0F3829_P_2 */ { - { VEX_W_TABLE (VEX_W_3829_P_2) }, + { VEX_W_TABLE (VEX_W_0F3829_P_2) }, }, - /* VEX_LEN_382A_P_2_M_0 */ + /* VEX_LEN_0F382A_P_2_M_0 */ { - { VEX_W_TABLE (VEX_W_382A_P_2_M_0) }, + { VEX_W_TABLE (VEX_W_0F382A_P_2_M_0) }, }, - /* VEX_LEN_382B_P_2 */ + /* VEX_LEN_0F382B_P_2 */ { - { VEX_W_TABLE (VEX_W_382B_P_2) }, + { VEX_W_TABLE (VEX_W_0F382B_P_2) }, }, - /* VEX_LEN_3830_P_2 */ + /* VEX_LEN_0F3830_P_2 */ { - { VEX_W_TABLE (VEX_W_3830_P_2) }, + { VEX_W_TABLE (VEX_W_0F3830_P_2) }, }, - /* VEX_LEN_3831_P_2 */ + /* VEX_LEN_0F3831_P_2 */ { - { VEX_W_TABLE (VEX_W_3831_P_2) }, + { VEX_W_TABLE (VEX_W_0F3831_P_2) }, }, - /* VEX_LEN_3832_P_2 */ + /* VEX_LEN_0F3832_P_2 */ { - { VEX_W_TABLE (VEX_W_3832_P_2) }, + { VEX_W_TABLE (VEX_W_0F3832_P_2) }, }, - /* VEX_LEN_3833_P_2 */ + /* VEX_LEN_0F3833_P_2 */ { - { VEX_W_TABLE (VEX_W_3833_P_2) }, + { VEX_W_TABLE (VEX_W_0F3833_P_2) }, }, - /* VEX_LEN_3834_P_2 */ + /* VEX_LEN_0F3834_P_2 */ { - { VEX_W_TABLE (VEX_W_3834_P_2) }, + { VEX_W_TABLE (VEX_W_0F3834_P_2) }, }, - /* VEX_LEN_3835_P_2 */ + /* VEX_LEN_0F3835_P_2 */ { - { VEX_W_TABLE (VEX_W_3835_P_2) }, + { VEX_W_TABLE (VEX_W_0F3835_P_2) }, }, - /* VEX_LEN_3837_P_2 */ + /* VEX_LEN_0F3837_P_2 */ { - { VEX_W_TABLE (VEX_W_3837_P_2) }, + { VEX_W_TABLE (VEX_W_0F3837_P_2) }, }, - /* VEX_LEN_3838_P_2 */ + /* VEX_LEN_0F3838_P_2 */ { - { VEX_W_TABLE (VEX_W_3838_P_2) }, + { VEX_W_TABLE (VEX_W_0F3838_P_2) }, }, - /* VEX_LEN_3839_P_2 */ + /* VEX_LEN_0F3839_P_2 */ { - { VEX_W_TABLE (VEX_W_3839_P_2) }, + { VEX_W_TABLE (VEX_W_0F3839_P_2) }, }, - /* VEX_LEN_383A_P_2 */ + /* VEX_LEN_0F383A_P_2 */ { - { VEX_W_TABLE (VEX_W_383A_P_2) }, + { VEX_W_TABLE (VEX_W_0F383A_P_2) }, }, - /* VEX_LEN_383B_P_2 */ + /* VEX_LEN_0F383B_P_2 */ { - { VEX_W_TABLE (VEX_W_383B_P_2) }, + { VEX_W_TABLE (VEX_W_0F383B_P_2) }, }, - /* VEX_LEN_383C_P_2 */ + /* VEX_LEN_0F383C_P_2 */ { - { VEX_W_TABLE (VEX_W_383C_P_2) }, + { VEX_W_TABLE (VEX_W_0F383C_P_2) }, }, - /* VEX_LEN_383D_P_2 */ + /* VEX_LEN_0F383D_P_2 */ { - { VEX_W_TABLE (VEX_W_383D_P_2) }, + { VEX_W_TABLE (VEX_W_0F383D_P_2) }, }, - /* VEX_LEN_383E_P_2 */ + /* VEX_LEN_0F383E_P_2 */ { - { VEX_W_TABLE (VEX_W_383E_P_2) }, + { VEX_W_TABLE (VEX_W_0F383E_P_2) }, }, - /* VEX_LEN_383F_P_2 */ + /* VEX_LEN_0F383F_P_2 */ { - { VEX_W_TABLE (VEX_W_383F_P_2) }, + { VEX_W_TABLE (VEX_W_0F383F_P_2) }, }, - /* VEX_LEN_3840_P_2 */ + /* VEX_LEN_0F3840_P_2 */ { - { VEX_W_TABLE (VEX_W_3840_P_2) }, + { VEX_W_TABLE (VEX_W_0F3840_P_2) }, }, - /* VEX_LEN_3841_P_2 */ + /* VEX_LEN_0F3841_P_2 */ { - { VEX_W_TABLE (VEX_W_3841_P_2) }, + { VEX_W_TABLE (VEX_W_0F3841_P_2) }, }, - /* VEX_LEN_38DB_P_2 */ + /* VEX_LEN_0F38DB_P_2 */ { - { VEX_W_TABLE (VEX_W_38DB_P_2) }, + { VEX_W_TABLE (VEX_W_0F38DB_P_2) }, }, - /* VEX_LEN_38DC_P_2 */ + /* VEX_LEN_0F38DC_P_2 */ { - { VEX_W_TABLE (VEX_W_38DC_P_2) }, + { VEX_W_TABLE (VEX_W_0F38DC_P_2) }, }, - /* VEX_LEN_38DD_P_2 */ + /* VEX_LEN_0F38DD_P_2 */ { - { VEX_W_TABLE (VEX_W_38DD_P_2) }, + { VEX_W_TABLE (VEX_W_0F38DD_P_2) }, }, - /* VEX_LEN_38DE_P_2 */ + /* VEX_LEN_0F38DE_P_2 */ { - { VEX_W_TABLE (VEX_W_38DE_P_2) }, + { VEX_W_TABLE (VEX_W_0F38DE_P_2) }, }, - /* VEX_LEN_38DF_P_2 */ + /* VEX_LEN_0F38DF_P_2 */ { - { VEX_W_TABLE (VEX_W_38DF_P_2) }, + { VEX_W_TABLE (VEX_W_0F38DF_P_2) }, }, - /* VEX_LEN_3A06_P_2 */ + /* VEX_LEN_0F3A06_P_2 */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A06_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A06_P_2) }, }, - /* VEX_LEN_3A0A_P_2 */ + /* VEX_LEN_0F3A0A_P_2 */ { - { VEX_W_TABLE (VEX_W_3A0A_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0A_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0A_P_2) }, }, - /* VEX_LEN_3A0B_P_2 */ + /* VEX_LEN_0F3A0B_P_2 */ { - { VEX_W_TABLE (VEX_W_3A0B_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0B_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0B_P_2) }, }, - /* VEX_LEN_3A0E_P_2 */ + /* VEX_LEN_0F3A0E_P_2 */ { - { VEX_W_TABLE (VEX_W_3A0E_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0E_P_2) }, }, - /* VEX_LEN_3A0F_P_2 */ + /* VEX_LEN_0F3A0F_P_2 */ { - { VEX_W_TABLE (VEX_W_3A0F_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A0F_P_2) }, }, - /* VEX_LEN_3A14_P_2 */ + /* VEX_LEN_0F3A14_P_2 */ { - { VEX_W_TABLE (VEX_W_3A14_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A14_P_2) }, }, - /* VEX_LEN_3A15_P_2 */ + /* VEX_LEN_0F3A15_P_2 */ { - { VEX_W_TABLE (VEX_W_3A15_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A15_P_2) }, }, - /* VEX_LEN_3A16_P_2 */ + /* VEX_LEN_0F3A16_P_2 */ { { "vpextrK", { Edq, XM, Ib } }, }, - /* VEX_LEN_3A17_P_2 */ + /* VEX_LEN_0F3A17_P_2 */ { { "vextractps", { Edqd, XM, Ib } }, }, - /* VEX_LEN_3A18_P_2 */ + /* VEX_LEN_0F3A18_P_2 */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A18_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A18_P_2) }, }, - /* VEX_LEN_3A19_P_2 */ + /* VEX_LEN_0F3A19_P_2 */ { { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_3A19_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A19_P_2) }, }, - /* VEX_LEN_3A20_P_2 */ + /* VEX_LEN_0F3A20_P_2 */ { - { VEX_W_TABLE (VEX_W_3A20_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A20_P_2) }, }, - /* VEX_LEN_3A21_P_2 */ + /* VEX_LEN_0F3A21_P_2 */ { - { VEX_W_TABLE (VEX_W_3A21_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A21_P_2) }, }, - /* VEX_LEN_3A22_P_2 */ + /* VEX_LEN_0F3A22_P_2 */ { { "vpinsrK", { XM, Vex128, Edq, Ib } }, }, - /* VEX_LEN_3A41_P_2 */ + /* VEX_LEN_0F3A41_P_2 */ { - { VEX_W_TABLE (VEX_W_3A41_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A41_P_2) }, }, - /* VEX_LEN_3A42_P_2 */ + /* VEX_LEN_0F3A42_P_2 */ { - { VEX_W_TABLE (VEX_W_3A42_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A42_P_2) }, }, - /* VEX_LEN_3A44_P_2 */ + /* VEX_LEN_0F3A44_P_2 */ { - { VEX_W_TABLE (VEX_W_3A44_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A44_P_2) }, }, - /* VEX_LEN_3A4C_P_2 */ + /* VEX_LEN_0F3A4C_P_2 */ { - { VEX_W_TABLE (VEX_W_3A4C_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A4C_P_2) }, }, - /* VEX_LEN_3A60_P_2 */ + /* VEX_LEN_0F3A60_P_2 */ { - { VEX_W_TABLE (VEX_W_3A60_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A60_P_2) }, }, - /* VEX_LEN_3A61_P_2 */ + /* VEX_LEN_0F3A61_P_2 */ { - { VEX_W_TABLE (VEX_W_3A61_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A61_P_2) }, }, - /* VEX_LEN_3A62_P_2 */ + /* VEX_LEN_0F3A62_P_2 */ { - { VEX_W_TABLE (VEX_W_3A62_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A62_P_2) }, }, - /* VEX_LEN_3A63_P_2 */ + /* VEX_LEN_0F3A63_P_2 */ { - { VEX_W_TABLE (VEX_W_3A63_P_2) }, + { VEX_W_TABLE (VEX_W_0F3A63_P_2) }, }, - /* VEX_LEN_3A6A_P_2 */ + /* VEX_LEN_0F3A6A_P_2 */ { { "vfmaddss", { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } }, }, - /* VEX_LEN_3A6B_P_2 */ + /* VEX_LEN_0F3A6B_P_2 */ { { "vfmaddsd", { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } }, }, - /* VEX_LEN_3A6E_P_2 */ + /* VEX_LEN_0F3A6E_P_2 */ { { "vfmsubss", { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } }, }, - /* VEX_LEN_3A6F_P_2 */ + /* VEX_LEN_0F3A6F_P_2 */ { { "vfmsubsd", { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } }, }, - /* VEX_LEN_3A7A_P_2 */ + /* VEX_LEN_0F3A7A_P_2 */ { { "vfnmaddss", { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } }, }, - /* VEX_LEN_3A7B_P_2 */ + /* VEX_LEN_0F3A7B_P_2 */ { { "vfnmaddsd", { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } }, }, - /* VEX_LEN_3A7E_P_2 */ + /* VEX_LEN_0F3A7E_P_2 */ { { "vfnmsubss", { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } }, }, - /* VEX_LEN_3A7F_P_2 */ + /* VEX_LEN_0F3A7F_P_2 */ { { "vfnmsubsd", { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } }, }, - /* VEX_LEN_3ADF_P_2 */ + /* VEX_LEN_0F3ADF_P_2 */ { - { VEX_W_TABLE (VEX_W_3ADF_P_2) }, + { VEX_W_TABLE (VEX_W_0F3ADF_P_2) }, }, - /* VEX_LEN_XOP_09_80 */ + /* VEX_LEN_0FXOP_09_80 */ { { "vfrczps", { XM, EXxmm } }, { "vfrczps", { XM, EXymmq } }, }, - /* VEX_LEN_XOP_09_81 */ + /* VEX_LEN_0FXOP_09_81 */ { { "vfrczpd", { XM, EXxmm } }, { "vfrczpd", { XM, EXymmq } }, @@ -9076,1015 +9208,1025 @@ static const struct dis386 vex_len_table[][2] = { static const struct dis386 vex_w_table[][2] = { { - /* VEX_W_10_P_0 */ + /* VEX_W_0F10_P_0 */ { "vmovups", { XM, EXx } }, }, { - /* VEX_W_10_P_1 */ - { "vmovss", { XMVex, Vex128, EXd } }, + /* VEX_W_0F10_P_1 */ + { "vmovss", { XMVexScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_10_P_2 */ + /* VEX_W_0F10_P_2 */ { "vmovupd", { XM, EXx } }, }, { - /* VEX_W_10_P_3 */ - { "vmovsd", { XMVex, Vex128, EXq } }, + /* VEX_W_0F10_P_3 */ + { "vmovsd", { XMVexScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_11_P_0 */ + /* VEX_W_0F11_P_0 */ { "vmovups", { EXxS, XM } }, }, { - /* VEX_W_11_P_1 */ - { "vmovss", { EXdVexS, Vex128, XM } }, + /* VEX_W_0F11_P_1 */ + { "vmovss", { EXdVexScalarS, VexScalar, XMScalar } }, }, { - /* VEX_W_11_P_2 */ + /* VEX_W_0F11_P_2 */ { "vmovupd", { EXxS, XM } }, }, { - /* VEX_W_11_P_3 */ - { "vmovsd", { EXqVexS, Vex128, XM } }, + /* VEX_W_0F11_P_3 */ + { "vmovsd", { EXqVexScalarS, VexScalar, XMScalar } }, }, { - /* VEX_W_12_P_0_M_0 */ + /* VEX_W_0F12_P_0_M_0 */ { "vmovlps", { XM, Vex128, EXq } }, }, { - /* VEX_W_12_P_0_M_1 */ + /* VEX_W_0F12_P_0_M_1 */ { "vmovhlps", { XM, Vex128, EXq } }, }, { - /* VEX_W_12_P_1 */ + /* VEX_W_0F12_P_1 */ { "vmovsldup", { XM, EXx } }, }, { - /* VEX_W_12_P_2 */ + /* VEX_W_0F12_P_2 */ { "vmovlpd", { XM, Vex128, EXq } }, }, { - /* VEX_W_12_P_3 */ + /* VEX_W_0F12_P_3 */ { "vmovddup", { XM, EXymmq } }, }, { - /* VEX_W_13_M_0 */ + /* VEX_W_0F13_M_0 */ { "vmovlpX", { EXq, XM } }, }, { - /* VEX_W_14 */ + /* VEX_W_0F14 */ { "vunpcklpX", { XM, Vex, EXx } }, }, { - /* VEX_W_15 */ + /* VEX_W_0F15 */ { "vunpckhpX", { XM, Vex, EXx } }, }, { - /* VEX_W_16_P_0_M_0 */ + /* VEX_W_0F16_P_0_M_0 */ { "vmovhps", { XM, Vex128, EXq } }, }, { - /* VEX_W_16_P_0_M_1 */ + /* VEX_W_0F16_P_0_M_1 */ { "vmovlhps", { XM, Vex128, EXq } }, }, { - /* VEX_W_16_P_1 */ + /* VEX_W_0F16_P_1 */ { "vmovshdup", { XM, EXx } }, }, { - /* VEX_W_16_P_2 */ + /* VEX_W_0F16_P_2 */ { "vmovhpd", { XM, Vex128, EXq } }, }, { - /* VEX_W_17_M_0 */ + /* VEX_W_0F17_M_0 */ { "vmovhpX", { EXq, XM } }, }, { - /* VEX_W_28 */ + /* VEX_W_0F28 */ { "vmovapX", { XM, EXx } }, }, { - /* VEX_W_29 */ + /* VEX_W_0F29 */ { "vmovapX", { EXxS, XM } }, }, { - /* VEX_W_2B_M_0 */ + /* VEX_W_0F2B_M_0 */ { "vmovntpX", { Mx, XM } }, }, { - /* VEX_W_2E_P_0 */ - { "vucomiss", { XM, EXd } }, + /* VEX_W_0F2E_P_0 */ + { "vucomiss", { XMScalar, EXdScalar } }, }, { - /* VEX_W_2E_P_2 */ - { "vucomisd", { XM, EXq } }, + /* VEX_W_0F2E_P_2 */ + { "vucomisd", { XMScalar, EXqScalar } }, }, { - /* VEX_W_2F_P_0 */ - { "vcomiss", { XM, EXd } }, + /* VEX_W_0F2F_P_0 */ + { "vcomiss", { XMScalar, EXdScalar } }, }, { - /* VEX_W_2F_P_2 */ - { "vcomisd", { XM, EXq } }, + /* VEX_W_0F2F_P_2 */ + { "vcomisd", { XMScalar, EXqScalar } }, }, { - /* VEX_W_50_M_0 */ + /* VEX_W_0F50_M_0 */ { "vmovmskpX", { Gdq, XS } }, }, { - /* VEX_W_51_P_0 */ + /* VEX_W_0F51_P_0 */ { "vsqrtps", { XM, EXx } }, }, { - /* VEX_W_51_P_1 */ - { "vsqrtss", { XM, Vex128, EXd } }, + /* VEX_W_0F51_P_1 */ + { "vsqrtss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_51_P_2 */ + /* VEX_W_0F51_P_2 */ { "vsqrtpd", { XM, EXx } }, }, { - /* VEX_W_51_P_3 */ - { "vsqrtsd", { XM, Vex128, EXq } }, + /* VEX_W_0F51_P_3 */ + { "vsqrtsd", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_52_P_0 */ + /* VEX_W_0F52_P_0 */ { "vrsqrtps", { XM, EXx } }, }, { - /* VEX_W_52_P_1 */ - { "vrsqrtss", { XM, Vex128, EXd } }, + /* VEX_W_0F52_P_1 */ + { "vrsqrtss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_53_P_0 */ + /* VEX_W_0F53_P_0 */ { "vrcpps", { XM, EXx } }, }, { - /* VEX_W_53_P_1 */ - { "vrcpss", { XM, Vex128, EXd } }, + /* VEX_W_0F53_P_1 */ + { "vrcpss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_58_P_0 */ + /* VEX_W_0F58_P_0 */ { "vaddps", { XM, Vex, EXx } }, }, { - /* VEX_W_58_P_1 */ - { "vaddss", { XM, Vex128, EXd } }, + /* VEX_W_0F58_P_1 */ + { "vaddss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_58_P_2 */ + /* VEX_W_0F58_P_2 */ { "vaddpd", { XM, Vex, EXx } }, }, { - /* VEX_W_58_P_3 */ - { "vaddsd", { XM, Vex128, EXq } }, + /* VEX_W_0F58_P_3 */ + { "vaddsd", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_59_P_0 */ + /* VEX_W_0F59_P_0 */ { "vmulps", { XM, Vex, EXx } }, }, { - /* VEX_W_59_P_1 */ - { "vmulss", { XM, Vex128, EXd } }, + /* VEX_W_0F59_P_1 */ + { "vmulss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_59_P_2 */ + /* VEX_W_0F59_P_2 */ { "vmulpd", { XM, Vex, EXx } }, }, { - /* VEX_W_59_P_3 */ - { "vmulsd", { XM, Vex128, EXq } }, + /* VEX_W_0F59_P_3 */ + { "vmulsd", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_5A_P_0 */ + /* VEX_W_0F5A_P_0 */ { "vcvtps2pd", { XM, EXxmmq } }, }, { - /* VEX_W_5A_P_1 */ - { "vcvtss2sd", { XM, Vex128, EXd } }, + /* VEX_W_0F5A_P_1 */ + { "vcvtss2sd", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_5A_P_3 */ - { "vcvtsd2ss", { XM, Vex128, EXq } }, + /* VEX_W_0F5A_P_3 */ + { "vcvtsd2ss", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_5B_P_0 */ + /* VEX_W_0F5B_P_0 */ { "vcvtdq2ps", { XM, EXx } }, }, { - /* VEX_W_5B_P_1 */ + /* VEX_W_0F5B_P_1 */ { "vcvttps2dq", { XM, EXx } }, }, { - /* VEX_W_5B_P_2 */ + /* VEX_W_0F5B_P_2 */ { "vcvtps2dq", { XM, EXx } }, }, { - /* VEX_W_5C_P_0 */ + /* VEX_W_0F5C_P_0 */ { "vsubps", { XM, Vex, EXx } }, }, { - /* VEX_W_5C_P_1 */ - { "vsubss", { XM, Vex128, EXd } }, + /* VEX_W_0F5C_P_1 */ + { "vsubss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_5C_P_2 */ + /* VEX_W_0F5C_P_2 */ { "vsubpd", { XM, Vex, EXx } }, }, { - /* VEX_W_5C_P_3 */ - { "vsubsd", { XM, Vex128, EXq } }, + /* VEX_W_0F5C_P_3 */ + { "vsubsd", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_5D_P_0 */ + /* VEX_W_0F5D_P_0 */ { "vminps", { XM, Vex, EXx } }, }, { - /* VEX_W_5D_P_1 */ - { "vminss", { XM, Vex128, EXd } }, + /* VEX_W_0F5D_P_1 */ + { "vminss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_5D_P_2 */ + /* VEX_W_0F5D_P_2 */ { "vminpd", { XM, Vex, EXx } }, }, { - /* VEX_W_5D_P_3 */ - { "vminsd", { XM, Vex128, EXq } }, + /* VEX_W_0F5D_P_3 */ + { "vminsd", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_5E_P_0 */ + /* VEX_W_0F5E_P_0 */ { "vdivps", { XM, Vex, EXx } }, }, { - /* VEX_W_5E_P_1 */ - { "vdivss", { XM, Vex128, EXd } }, + /* VEX_W_0F5E_P_1 */ + { "vdivss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_5E_P_2 */ + /* VEX_W_0F5E_P_2 */ { "vdivpd", { XM, Vex, EXx } }, }, { - /* VEX_W_5E_P_3 */ - { "vdivsd", { XM, Vex128, EXq } }, + /* VEX_W_0F5E_P_3 */ + { "vdivsd", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_5F_P_0 */ + /* VEX_W_0F5F_P_0 */ { "vmaxps", { XM, Vex, EXx } }, }, { - /* VEX_W_5F_P_1 */ - { "vmaxss", { XM, Vex128, EXd } }, + /* VEX_W_0F5F_P_1 */ + { "vmaxss", { XMScalar, VexScalar, EXdScalar } }, }, { - /* VEX_W_5F_P_2 */ + /* VEX_W_0F5F_P_2 */ { "vmaxpd", { XM, Vex, EXx } }, }, { - /* VEX_W_5F_P_3 */ - { "vmaxsd", { XM, Vex128, EXq } }, + /* VEX_W_0F5F_P_3 */ + { "vmaxsd", { XMScalar, VexScalar, EXqScalar } }, }, { - /* VEX_W_60_P_2 */ + /* VEX_W_0F60_P_2 */ { "vpunpcklbw", { XM, Vex128, EXx } }, }, { - /* VEX_W_61_P_2 */ + /* VEX_W_0F61_P_2 */ { "vpunpcklwd", { XM, Vex128, EXx } }, }, { - /* VEX_W_62_P_2 */ + /* VEX_W_0F62_P_2 */ { "vpunpckldq", { XM, Vex128, EXx } }, }, { - /* VEX_W_63_P_2 */ + /* VEX_W_0F63_P_2 */ { "vpacksswb", { XM, Vex128, EXx } }, }, { - /* VEX_W_64_P_2 */ + /* VEX_W_0F64_P_2 */ { "vpcmpgtb", { XM, Vex128, EXx } }, }, { - /* VEX_W_65_P_2 */ + /* VEX_W_0F65_P_2 */ { "vpcmpgtw", { XM, Vex128, EXx } }, }, { - /* VEX_W_66_P_2 */ + /* VEX_W_0F66_P_2 */ { "vpcmpgtd", { XM, Vex128, EXx } }, }, { - /* VEX_W_67_P_2 */ + /* VEX_W_0F67_P_2 */ { "vpackuswb", { XM, Vex128, EXx } }, }, { - /* VEX_W_68_P_2 */ + /* VEX_W_0F68_P_2 */ { "vpunpckhbw", { XM, Vex128, EXx } }, }, { - /* VEX_W_69_P_2 */ + /* VEX_W_0F69_P_2 */ { "vpunpckhwd", { XM, Vex128, EXx } }, }, { - /* VEX_W_6A_P_2 */ + /* VEX_W_0F6A_P_2 */ { "vpunpckhdq", { XM, Vex128, EXx } }, }, { - /* VEX_W_6B_P_2 */ + /* VEX_W_0F6B_P_2 */ { "vpackssdw", { XM, Vex128, EXx } }, }, { - /* VEX_W_6C_P_2 */ + /* VEX_W_0F6C_P_2 */ { "vpunpcklqdq", { XM, Vex128, EXx } }, }, { - /* VEX_W_6D_P_2 */ + /* VEX_W_0F6D_P_2 */ { "vpunpckhqdq", { XM, Vex128, EXx } }, }, { - /* VEX_W_6F_P_1 */ + /* VEX_W_0F6F_P_1 */ { "vmovdqu", { XM, EXx } }, }, { - /* VEX_W_6F_P_2 */ + /* VEX_W_0F6F_P_2 */ { "vmovdqa", { XM, EXx } }, }, { - /* VEX_W_70_P_1 */ + /* VEX_W_0F70_P_1 */ { "vpshufhw", { XM, EXx, Ib } }, }, { - /* VEX_W_70_P_2 */ + /* VEX_W_0F70_P_2 */ { "vpshufd", { XM, EXx, Ib } }, }, { - /* VEX_W_70_P_3 */ + /* VEX_W_0F70_P_3 */ { "vpshuflw", { XM, EXx, Ib } }, }, { - /* VEX_W_71_R_2_P_2 */ + /* VEX_W_0F71_R_2_P_2 */ { "vpsrlw", { Vex128, XS, Ib } }, }, { - /* VEX_W_71_R_4_P_2 */ + /* VEX_W_0F71_R_4_P_2 */ { "vpsraw", { Vex128, XS, Ib } }, }, { - /* VEX_W_71_R_6_P_2 */ + /* VEX_W_0F71_R_6_P_2 */ { "vpsllw", { Vex128, XS, Ib } }, }, { - /* VEX_W_72_R_2_P_2 */ + /* VEX_W_0F72_R_2_P_2 */ { "vpsrld", { Vex128, XS, Ib } }, }, { - /* VEX_W_72_R_4_P_2 */ + /* VEX_W_0F72_R_4_P_2 */ { "vpsrad", { Vex128, XS, Ib } }, }, { - /* VEX_W_72_R_6_P_2 */ + /* VEX_W_0F72_R_6_P_2 */ { "vpslld", { Vex128, XS, Ib } }, }, { - /* VEX_W_73_R_2_P_2 */ + /* VEX_W_0F73_R_2_P_2 */ { "vpsrlq", { Vex128, XS, Ib } }, }, { - /* VEX_W_73_R_3_P_2 */ + /* VEX_W_0F73_R_3_P_2 */ { "vpsrldq", { Vex128, XS, Ib } }, }, { - /* VEX_W_73_R_6_P_2 */ + /* VEX_W_0F73_R_6_P_2 */ { "vpsllq", { Vex128, XS, Ib } }, }, { - /* VEX_W_73_R_7_P_2 */ + /* VEX_W_0F73_R_7_P_2 */ { "vpslldq", { Vex128, XS, Ib } }, }, { - /* VEX_W_74_P_2 */ + /* VEX_W_0F74_P_2 */ { "vpcmpeqb", { XM, Vex128, EXx } }, }, { - /* VEX_W_75_P_2 */ + /* VEX_W_0F75_P_2 */ { "vpcmpeqw", { XM, Vex128, EXx } }, }, { - /* VEX_W_76_P_2 */ + /* VEX_W_0F76_P_2 */ { "vpcmpeqd", { XM, Vex128, EXx } }, }, { - /* VEX_W_77_P_0 */ + /* VEX_W_0F77_P_0 */ { "", { VZERO } }, }, { - /* VEX_W_7C_P_2 */ + /* VEX_W_0F7C_P_2 */ { "vhaddpd", { XM, Vex, EXx } }, }, { - /* VEX_W_7C_P_3 */ + /* VEX_W_0F7C_P_3 */ { "vhaddps", { XM, Vex, EXx } }, }, { - /* VEX_W_7D_P_2 */ + /* VEX_W_0F7D_P_2 */ { "vhsubpd", { XM, Vex, EXx } }, }, { - /* VEX_W_7D_P_3 */ + /* VEX_W_0F7D_P_3 */ { "vhsubps", { XM, Vex, EXx } }, }, { - /* VEX_W_7E_P_1 */ - { "vmovq", { XM, EXq } }, + /* VEX_W_0F7E_P_1 */ + { "vmovq", { XMScalar, EXqScalar } }, }, { - /* VEX_W_7F_P_1 */ + /* VEX_W_0F7F_P_1 */ { "vmovdqu", { EXxS, XM } }, }, { - /* VEX_W_7F_P_2 */ + /* VEX_W_0F7F_P_2 */ { "vmovdqa", { EXxS, XM } }, }, { - /* VEX_W_AE_R_2_M_0 */ + /* VEX_W_0FAE_R_2_M_0 */ { "vldmxcsr", { Md } }, }, { - /* VEX_W_AE_R_3_M_0 */ + /* VEX_W_0FAE_R_3_M_0 */ { "vstmxcsr", { Md } }, }, { - /* VEX_W_C2_P_0 */ + /* VEX_W_0FC2_P_0 */ { "vcmpps", { XM, Vex, EXx, VCMP } }, }, { - /* VEX_W_C2_P_1 */ - { "vcmpss", { XM, Vex128, EXd, VCMP } }, + /* VEX_W_0FC2_P_1 */ + { "vcmpss", { XMScalar, VexScalar, EXdScalar, VCMP } }, }, { - /* VEX_W_C2_P_2 */ + /* VEX_W_0FC2_P_2 */ { "vcmppd", { XM, Vex, EXx, VCMP } }, }, { - /* VEX_W_C2_P_3 */ - { "vcmpsd", { XM, Vex128, EXq, VCMP } }, + /* VEX_W_0FC2_P_3 */ + { "vcmpsd", { XMScalar, VexScalar, EXqScalar, VCMP } }, }, { - /* VEX_W_C4_P_2 */ + /* VEX_W_0FC4_P_2 */ { "vpinsrw", { XM, Vex128, Edqw, Ib } }, }, { - /* VEX_W_C5_P_2 */ + /* VEX_W_0FC5_P_2 */ { "vpextrw", { Gdq, XS, Ib } }, }, { - /* VEX_W_D0_P_2 */ + /* VEX_W_0FD0_P_2 */ { "vaddsubpd", { XM, Vex, EXx } }, }, { - /* VEX_W_D0_P_3 */ + /* VEX_W_0FD0_P_3 */ { "vaddsubps", { XM, Vex, EXx } }, }, { - /* VEX_W_D1_P_2 */ + /* VEX_W_0FD1_P_2 */ { "vpsrlw", { XM, Vex128, EXx } }, }, { - /* VEX_W_D2_P_2 */ + /* VEX_W_0FD2_P_2 */ { "vpsrld", { XM, Vex128, EXx } }, }, { - /* VEX_W_D3_P_2 */ + /* VEX_W_0FD3_P_2 */ { "vpsrlq", { XM, Vex128, EXx } }, }, { - /* VEX_W_D4_P_2 */ + /* VEX_W_0FD4_P_2 */ { "vpaddq", { XM, Vex128, EXx } }, }, { - /* VEX_W_D5_P_2 */ + /* VEX_W_0FD5_P_2 */ { "vpmullw", { XM, Vex128, EXx } }, }, { - /* VEX_W_D6_P_2 */ - { "vmovq", { EXqS, XM } }, + /* VEX_W_0FD6_P_2 */ + { "vmovq", { EXqScalarS, XMScalar } }, }, { - /* VEX_W_D7_P_2_M_1 */ + /* VEX_W_0FD7_P_2_M_1 */ { "vpmovmskb", { Gdq, XS } }, }, { - /* VEX_W_D8_P_2 */ + /* VEX_W_0FD8_P_2 */ { "vpsubusb", { XM, Vex128, EXx } }, }, { - /* VEX_W_D9_P_2 */ + /* VEX_W_0FD9_P_2 */ { "vpsubusw", { XM, Vex128, EXx } }, }, { - /* VEX_W_DA_P_2 */ + /* VEX_W_0FDA_P_2 */ { "vpminub", { XM, Vex128, EXx } }, }, { - /* VEX_W_DB_P_2 */ + /* VEX_W_0FDB_P_2 */ { "vpand", { XM, Vex128, EXx } }, }, { - /* VEX_W_DC_P_2 */ + /* VEX_W_0FDC_P_2 */ { "vpaddusb", { XM, Vex128, EXx } }, }, { - /* VEX_W_DD_P_2 */ + /* VEX_W_0FDD_P_2 */ { "vpaddusw", { XM, Vex128, EXx } }, }, { - /* VEX_W_DE_P_2 */ + /* VEX_W_0FDE_P_2 */ { "vpmaxub", { XM, Vex128, EXx } }, }, { - /* VEX_W_DF_P_2 */ + /* VEX_W_0FDF_P_2 */ { "vpandn", { XM, Vex128, EXx } }, }, { - /* VEX_W_E0_P_2 */ + /* VEX_W_0FE0_P_2 */ { "vpavgb", { XM, Vex128, EXx } }, }, { - /* VEX_W_E1_P_2 */ + /* VEX_W_0FE1_P_2 */ { "vpsraw", { XM, Vex128, EXx } }, }, { - /* VEX_W_E2_P_2 */ + /* VEX_W_0FE2_P_2 */ { "vpsrad", { XM, Vex128, EXx } }, }, { - /* VEX_W_E3_P_2 */ + /* VEX_W_0FE3_P_2 */ { "vpavgw", { XM, Vex128, EXx } }, }, { - /* VEX_W_E4_P_2 */ + /* VEX_W_0FE4_P_2 */ { "vpmulhuw", { XM, Vex128, EXx } }, }, { - /* VEX_W_E5_P_2 */ + /* VEX_W_0FE5_P_2 */ { "vpmulhw", { XM, Vex128, EXx } }, }, { - /* VEX_W_E6_P_1 */ + /* VEX_W_0FE6_P_1 */ { "vcvtdq2pd", { XM, EXxmmq } }, }, { - /* VEX_W_E6_P_2 */ + /* VEX_W_0FE6_P_2 */ { "vcvttpd2dq%XY", { XMM, EXx } }, }, { - /* VEX_W_E6_P_3 */ + /* VEX_W_0FE6_P_3 */ { "vcvtpd2dq%XY", { XMM, EXx } }, }, { - /* VEX_W_E7_P_2_M_0 */ + /* VEX_W_0FE7_P_2_M_0 */ { "vmovntdq", { Mx, XM } }, }, { - /* VEX_W_E8_P_2 */ + /* VEX_W_0FE8_P_2 */ { "vpsubsb", { XM, Vex128, EXx } }, }, { - /* VEX_W_E9_P_2 */ + /* VEX_W_0FE9_P_2 */ { "vpsubsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_EA_P_2 */ + /* VEX_W_0FEA_P_2 */ { "vpminsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_EB_P_2 */ + /* VEX_W_0FEB_P_2 */ { "vpor", { XM, Vex128, EXx } }, }, { - /* VEX_W_EC_P_2 */ + /* VEX_W_0FEC_P_2 */ { "vpaddsb", { XM, Vex128, EXx } }, }, { - /* VEX_W_ED_P_2 */ + /* VEX_W_0FED_P_2 */ { "vpaddsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_EE_P_2 */ + /* VEX_W_0FEE_P_2 */ { "vpmaxsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_EF_P_2 */ + /* VEX_W_0FEF_P_2 */ { "vpxor", { XM, Vex128, EXx } }, }, { - /* VEX_W_F0_P_3_M_0 */ + /* VEX_W_0FF0_P_3_M_0 */ { "vlddqu", { XM, M } }, }, { - /* VEX_W_F1_P_2 */ + /* VEX_W_0FF1_P_2 */ { "vpsllw", { XM, Vex128, EXx } }, }, { - /* VEX_W_F2_P_2 */ + /* VEX_W_0FF2_P_2 */ { "vpslld", { XM, Vex128, EXx } }, }, { - /* VEX_W_F3_P_2 */ + /* VEX_W_0FF3_P_2 */ { "vpsllq", { XM, Vex128, EXx } }, }, { - /* VEX_W_F4_P_2 */ + /* VEX_W_0FF4_P_2 */ { "vpmuludq", { XM, Vex128, EXx } }, }, { - /* VEX_W_F5_P_2 */ + /* VEX_W_0FF5_P_2 */ { "vpmaddwd", { XM, Vex128, EXx } }, }, { - /* VEX_W_F6_P_2 */ + /* VEX_W_0FF6_P_2 */ { "vpsadbw", { XM, Vex128, EXx } }, }, { - /* VEX_W_F7_P_2 */ + /* VEX_W_0FF7_P_2 */ { "vmaskmovdqu", { XM, XS } }, }, { - /* VEX_W_F8_P_2 */ + /* VEX_W_0FF8_P_2 */ { "vpsubb", { XM, Vex128, EXx } }, }, { - /* VEX_W_F9_P_2 */ + /* VEX_W_0FF9_P_2 */ { "vpsubw", { XM, Vex128, EXx } }, }, { - /* VEX_W_FA_P_2 */ + /* VEX_W_0FFA_P_2 */ { "vpsubd", { XM, Vex128, EXx } }, }, { - /* VEX_W_FB_P_2 */ + /* VEX_W_0FFB_P_2 */ { "vpsubq", { XM, Vex128, EXx } }, }, { - /* VEX_W_FC_P_2 */ + /* VEX_W_0FFC_P_2 */ { "vpaddb", { XM, Vex128, EXx } }, }, { - /* VEX_W_FD_P_2 */ + /* VEX_W_0FFD_P_2 */ { "vpaddw", { XM, Vex128, EXx } }, }, { - /* VEX_W_FE_P_2 */ + /* VEX_W_0FFE_P_2 */ { "vpaddd", { XM, Vex128, EXx } }, }, { - /* VEX_W_3800_P_2 */ + /* VEX_W_0F3800_P_2 */ { "vpshufb", { XM, Vex128, EXx } }, }, { - /* VEX_W_3801_P_2 */ + /* VEX_W_0F3801_P_2 */ { "vphaddw", { XM, Vex128, EXx } }, }, { - /* VEX_W_3802_P_2 */ + /* VEX_W_0F3802_P_2 */ { "vphaddd", { XM, Vex128, EXx } }, }, { - /* VEX_W_3803_P_2 */ + /* VEX_W_0F3803_P_2 */ { "vphaddsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_3804_P_2 */ + /* VEX_W_0F3804_P_2 */ { "vpmaddubsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_3805_P_2 */ + /* VEX_W_0F3805_P_2 */ { "vphsubw", { XM, Vex128, EXx } }, }, { - /* VEX_W_3806_P_2 */ + /* VEX_W_0F3806_P_2 */ { "vphsubd", { XM, Vex128, EXx } }, }, { - /* VEX_W_3807_P_2 */ + /* VEX_W_0F3807_P_2 */ { "vphsubsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_3808_P_2 */ + /* VEX_W_0F3808_P_2 */ { "vpsignb", { XM, Vex128, EXx } }, }, { - /* VEX_W_3809_P_2 */ + /* VEX_W_0F3809_P_2 */ { "vpsignw", { XM, Vex128, EXx } }, }, { - /* VEX_W_380A_P_2 */ + /* VEX_W_0F380A_P_2 */ { "vpsignd", { XM, Vex128, EXx } }, }, { - /* VEX_W_380B_P_2 */ + /* VEX_W_0F380B_P_2 */ { "vpmulhrsw", { XM, Vex128, EXx } }, }, { - /* VEX_W_380C_P_2 */ + /* VEX_W_0F380C_P_2 */ { "vpermilps", { XM, Vex, EXx } }, }, { - /* VEX_W_380D_P_2 */ + /* VEX_W_0F380D_P_2 */ { "vpermilpd", { XM, Vex, EXx } }, }, { - /* VEX_W_380E_P_2 */ + /* VEX_W_0F380E_P_2 */ { "vtestps", { XM, EXx } }, }, { - /* VEX_W_380F_P_2 */ + /* VEX_W_0F380F_P_2 */ { "vtestpd", { XM, EXx } }, }, { - /* VEX_W_3817_P_2 */ + /* VEX_W_0F3817_P_2 */ { "vptest", { XM, EXx } }, }, { - /* VEX_W_3818_P_2_M_0 */ + /* VEX_W_0F3818_P_2_M_0 */ { "vbroadcastss", { XM, Md } }, }, { - /* VEX_W_3819_P_2_M_0 */ + /* VEX_W_0F3819_P_2_M_0 */ { "vbroadcastsd", { XM, Mq } }, }, { - /* VEX_W_381A_P_2_M_0 */ + /* VEX_W_0F381A_P_2_M_0 */ { "vbroadcastf128", { XM, Mxmm } }, }, { - /* VEX_W_381C_P_2 */ + /* VEX_W_0F381C_P_2 */ { "vpabsb", { XM, EXx } }, }, { - /* VEX_W_381D_P_2 */ + /* VEX_W_0F381D_P_2 */ { "vpabsw", { XM, EXx } }, }, { - /* VEX_W_381E_P_2 */ + /* VEX_W_0F381E_P_2 */ { "vpabsd", { XM, EXx } }, }, { - /* VEX_W_3820_P_2 */ + /* VEX_W_0F3820_P_2 */ { "vpmovsxbw", { XM, EXq } }, }, { - /* VEX_W_3821_P_2 */ + /* VEX_W_0F3821_P_2 */ { "vpmovsxbd", { XM, EXd } }, }, { - /* VEX_W_3822_P_2 */ + /* VEX_W_0F3822_P_2 */ { "vpmovsxbq", { XM, EXw } }, }, { - /* VEX_W_3823_P_2 */ + /* VEX_W_0F3823_P_2 */ { "vpmovsxwd", { XM, EXq } }, }, { - /* VEX_W_3824_P_2 */ + /* VEX_W_0F3824_P_2 */ { "vpmovsxwq", { XM, EXd } }, }, { - /* VEX_W_3825_P_2 */ + /* VEX_W_0F3825_P_2 */ { "vpmovsxdq", { XM, EXq } }, }, { - /* VEX_W_3828_P_2 */ + /* VEX_W_0F3828_P_2 */ { "vpmuldq", { XM, Vex128, EXx } }, }, { - /* VEX_W_3829_P_2 */ + /* VEX_W_0F3829_P_2 */ { "vpcmpeqq", { XM, Vex128, EXx } }, }, { - /* VEX_W_382A_P_2_M_0 */ + /* VEX_W_0F382A_P_2_M_0 */ { "vmovntdqa", { XM, Mx } }, }, { - /* VEX_W_382B_P_2 */ + /* VEX_W_0F382B_P_2 */ { "vpackusdw", { XM, Vex128, EXx } }, }, { - /* VEX_W_382C_P_2_M_0 */ + /* VEX_W_0F382C_P_2_M_0 */ { "vmaskmovps", { XM, Vex, Mx } }, }, { - /* VEX_W_382D_P_2_M_0 */ + /* VEX_W_0F382D_P_2_M_0 */ { "vmaskmovpd", { XM, Vex, Mx } }, }, { - /* VEX_W_382E_P_2_M_0 */ + /* VEX_W_0F382E_P_2_M_0 */ { "vmaskmovps", { Mx, Vex, XM } }, }, { - /* VEX_W_382F_P_2_M_0 */ + /* VEX_W_0F382F_P_2_M_0 */ { "vmaskmovpd", { Mx, Vex, XM } }, }, { - /* VEX_W_3830_P_2 */ + /* VEX_W_0F3830_P_2 */ { "vpmovzxbw", { XM, EXq } }, }, { - /* VEX_W_3831_P_2 */ + /* VEX_W_0F3831_P_2 */ { "vpmovzxbd", { XM, EXd } }, }, { - /* VEX_W_3832_P_2 */ + /* VEX_W_0F3832_P_2 */ { "vpmovzxbq", { XM, EXw } }, }, { - /* VEX_W_3833_P_2 */ + /* VEX_W_0F3833_P_2 */ { "vpmovzxwd", { XM, EXq } }, }, { - /* VEX_W_3834_P_2 */ + /* VEX_W_0F3834_P_2 */ { "vpmovzxwq", { XM, EXd } }, }, { - /* VEX_W_3835_P_2 */ + /* VEX_W_0F3835_P_2 */ { "vpmovzxdq", { XM, EXq } }, }, { - /* VEX_W_3837_P_2 */ + /* VEX_W_0F3837_P_2 */ { "vpcmpgtq", { XM, Vex128, EXx } }, }, { - /* VEX_W_3838_P_2 */ + /* VEX_W_0F3838_P_2 */ { "vpminsb", { XM, Vex128, EXx } }, }, { - /* VEX_W_3839_P_2 */ + /* VEX_W_0F3839_P_2 */ { "vpminsd", { XM, Vex128, EXx } }, }, { - /* VEX_W_383A_P_2 */ + /* VEX_W_0F383A_P_2 */ { "vpminuw", { XM, Vex128, EXx } }, }, { - /* VEX_W_383B_P_2 */ + /* VEX_W_0F383B_P_2 */ { "vpminud", { XM, Vex128, EXx } }, }, { - /* VEX_W_383C_P_2 */ + /* VEX_W_0F383C_P_2 */ { "vpmaxsb", { XM, Vex128, EXx } }, }, { - /* VEX_W_383D_P_2 */ + /* VEX_W_0F383D_P_2 */ { "vpmaxsd", { XM, Vex128, EXx } }, }, { - /* VEX_W_383E_P_2 */ + /* VEX_W_0F383E_P_2 */ { "vpmaxuw", { XM, Vex128, EXx } }, }, { - /* VEX_W_383F_P_2 */ + /* VEX_W_0F383F_P_2 */ { "vpmaxud", { XM, Vex128, EXx } }, }, { - /* VEX_W_3840_P_2 */ + /* VEX_W_0F3840_P_2 */ { "vpmulld", { XM, Vex128, EXx } }, }, { - /* VEX_W_3841_P_2 */ + /* VEX_W_0F3841_P_2 */ { "vphminposuw", { XM, EXx } }, }, { - /* VEX_W_38DB_P_2 */ + /* VEX_W_0F38DB_P_2 */ { "vaesimc", { XM, EXx } }, }, { - /* VEX_W_38DC_P_2 */ + /* VEX_W_0F38DC_P_2 */ { "vaesenc", { XM, Vex128, EXx } }, }, { - /* VEX_W_38DD_P_2 */ + /* VEX_W_0F38DD_P_2 */ { "vaesenclast", { XM, Vex128, EXx } }, }, { - /* VEX_W_38DE_P_2 */ + /* VEX_W_0F38DE_P_2 */ { "vaesdec", { XM, Vex128, EXx } }, }, { - /* VEX_W_38DF_P_2 */ + /* VEX_W_0F38DF_P_2 */ { "vaesdeclast", { XM, Vex128, EXx } }, }, { - /* VEX_W_3A04_P_2 */ + /* VEX_W_0F3A04_P_2 */ { "vpermilps", { XM, EXx, Ib } }, }, { - /* VEX_W_3A05_P_2 */ + /* VEX_W_0F3A05_P_2 */ { "vpermilpd", { XM, EXx, Ib } }, }, { - /* VEX_W_3A06_P_2 */ + /* VEX_W_0F3A06_P_2 */ { "vperm2f128", { XM, Vex256, EXx, Ib } }, }, { - /* VEX_W_3A08_P_2 */ + /* VEX_W_0F3A08_P_2 */ { "vroundps", { XM, EXx, Ib } }, }, { - /* VEX_W_3A09_P_2 */ + /* VEX_W_0F3A09_P_2 */ { "vroundpd", { XM, EXx, Ib } }, }, { - /* VEX_W_3A0A_P_2 */ - { "vroundss", { XM, Vex128, EXd, Ib } }, + /* VEX_W_0F3A0A_P_2 */ + { "vroundss", { XMScalar, VexScalar, EXdScalar, Ib } }, }, { - /* VEX_W_3A0B_P_2 */ - { "vroundsd", { XM, Vex128, EXq, Ib } }, + /* VEX_W_0F3A0B_P_2 */ + { "vroundsd", { XMScalar, VexScalar, EXqScalar, Ib } }, }, { - /* VEX_W_3A0C_P_2 */ + /* VEX_W_0F3A0C_P_2 */ { "vblendps", { XM, Vex, EXx, Ib } }, }, { - /* VEX_W_3A0D_P_2 */ + /* VEX_W_0F3A0D_P_2 */ { "vblendpd", { XM, Vex, EXx, Ib } }, }, { - /* VEX_W_3A0E_P_2 */ + /* VEX_W_0F3A0E_P_2 */ { "vpblendw", { XM, Vex128, EXx, Ib } }, }, { - /* VEX_W_3A0F_P_2 */ + /* VEX_W_0F3A0F_P_2 */ { "vpalignr", { XM, Vex128, EXx, Ib } }, }, { - /* VEX_W_3A14_P_2 */ + /* VEX_W_0F3A14_P_2 */ { "vpextrb", { Edqb, XM, Ib } }, }, { - /* VEX_W_3A15_P_2 */ + /* VEX_W_0F3A15_P_2 */ { "vpextrw", { Edqw, XM, Ib } }, }, { - /* VEX_W_3A18_P_2 */ + /* VEX_W_0F3A18_P_2 */ { "vinsertf128", { XM, Vex256, EXxmm, Ib } }, }, { - /* VEX_W_3A19_P_2 */ + /* VEX_W_0F3A19_P_2 */ { "vextractf128", { EXxmm, XM, Ib } }, }, { - /* VEX_W_3A20_P_2 */ + /* VEX_W_0F3A20_P_2 */ { "vpinsrb", { XM, Vex128, Edqb, Ib } }, }, { - /* VEX_W_3A21_P_2 */ + /* VEX_W_0F3A21_P_2 */ { "vinsertps", { XM, Vex128, EXd, Ib } }, }, { - /* VEX_W_3A40_P_2 */ + /* VEX_W_0F3A40_P_2 */ { "vdpps", { XM, Vex, EXx, Ib } }, }, { - /* VEX_W_3A41_P_2 */ + /* VEX_W_0F3A41_P_2 */ { "vdppd", { XM, Vex128, EXx, Ib } }, }, { - /* VEX_W_3A42_P_2 */ + /* VEX_W_0F3A42_P_2 */ { "vmpsadbw", { XM, Vex128, EXx, Ib } }, }, { - /* VEX_W_3A44_P_2 */ + /* VEX_W_0F3A44_P_2 */ { "vpclmulqdq", { XM, Vex128, EXx, PCLMUL } }, }, { - /* VEX_W_3A4A_P_2 */ + /* VEX_W_0F3A48_P_2 */ + { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW } }, + { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW } }, + }, + { + /* VEX_W_0F3A49_P_2 */ + { "vpermil2pd", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW } }, + { "vpermil2pd", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW } }, + }, + { + /* VEX_W_0F3A4A_P_2 */ { "vblendvps", { XM, Vex, EXx, XMVexI4 } }, }, { - /* VEX_W_3A4B_P_2 */ + /* VEX_W_0F3A4B_P_2 */ { "vblendvpd", { XM, Vex, EXx, XMVexI4 } }, }, { - /* VEX_W_3A4C_P_2 */ + /* VEX_W_0F3A4C_P_2 */ { "vpblendvb", { XM, Vex128, EXx, XMVexI4 } }, }, { - /* VEX_W_3A60_P_2 */ + /* VEX_W_0F3A60_P_2 */ { "vpcmpestrm", { XM, EXx, Ib } }, }, { - /* VEX_W_3A61_P_2 */ + /* VEX_W_0F3A61_P_2 */ { "vpcmpestri", { XM, EXx, Ib } }, }, { - /* VEX_W_3A62_P_2 */ + /* VEX_W_0F3A62_P_2 */ { "vpcmpistrm", { XM, EXx, Ib } }, }, { - /* VEX_W_3A63_P_2 */ + /* VEX_W_0F3A63_P_2 */ { "vpcmpistri", { XM, EXx, Ib } }, }, { - /* VEX_W_3ADF_P_2 */ + /* VEX_W_0F3ADF_P_2 */ { "vaeskeygenassist", { XM, EXx, Ib } }, }, }; @@ -10257,18 +10399,22 @@ static const struct dis386 mod_table[][2] = { { /* MOD_0FAE_REG_0 */ { "fxsave", { FXSAVE } }, + { PREFIX_TABLE (PREFIX_0FAE_REG_0) }, }, { /* MOD_0FAE_REG_1 */ { "fxrstor", { FXSAVE } }, + { PREFIX_TABLE (PREFIX_0FAE_REG_1) }, }, { /* MOD_0FAE_REG_2 */ { "ldmxcsr", { Md } }, + { PREFIX_TABLE (PREFIX_0FAE_REG_2) }, }, { /* MOD_0FAE_REG_3 */ { "stmxcsr", { Md } }, + { PREFIX_TABLE (PREFIX_0FAE_REG_3) }, }, { /* MOD_0FAE_REG_4 */ @@ -10281,7 +10427,7 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0FAE_REG_6 */ - { Bad_Opcode }, + { "xsaveopt", { FXSAVE } }, { RM_TABLE (RM_0FAE_REG_6) }, }, { @@ -10304,6 +10450,7 @@ static const struct dis386 mod_table[][2] = { { /* MOD_0FC7_REG_6 */ { PREFIX_TABLE (PREFIX_0FC7_REG_6) }, + { "rdrand", { Ev } }, }, { /* MOD_0FC7_REG_7 */ @@ -10341,134 +10488,134 @@ static const struct dis386 mod_table[][2] = { { VEX_C5_TABLE (VEX_0F) }, }, { - /* MOD_VEX_12_PREFIX_0 */ - { VEX_LEN_TABLE (VEX_LEN_12_P_0_M_0) }, - { VEX_LEN_TABLE (VEX_LEN_12_P_0_M_1) }, + /* MOD_VEX_0F12_PREFIX_0 */ + { VEX_LEN_TABLE (VEX_LEN_0F12_P_0_M_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F12_P_0_M_1) }, }, { - /* MOD_VEX_13 */ - { VEX_LEN_TABLE (VEX_LEN_13_M_0) }, + /* MOD_VEX_0F13 */ + { VEX_LEN_TABLE (VEX_LEN_0F13_M_0) }, }, { - /* MOD_VEX_16_PREFIX_0 */ - { VEX_LEN_TABLE (VEX_LEN_16_P_0_M_0) }, - { VEX_LEN_TABLE (VEX_LEN_16_P_0_M_1) }, + /* MOD_VEX_0F16_PREFIX_0 */ + { VEX_LEN_TABLE (VEX_LEN_0F16_P_0_M_0) }, + { VEX_LEN_TABLE (VEX_LEN_0F16_P_0_M_1) }, }, { - /* MOD_VEX_17 */ - { VEX_LEN_TABLE (VEX_LEN_17_M_0) }, + /* MOD_VEX_0F17 */ + { VEX_LEN_TABLE (VEX_LEN_0F17_M_0) }, }, { - /* MOD_VEX_2B */ - { VEX_W_TABLE (VEX_W_2B_M_0) }, + /* MOD_VEX_0F2B */ + { VEX_W_TABLE (VEX_W_0F2B_M_0) }, }, { - /* MOD_VEX_50 */ + /* MOD_VEX_0F50 */ { Bad_Opcode }, - { VEX_W_TABLE (VEX_W_50_M_0) }, + { VEX_W_TABLE (VEX_W_0F50_M_0) }, }, { - /* MOD_VEX_71_REG_2 */ + /* MOD_VEX_0F71_REG_2 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_71_REG_2) }, + { PREFIX_TABLE (PREFIX_VEX_0F71_REG_2) }, }, { - /* MOD_VEX_71_REG_4 */ + /* MOD_VEX_0F71_REG_4 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_71_REG_4) }, + { PREFIX_TABLE (PREFIX_VEX_0F71_REG_4) }, }, { - /* MOD_VEX_71_REG_6 */ + /* MOD_VEX_0F71_REG_6 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_71_REG_6) }, + { PREFIX_TABLE (PREFIX_VEX_0F71_REG_6) }, }, { - /* MOD_VEX_72_REG_2 */ + /* MOD_VEX_0F72_REG_2 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_72_REG_2) }, + { PREFIX_TABLE (PREFIX_VEX_0F72_REG_2) }, }, { - /* MOD_VEX_72_REG_4 */ + /* MOD_VEX_0F72_REG_4 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_72_REG_4) }, + { PREFIX_TABLE (PREFIX_VEX_0F72_REG_4) }, }, { - /* MOD_VEX_72_REG_6 */ + /* MOD_VEX_0F72_REG_6 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_72_REG_6) }, + { PREFIX_TABLE (PREFIX_VEX_0F72_REG_6) }, }, { - /* MOD_VEX_73_REG_2 */ + /* MOD_VEX_0F73_REG_2 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_73_REG_2) }, + { PREFIX_TABLE (PREFIX_VEX_0F73_REG_2) }, }, { - /* MOD_VEX_73_REG_3 */ + /* MOD_VEX_0F73_REG_3 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_73_REG_3) }, + { PREFIX_TABLE (PREFIX_VEX_0F73_REG_3) }, }, { - /* MOD_VEX_73_REG_6 */ + /* MOD_VEX_0F73_REG_6 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_73_REG_6) }, + { PREFIX_TABLE (PREFIX_VEX_0F73_REG_6) }, }, { - /* MOD_VEX_73_REG_7 */ + /* MOD_VEX_0F73_REG_7 */ { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_VEX_73_REG_7) }, + { PREFIX_TABLE (PREFIX_VEX_0F73_REG_7) }, }, { - /* MOD_VEX_AE_REG_2 */ - { VEX_LEN_TABLE (VEX_LEN_AE_R_2_M_0) }, + /* MOD_VEX_0FAE_REG_2 */ + { VEX_LEN_TABLE (VEX_LEN_0FAE_R_2_M_0) }, }, { - /* MOD_VEX_AE_REG_3 */ - { VEX_LEN_TABLE (VEX_LEN_AE_R_3_M_0) }, + /* MOD_VEX_0FAE_REG_3 */ + { VEX_LEN_TABLE (VEX_LEN_0FAE_R_3_M_0) }, }, { - /* MOD_VEX_D7_PREFIX_2 */ + /* MOD_VEX_0FD7_PREFIX_2 */ { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_D7_P_2_M_1) }, + { VEX_LEN_TABLE (VEX_LEN_0FD7_P_2_M_1) }, }, { - /* MOD_VEX_E7_PREFIX_2 */ - { VEX_W_TABLE (VEX_W_E7_P_2_M_0) }, + /* MOD_VEX_0FE7_PREFIX_2 */ + { VEX_W_TABLE (VEX_W_0FE7_P_2_M_0) }, }, { - /* MOD_VEX_F0_PREFIX_3 */ - { VEX_W_TABLE (VEX_W_F0_P_3_M_0) }, + /* MOD_VEX_0FF0_PREFIX_3 */ + { VEX_W_TABLE (VEX_W_0FF0_P_3_M_0) }, }, { - /* MOD_VEX_3818_PREFIX_2 */ - { VEX_W_TABLE (VEX_W_3818_P_2_M_0) }, + /* MOD_VEX_0F3818_PREFIX_2 */ + { VEX_W_TABLE (VEX_W_0F3818_P_2_M_0) }, }, { - /* MOD_VEX_3819_PREFIX_2 */ - { VEX_LEN_TABLE (VEX_LEN_3819_P_2_M_0) }, + /* MOD_VEX_0F3819_PREFIX_2 */ + { VEX_LEN_TABLE (VEX_LEN_0F3819_P_2_M_0) }, }, { - /* MOD_VEX_381A_PREFIX_2 */ - { VEX_LEN_TABLE (VEX_LEN_381A_P_2_M_0) }, + /* MOD_VEX_0F381A_PREFIX_2 */ + { VEX_LEN_TABLE (VEX_LEN_0F381A_P_2_M_0) }, }, { - /* MOD_VEX_382A_PREFIX_2 */ - { VEX_LEN_TABLE (VEX_LEN_382A_P_2_M_0) }, + /* MOD_VEX_0F382A_PREFIX_2 */ + { VEX_LEN_TABLE (VEX_LEN_0F382A_P_2_M_0) }, }, { - /* MOD_VEX_382C_PREFIX_2 */ - { VEX_W_TABLE (VEX_W_382C_P_2_M_0) }, + /* MOD_VEX_0F382C_PREFIX_2 */ + { VEX_W_TABLE (VEX_W_0F382C_P_2_M_0) }, }, { - /* MOD_VEX_382D_PREFIX_2 */ - { VEX_W_TABLE (VEX_W_382D_P_2_M_0) }, + /* MOD_VEX_0F382D_PREFIX_2 */ + { VEX_W_TABLE (VEX_W_0F382D_P_2_M_0) }, }, { - /* MOD_VEX_382E_PREFIX_2 */ - { VEX_W_TABLE (VEX_W_382E_P_2_M_0) }, + /* MOD_VEX_0F382E_PREFIX_2 */ + { VEX_W_TABLE (VEX_W_0F382E_P_2_M_0) }, }, { - /* MOD_VEX_382F_PREFIX_2 */ - { VEX_W_TABLE (VEX_W_382F_P_2_M_0) }, + /* MOD_VEX_0F382F_PREFIX_2 */ + { VEX_W_TABLE (VEX_W_0F382F_P_2_M_0) }, }, }; @@ -10967,7 +11114,8 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) switch ((*codep & 0x1f)) { default: - BadOp (); + dp = &bad_opcode; + return dp; case 0x8: vex_table_index = XOP_08; break; @@ -10986,7 +11134,10 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) vex.register_specifier = (~(*codep >> 3)) & 0xf; if (address_mode != mode_64bit && vex.register_specifier > 0x7) - BadOp (); + { + dp = &bad_opcode; + return dp; + } vex.length = (*codep & 0x4) ? 256 : 128; switch ((*codep & 0x3)) @@ -11024,7 +11175,8 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) switch ((*codep & 0x1f)) { default: - BadOp (); + dp = &bad_opcode; + return dp; case 0x1: vex_table_index = VEX_0F; break; @@ -11043,7 +11195,10 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) vex.register_specifier = (~(*codep >> 3)) & 0xf; if (address_mode != mode_64bit && vex.register_specifier > 0x7) - BadOp (); + { + dp = &bad_opcode; + return dp; + } vex.length = (*codep & 0x4) ? 256 : 128; switch ((*codep & 0x3)) @@ -11085,7 +11240,10 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) vex.register_specifier = (~(*codep >> 3)) & 0xf; if (address_mode != mode_64bit && vex.register_specifier > 0x7) - BadOp (); + { + dp = &bad_opcode; + return dp; + } vex.w = 0; @@ -11141,6 +11299,22 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) return get_valid_dis386 (dp, info); } +static void +get_sib (disassemble_info *info) +{ + /* If modrm.mod == 3, operand must be register. */ + if (need_modrm + && address_mode != mode_16bit + && modrm.mod != 3 + && modrm.rm == 4) + { + FETCH_DATA (info, codep + 2); + sib.index = (codep [1] >> 3) & 7; + sib.scale = (codep [1] >> 6) & 3; + sib.base = codep [1] & 7; + } +} + static int print_insn (bfd_vma pc, disassemble_info *info) { @@ -11151,7 +11325,6 @@ print_insn (bfd_vma pc, disassemble_info *info) int sizeflag; const char *p; struct dis_private priv; - unsigned char op; int prefix_length; int default_prefixes; @@ -11356,8 +11529,6 @@ print_insn (bfd_vma pc, disassemble_info *info) return 1; } - op = 0; - if (*codep == 0x0f) { unsigned char threebyte; @@ -11429,6 +11600,7 @@ print_insn (bfd_vma pc, disassemble_info *info) if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE) { + get_sib (info); dofloat (sizeflag); } else @@ -11436,6 +11608,7 @@ print_insn (bfd_vma pc, disassemble_info *info) dp = get_valid_dis386 (dp, info); if (dp != NULL && putop (dp->name, sizeflag) == 0) { + get_sib (info); for (i = 0; i < MAX_OPERANDS; ++i) { obufp = op_out[i]; @@ -12162,9 +12335,9 @@ case_L: used_prefixes |= (prefixes & PREFIX_DATA); break; case 'T': - if (intel_syntax) - break; - if (address_mode == mode_64bit && (sizeflag & DFLAG)) + if (!intel_syntax + && address_mode == mode_64bit + && (sizeflag & DFLAG)) { *obufp++ = 'q'; break; @@ -12172,7 +12345,16 @@ case_L: /* Fall through. */ case 'P': if (intel_syntax) - break; + { + if ((rex & REX_W) == 0 + && (prefixes & PREFIX_DATA)) + { + if ((sizeflag & DFLAG) == 0) + *obufp++ = 'w'; + used_prefixes |= (prefixes & PREFIX_DATA); + } + break; + } if ((prefixes & PREFIX_DATA) || (rex & REX_W) || (sizeflag & SUFFIX_ALWAYS)) @@ -12631,11 +12813,15 @@ intel_operand_size (int bytemode, int sizeflag) used_prefixes |= (prefixes & PREFIX_DATA); break; case d_mode: + case d_scalar_mode: + case d_scalar_swap_mode: case d_swap_mode: case dqd_mode: oappend ("DWORD PTR "); break; case q_mode: + case q_scalar_mode: + case q_scalar_swap_mode: case q_swap_mode: oappend ("QWORD PTR "); break; @@ -12713,6 +12899,7 @@ intel_operand_size (int bytemode, int sizeflag) oappend ("OWORD PTR "); break; case vex_w_dq_mode: + case vex_scalar_w_dq_mode: if (!need_vex) abort (); @@ -12831,10 +13018,9 @@ OP_E_memory (int bytemode, int sizeflag) if (base == 4) { havesib = 1; - FETCH_DATA (the_info, codep + 1); - vindex = (*codep >> 3) & 7; - scale = (*codep >> 6) & 3; - base = *codep & 7; + vindex = sib.index; + scale = sib.scale; + base = sib.base; USED_REX (REX_X); if (rex & REX_X) vindex += 8; @@ -13436,7 +13622,6 @@ static void OP_sI (int bytemode, int sizeflag) { bfd_signed_vma op; - bfd_signed_vma mask = -1; switch (bytemode) { @@ -13445,34 +13630,12 @@ OP_sI (int bytemode, int sizeflag) op = *codep++; if ((op & 0x80) != 0) op -= 0x100; - mask = 0xffffffff; break; case v_mode: - USED_REX (REX_W); - if (rex & REX_W) + if (sizeflag & DFLAG) op = get32s (); else - { - if (sizeflag & DFLAG) - { - op = get32s (); - mask = 0xffffffff; - } - else - { - mask = 0xffffffff; - op = get16 (); - if ((op & 0x8000) != 0) - op -= 0x10000; - } - used_prefixes |= (prefixes & PREFIX_DATA); - } - break; - case w_mode: - op = get16 (); - mask = 0xffffffff; - if ((op & 0x8000) != 0) - op -= 0x10000; + op = get16 (); break; default: oappend (INTERNAL_DISASSEMBLER_ERROR); @@ -13779,7 +13942,9 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED) USED_REX (REX_R); if (rex & REX_R) reg += 8; - if (need_vex && bytemode != xmm_mode) + if (need_vex + && bytemode != xmm_mode + && bytemode != scalar_mode) { switch (vex.length) { @@ -13893,12 +14058,19 @@ OP_EX (int bytemode, int sizeflag) if ((sizeflag & SUFFIX_ALWAYS) && (bytemode == x_swap_mode || bytemode == d_swap_mode - || bytemode == q_swap_mode)) + || bytemode == d_scalar_swap_mode + || bytemode == q_swap_mode + || bytemode == q_scalar_swap_mode)) swap_operand (); if (need_vex && bytemode != xmm_mode - && bytemode != xmmq_mode) + && bytemode != xmmq_mode + && bytemode != d_scalar_mode + && bytemode != d_scalar_swap_mode + && bytemode != q_scalar_mode + && bytemode != q_scalar_swap_mode + && bytemode != vex_scalar_w_dq_mode) { switch (vex.length) { @@ -14327,6 +14499,7 @@ FXSAVE_Fixup (int bytemode, int sizeflag) static void OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED) { + int reg; const char **names; if (!need_vex) @@ -14335,6 +14508,13 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED) if (!need_vex_reg) return; + reg = vex.register_specifier; + if (bytemode == vex_scalar_mode) + { + oappend (names_xmm[reg]); + return; + } + switch (vex.length) { case 128: @@ -14367,7 +14547,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED) abort (); break; } - oappend (names[vex.register_specifier]); + oappend (names[reg]); } /* Get the VEX immediate byte without moving codep. */ @@ -14496,6 +14676,47 @@ OP_EX_VexReg (int bytemode, int sizeflag, int reg) oappend (names[reg]); } +static void +OP_EX_VexImmW (int bytemode, int sizeflag) +{ + int reg = -1; + static unsigned char vex_imm8; + + if (vex_w_done == 0) + { + vex_w_done = 1; + + /* Skip mod/rm byte. */ + MODRM_CHECK; + codep++; + + vex_imm8 = get_vex_imm8 (sizeflag, 0); + + if (vex.w) + reg = vex_imm8 >> 4; + + OP_EX_VexReg (bytemode, sizeflag, reg); + } + else if (vex_w_done == 1) + { + vex_w_done = 2; + + if (!vex.w) + reg = vex_imm8 >> 4; + + OP_EX_VexReg (bytemode, sizeflag, reg); + } + else + { + /* Output the imm8 directly. */ + scratchbuf[0] = '$'; + print_operand_value (scratchbuf + 1, 1, vex_imm8 & 0xf); + oappend (scratchbuf + intel_syntax); + scratchbuf[0] = '\0'; + codep++; + } +} + static void OP_Vex_2src (int bytemode, int sizeflag) { @@ -14822,10 +15043,8 @@ OP_LWPCB_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) if (vex.w) names = names64; - else if (vex.length == 256) - names = names32; else - names = names16; + names = names32; reg = modrm.rm; USED_REX (REX_B); @@ -14842,20 +15061,9 @@ OP_LWP_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) if (vex.w) names = names64; - else if (vex.length == 256) - names = names32; else - names = names16; + names = names32; oappend (names[vex.register_specifier]); } -static void -OP_LWP_I (int bytemode ATTRIBUTE_UNUSED, int sizeflag) -{ - if (vex.w || vex.length == 256) - OP_I (q_mode, sizeflag); - else - OP_I (w_mode, sizeflag); -} -