X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fi386-opc.h;h=55726c1a7a712bc4d446d04e202373b76e57d70d;hb=ebe84f23d2f3c0cb145cc7b3acfb011a4c7df1c9;hp=dcb8ea3ca373b93ad09d72b71b1206fd50758476;hpb=f74a6307279f162e892e570448dc2433963db1d8;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index dcb8ea3ca3..55726c1a7a 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -1,5 +1,5 @@
 /* Declarations for Intel 80386 opcode table
-   Copyright (C) 2007-2019 Free Software Foundation, Inc.
+   Copyright (C) 2007-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -87,8 +87,10 @@ enum
   CpuSSSE3,
   /* SSE4a support required */
   CpuSSE4a,
-  /* ABM New Instructions required */
-  CpuABM,
+  /* LZCNT support required */
+  CpuLZCNT,
+  /* POPCNT support required */
+  CpuPOPCNT,
   /* SSE4.1 support required */
   CpuSSE4_1,
   /* SSE4.2 support required */
@@ -154,8 +156,6 @@ enum
   CpuF16C,
   /* Intel BMI2 support required */
   CpuBMI2,
-  /* LZCNT support required */
-  CpuLZCNT,
   /* HLE support required */
   CpuHLE,
   /* RTM support required */
@@ -243,10 +243,16 @@ enum
   CpuMOVDIR64B,
   /* ENQCMD instruction required */
   CpuENQCMD,
+  /* SERIALIZE instruction required */
+  CpuSERIALIZE,
   /* RDPRU instruction required */
   CpuRDPRU,
   /* MCOMMIT instruction required */
   CpuMCOMMIT,
+  /* SEV-ES instruction(s) required */
+  CpuSEV_ES,
+  /* TSXLDTRK instruction required */
+  CpuTSXLDTRK,
   /* 64bit support required  */
   Cpu64,
   /* Not supported in the 64bit mode  */
@@ -298,7 +304,8 @@ typedef union i386_cpu_flags
       unsigned int cpusmx:1;
       unsigned int cpussse3:1;
       unsigned int cpusse4a:1;
-      unsigned int cpuabm:1;
+      unsigned int cpulzcnt:1;
+      unsigned int cpupopcnt:1;
       unsigned int cpusse4_1:1;
       unsigned int cpusse4_2:1;
       unsigned int cpuavx:1;
@@ -331,7 +338,6 @@ typedef union i386_cpu_flags
       unsigned int cpurdrnd:1;
       unsigned int cpuf16c:1;
       unsigned int cpubmi2:1;
-      unsigned int cpulzcnt:1;
       unsigned int cpuhle:1;
       unsigned int cpurtm:1;
       unsigned int cpuinvpcid:1;
@@ -376,8 +382,11 @@ typedef union i386_cpu_flags
       unsigned int cpumovdiri:1;
       unsigned int cpumovdir64b:1;
       unsigned int cpuenqcmd:1;
+      unsigned int cpuserialize:1;
       unsigned int cpurdpru:1;
       unsigned int cpumcommit:1;
+      unsigned int cpusev_es:1;
+      unsigned int cputsxldtrk:1;
       unsigned int cpu64:1;
       unsigned int cpuno64:1;
 #ifdef CpuUnused
@@ -401,16 +410,17 @@ enum
   Load,
   /* insn has a modrm byte. */
   Modrm,
-  /* register is in low 3 bits of opcode */
-  ShortForm,
-  /* special case for jump insns.  */
-  Jump,
+  /* special case for jump insns; value has to be 1 */
+#define JUMP 1
   /* call and jump */
-  JumpDword,
+#define JUMP_DWORD 2
   /* loop and jecxz */
-  JumpByte,
+#define JUMP_BYTE 3
   /* special case for intersegment leaps/calls */
-  JumpInterSegment,
+#define JUMP_INTERSEGMENT 4
+  /* absolute address for jump */
+#define JUMP_ABSOLUTE 5
+  Jump,
   /* FP insn memory format bit, sized by 0x4 */
   FloatMF,
   /* src/dest swap for floats. */
@@ -426,9 +436,12 @@ enum
   CheckRegSize,
   /* instruction ignores operand size prefix and in Intel mode ignores
      mnemonic size suffix check.  */
-  IgnoreSize,
+#define IGNORESIZE	1
   /* default insn size depends on mode */
-  DefaultSize,
+#define DEFAULTSIZE	2
+  MnemonicSize,
+  /* any memory size */
+  Anysize,
   /* b suffix on instruction illegal */
   No_bSuf,
   /* w suffix on instruction illegal */
@@ -443,7 +456,11 @@ enum
   No_ldSuf,
   /* instruction needs FWAIT */
   FWait,
-  /* quick test for string instructions */
+  /* IsString provides for a quick test for string instructions, and
+     its actual value also indicates which of the operands (if any)
+     requires use of the %es segment.  */
+#define IS_STRING_ES_OP0 2
+#define IS_STRING_ES_OP1 3
   IsString,
   /* RegMem is for instructions with a modrm byte where the register
      destination operand should be encoded in the mod and regmem fields.
@@ -485,8 +502,6 @@ enum
   ImmExt,
   /* instruction don't need Rex64 prefix.  */
   NoRex64,
-  /* instruction require Rex64 prefix.  */
-  Rex64,
   /* deprecated fp insn, gets a warning */
   Ugh,
   /* insn has VEX prefix:
@@ -629,10 +644,16 @@ enum
   ATTSyntax,
   /* Intel syntax.  */
   IntelSyntax,
-  /* AMD64.  */
-  AMD64,
-  /* Intel64.  */
-  Intel64,
+  /* ISA64: Don't change the order without other code adjustments.
+	0: Common to AMD64 and Intel64.
+	1: AMD64.
+	2: Intel64.
+	3: Only in Intel64.
+   */
+#define AMD64		1
+#define INTEL64		2
+#define INTEL64ONLY	3
+  ISA64,
   /* The last bitfield in i386_opcode_modifier.  */
   Opcode_Modifier_Num
 };
@@ -643,17 +664,13 @@ typedef struct i386_opcode_modifier
   unsigned int w:1;
   unsigned int load:1;
   unsigned int modrm:1;
-  unsigned int shortform:1;
-  unsigned int jump:1;
-  unsigned int jumpdword:1;
-  unsigned int jumpbyte:1;
-  unsigned int jumpintersegment:1;
+  unsigned int jump:3;
   unsigned int floatmf:1;
   unsigned int floatr:1;
   unsigned int size:2;
   unsigned int checkregsize:1;
-  unsigned int ignoresize:1;
-  unsigned int defaultsize:1;
+  unsigned int mnemonicsize:2;
+  unsigned int anysize:1;
   unsigned int no_bsuf:1;
   unsigned int no_wsuf:1;
   unsigned int no_lsuf:1;
@@ -661,7 +678,7 @@ typedef struct i386_opcode_modifier
   unsigned int no_qsuf:1;
   unsigned int no_ldsuf:1;
   unsigned int fwait:1;
-  unsigned int isstring:1;
+  unsigned int isstring:2;
   unsigned int regmem:1;
   unsigned int bndprefixok:1;
   unsigned int notrackprefixok:1;
@@ -676,7 +693,6 @@ typedef struct i386_opcode_modifier
   unsigned int isprefix:1;
   unsigned int immext:1;
   unsigned int norex64:1;
-  unsigned int rex64:1;
   unsigned int ugh:1;
   unsigned int vex:2;
   unsigned int vexvvvv:2;
@@ -698,8 +714,7 @@ typedef struct i386_opcode_modifier
   unsigned int attmnemonic:1;
   unsigned int attsyntax:1;
   unsigned int intelsyntax:1;
-  unsigned int amd64:1;
-  unsigned int intel64:1;
+  unsigned int isa64:2;
 } i386_opcode_modifier;
 
 /* Operand classes.  */
@@ -719,12 +734,24 @@ enum operand_class
   RegBND, /* Bound register */
 };
 
+/* Special operand instances.  */
+
+#define INSTANCE_WIDTH 3
+enum operand_instance
+{
+  InstanceNone,
+  Accum, /* Accumulator %al/%ax/%eax/%rax/%st(0)/%xmm0 */
+  RegC,  /* %cl / %cx / %ecx / %rcx, e.g. register to hold shift count */
+  RegD,  /* %dl / %dx / %edx / %rdx, e.g. register to hold I/O port addr */
+  RegB,  /* %bl / %bx / %ebx / %rbx */
+};
+
 /* Position of operand_type bits.  */
 
 enum
 {
-  /* Class */
-  Class = CLASS_WIDTH - 1,
+  /* Class and Instance */
+  ClassInstance = CLASS_WIDTH + INSTANCE_WIDTH - 1,
   /* 1 bit immediate */
   Imm1,
   /* 8 bit immediate */
@@ -756,18 +783,8 @@ enum
   Disp32S,
   /* 64 bit displacement */
   Disp64,
-  /* Accumulator %al/%ax/%eax/%rax/%st(0)/%xmm0 */
-  Acc,
   /* Register which can be used for base or index in memory operand.  */
   BaseIndex,
-  /* Register to hold in/out port addr = dx */
-  InOutPortReg,
-  /* Register to hold shift count = cl */
-  ShiftCount,
-  /* Absolute address for jump.  */
-  JumpAbsolute,
-  /* String insn operand with fixed es segment */
-  EsSeg,
   /* BYTE size. */
   Byte,
   /* WORD size. 2 byte */
@@ -788,8 +805,6 @@ enum
   Zmmword,
   /* Unspecified memory size.  */
   Unspecified,
-  /* Any memory size.  */
-  Anysize,
 
   /* The number of bits in i386_operand_type.  */
   OTNum
@@ -809,6 +824,7 @@ typedef union i386_operand_type
   struct
     {
       unsigned int class:CLASS_WIDTH;
+      unsigned int instance:INSTANCE_WIDTH;
       unsigned int imm1:1;
       unsigned int imm8:1;
       unsigned int imm8s:1;
@@ -821,12 +837,7 @@ typedef union i386_operand_type
       unsigned int disp32:1;
       unsigned int disp32s:1;
       unsigned int disp64:1;
-      unsigned int acc:1;
       unsigned int baseindex:1;
-      unsigned int inoutportreg:1;
-      unsigned int shiftcount:1;
-      unsigned int jumpabsolute:1;
-      unsigned int esseg:1;
       unsigned int byte:1;
       unsigned int word:1;
       unsigned int dword:1;
@@ -837,7 +848,6 @@ typedef union i386_operand_type
       unsigned int ymmword:1;
       unsigned int zmmword:1;
       unsigned int unspecified:1;
-      unsigned int anysize:1;
 #ifdef OTUnused
       unsigned int unused:(OTNumOfBits - OTUnused);
 #endif
@@ -896,7 +906,7 @@ extern const insn_template i386_optab[];
 /* these are for register name --> number & type hash lookup */
 typedef struct
 {
-  char *reg_name;
+  const char *reg_name;
   i386_operand_type reg_type;
   unsigned char reg_flags;
 #define RegRex	    0x1  /* Extended register.  */