X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fiq2000-asm.c;h=7f3f64721dd0c30fe92139567d761549abf70a4f;hb=50d036364fb2a71b3ac9a0b0cdbe58296832a1b2;hp=ccd94785687b9753613465fb355571deabe4606a;hpb=6f3b91a62110eaea42cd7df18d6f9293f5d60fa2;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index ccd9478568..7f3f64721d 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -1,11 +1,11 @@ +/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ /* Assembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-asm.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2007, 2008 - Free Software Foundation, Inc. + Copyright (C) 1996-2020 Free Software Foundation, Inc. This file is part of libopcodes. @@ -71,16 +71,16 @@ iq2000_cgen_isa_register (const char **strp) int len; int ch1, ch2; - if (**strp == 'r' || **strp == 'R') + if (**strp == 'r' || **strp == 'R') { len = strlen (*strp); - if (len == 2) + if (len == 2) { ch1 = (*strp)[1]; if ('0' <= ch1 && ch1 <= '9') return 1; - } - else if (len == 3) + } + else if (len == 3) { ch1 = (*strp)[1]; ch2 = (*strp)[2]; @@ -113,7 +113,7 @@ parse_mimm (CGEN_CPU_DESC cd, else { long value; - + errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); if (errmsg == NULL) { @@ -456,14 +456,16 @@ iq2000_cgen_parse_operand (CGEN_CPU_DESC cd, default : /* xgettext:c-format */ - fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); + opcodes_error_handler + (_("internal error: unrecognized field %d while parsing"), + opindex); abort (); } return errmsg; } -cgen_parse_fn * const iq2000_cgen_parse_handlers[] = +cgen_parse_fn * const iq2000_cgen_parse_handlers[] = { parse_insn_normal, }; @@ -493,9 +495,9 @@ CGEN_ASM_INIT_HOOK Returns NULL for success, an error message for failure. */ -char * +char * iq2000_cgen_build_insn_regex (CGEN_INSN *insn) -{ +{ CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); const char *mnem = CGEN_INSN_MNEMONIC (insn); char rxbuf[CGEN_MAX_RX_ELEMENTS]; @@ -534,18 +536,18 @@ iq2000_cgen_build_insn_regex (CGEN_INSN *insn) /* Copy any remaining literals from the syntax string into the rx. */ for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) { - if (CGEN_SYNTAX_CHAR_P (* syn)) + if (CGEN_SYNTAX_CHAR_P (* syn)) { char c = CGEN_SYNTAX_CHAR (* syn); - switch (c) + switch (c) { /* Escape any regex metacharacters in the syntax. */ - case '.': case '[': case '\\': - case '*': case '^': case '$': + case '.': case '[': case '\\': + case '*': case '^': case '$': #ifdef CGEN_ESCAPE_EXTENDED_REGEX - case '?': case '{': case '}': + case '?': case '{': case '}': case '(': case ')': case '*': case '|': case '+': case ']': #endif @@ -575,20 +577,20 @@ iq2000_cgen_build_insn_regex (CGEN_INSN *insn) } /* Trailing whitespace ok. */ - * rx++ = '['; - * rx++ = ' '; - * rx++ = '\t'; - * rx++ = ']'; - * rx++ = '*'; + * rx++ = '['; + * rx++ = ' '; + * rx++ = '\t'; + * rx++ = ']'; + * rx++ = '*'; /* But anchor it after that. */ - * rx++ = '$'; + * rx++ = '$'; * rx = '\0'; CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); - if (reg_err == 0) + if (reg_err == 0) return NULL; else { @@ -706,9 +708,11 @@ parse_insn_normal (CGEN_CPU_DESC cd, continue; } +#ifdef CGEN_MNEMONIC_OPERANDS + (void) past_opcode_p; +#endif /* We have an operand of some sort. */ - errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), - &str, fields); + errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); if (errmsg) return errmsg; @@ -785,7 +789,7 @@ iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd, const CGEN_INSN *insn = ilist->insn; recognized_mnemonic = 1; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not usually needed as unsupported opcodes shouldn't be in the hash lists. */ /* Is this insn supported by the selected cpu? */ @@ -825,32 +829,40 @@ iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd, { static char errbuf[150]; -#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS const char *tmp_errmsg; - - /* If requesting verbose error messages, use insert_errmsg. - Failing that, use parse_errmsg. */ - tmp_errmsg = (insert_errmsg ? insert_errmsg : - parse_errmsg ? parse_errmsg : - recognized_mnemonic ? - _("unrecognized form of instruction") : - _("unrecognized instruction")); - - if (strlen (start) > 50) - /* xgettext:c-format */ - sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); - else - /* xgettext:c-format */ - sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); +#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS +#define be_verbose 1 #else - if (strlen (start) > 50) - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s...'"), start); - else - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s'"), start); +#define be_verbose 0 #endif - + + if (be_verbose) + { + /* If requesting verbose error messages, use insert_errmsg. + Failing that, use parse_errmsg. */ + tmp_errmsg = (insert_errmsg ? insert_errmsg : + parse_errmsg ? parse_errmsg : + recognized_mnemonic ? + _("unrecognized form of instruction") : + _("unrecognized instruction")); + + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); + else + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); + } + else + { + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s...'"), start); + else + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s'"), start); + } + *errmsg = errbuf; return NULL; }