X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fm32c-asm.c;h=2b8400bad6c6dab5a1f5d7d20dbcb4da7739783c;hb=4dc48ef654a577ab5a55e7b791a6ff7892599b35;hp=60c1055c9543038ef2c9c38b49f5604c50682122;hpb=e729279b04301d65a619b1bad04b6aff686899b2;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32c-asm.c b/opcodes/m32c-asm.c index 60c1055c95..2b8400bad6 100644 --- a/opcodes/m32c-asm.c +++ b/opcodes/m32c-asm.c @@ -4,25 +4,26 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-asm.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2007 Free Software Foundation, Inc. - This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. - This program is free software; you can redistribute it and/or modify + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + /* ??? Eventually more and more of this stuff can go to cpu-independent files. Keep that in mind. */ @@ -127,6 +128,28 @@ parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp, unsigned long value; long have_zero = 0; + if (strncasecmp (*strp, "%dsp8(", 6) == 0) + { + enum cgen_parse_operand_result result_type; + bfd_vma value; + const char *errmsg; + + *strp += 6; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8, + & result_type, & value); + if (**strp != ')') + return _("missing `)'"); + (*strp) ++; + + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + { + return _("%dsp8() takes a symbolic address, not a number"); + } + *valuep = value; + return errmsg; + } + if (strncmp (*strp, "0x0", 3) == 0 || (**strp == '0' && *(*strp + 1) != 'x')) have_zero = 1; @@ -169,13 +192,60 @@ parse_signed4 (CGEN_CPU_DESC cd, const char **strp, return 0; } +static const char * +parse_signed4n (CGEN_CPU_DESC cd, const char **strp, + int opindex, signed long *valuep) +{ + const char *errmsg = 0; + signed long value; + long have_zero = 0; + + if (strncmp (*strp, "0x0", 3) == 0 + || (**strp == '0' && *(*strp + 1) != 'x')) + have_zero = 1; + + PARSE_SIGNED; + + if (value < -7 || value > 8) + return _("Immediate is out of range -7 to 8"); + + /* If this field may require a relocation then use larger dsp16. */ + if (! have_zero && value == 0) + return _("Immediate is out of range -7 to 8"); + + *valuep = -value; + return 0; +} + static const char * parse_signed8 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) { const char *errmsg = 0; signed long value; - + + if (strncasecmp (*strp, "%hi8(", 5) == 0) + { + enum cgen_parse_operand_result result_type; + bfd_vma value; + const char *errmsg; + + *strp += 5; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8, + & result_type, & value); + if (**strp != ')') + return _("missing `)'"); + (*strp) ++; + + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + { + value >>= 16; + } + *valuep = value; + return errmsg; + } + PARSE_SIGNED; if (value <= 255 && value > 127) @@ -195,7 +265,29 @@ parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp, const char *errmsg = 0; unsigned long value; long have_zero = 0; - + + if (strncasecmp (*strp, "%dsp16(", 7) == 0) + { + enum cgen_parse_operand_result result_type; + bfd_vma value; + const char *errmsg; + + *strp += 7; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16, + & result_type, & value); + if (**strp != ')') + return _("missing `)'"); + (*strp) ++; + + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + { + return _("%dsp16() takes a symbolic address, not a number"); + } + *valuep = value; + return errmsg; + } + /* Don't successfully parse literals beginning with '['. */ if (**strp == '[') return "Invalid literal"; /* Anything -- will not be seen. */ @@ -233,6 +325,50 @@ parse_signed16 (CGEN_CPU_DESC cd, const char **strp, const char *errmsg = 0; signed long value; + if (strncasecmp (*strp, "%lo16(", 6) == 0) + { + enum cgen_parse_operand_result result_type; + bfd_vma value; + const char *errmsg; + + *strp += 6; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, + & result_type, & value); + if (**strp != ')') + return _("missing `)'"); + (*strp) ++; + + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + { + value &= 0xffff; + } + *valuep = value; + return errmsg; + } + + if (strncasecmp (*strp, "%hi16(", 6) == 0) + { + enum cgen_parse_operand_result result_type; + bfd_vma value; + const char *errmsg; + + *strp += 6; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, + & result_type, & value); + if (**strp != ')') + return _("missing `)'"); + (*strp) ++; + + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + { + value >>= 16; + } + *valuep = value; + return errmsg; + } + PARSE_SIGNED; if (value <= 65535 && value > 32767) @@ -297,6 +433,26 @@ parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp, return 0; } +/* This should only be used for #imm->reg. */ +static const char * +parse_signed24 (CGEN_CPU_DESC cd, const char **strp, + int opindex, signed long *valuep) +{ + const char *errmsg = 0; + signed long value; + + PARSE_SIGNED; + + if (value <= 0xffffff && value > 0x7fffff) + value -= 0x1000000; + + if (value > 0xffffff) + return _("dsp:24 immediate is out of range"); + + *valuep = value; + return 0; +} + static const char * parse_signed32 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) @@ -348,16 +504,34 @@ parse_imm3_S (CGEN_CPU_DESC cd, const char **strp, return 0; } +static const char * +parse_bit3_S (CGEN_CPU_DESC cd, const char **strp, + int opindex, signed long *valuep) +{ + const char *errmsg = 0; + signed long value; + + errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); + if (errmsg) + return errmsg; + + if (value < 0 || value > 7) + return _("immediate is out of range 0-7"); + + *valuep = value; + return 0; +} + static const char * parse_lab_5_3 (CGEN_CPU_DESC cd, const char **strp, int opindex ATTRIBUTE_UNUSED, int opinfo, enum cgen_parse_operand_result *type_addr, - unsigned long *valuep) + bfd_vma *valuep) { const char *errmsg = 0; - unsigned long value; + bfd_vma value; enum cgen_parse_operand_result op_res; errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3, @@ -405,13 +579,14 @@ parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp, static const char * parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, int opindex, unsigned long *valuep, - unsigned bits) + unsigned bits, int allow_syms) { const char *errmsg = 0; unsigned long bit; unsigned long base; const char *newp = *strp; unsigned long long bitbase; + long have_zero = 0; errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); if (errmsg) @@ -421,6 +596,11 @@ parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, return "Missing base for bit,base:8"; ++newp; + + if (strncmp (newp, "0x0", 3) == 0 + || (newp[0] == '0' && newp[1] != 'x')) + have_zero = 1; + errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base); if (errmsg) return errmsg; @@ -430,6 +610,21 @@ parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, if (bitbase >= (1ull << bits)) return _("bit,base is out of range"); + /* If this field may require a relocation then use larger displacement. */ + if (! have_zero && base == 0) + { + switch (allow_syms) { + case 0: + return _("bit,base out of range for symbol"); + case 1: + break; + case 2: + if (strncmp (newp, "[sb]", 4) != 0) + return _("bit,base out of range for symbol"); + break; + } + } + *valuep = bitbase; *strp = newp; return 0; @@ -438,7 +633,7 @@ parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, static const char * parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep, - unsigned bits) + unsigned bits, int allow_syms) { const char *errmsg = 0; unsigned long bit; @@ -446,6 +641,7 @@ parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, const char *newp = *strp; long long bitbase; long long limit; + long have_zero = 0; errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); if (errmsg) @@ -455,6 +651,11 @@ parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, return "Missing base for bit,base:8"; ++newp; + + if (strncmp (newp, "0x0", 3) == 0 + || (newp[0] == '0' && newp[1] != 'x')) + have_zero = 1; + errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base); if (errmsg) return errmsg; @@ -465,6 +666,10 @@ parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, if (bitbase < -limit || bitbase >= limit) return _("bit,base is out of range"); + /* If this field may require a relocation then use larger displacement. */ + if (! have_zero && base == 0 && ! allow_syms) + return _("bit,base out of range for symbol"); + *valuep = bitbase; *strp = newp; return 0; @@ -474,56 +679,56 @@ static const char * parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp, int opindex, unsigned long *valuep) { - return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8); + return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0); } static const char * parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp, int opindex, unsigned long *valuep) { - return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11); + return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0); } static const char * parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp, int opindex, unsigned long *valuep) { - return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16); + return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1); } static const char * parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp, int opindex, unsigned long *valuep) { - return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19); + return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2); } static const char * parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp, int opindex, unsigned long *valuep) { - return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27); + return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1); } static const char * parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) { - return parse_signed_bitbase (cd, strp, opindex, valuep, 8); + return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1); } static const char * parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) { - return parse_signed_bitbase (cd, strp, opindex, valuep, 11); + return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0); } static const char * parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) { - return parse_signed_bitbase (cd, strp, opindex, valuep, 19); + return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1); } /* Parse the suffix as : or as nothing followed by a whitespace. */ @@ -639,14 +844,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); - int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA); + CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); /* If attributes are absent, assume no restriction. */ if (machs == 0) machs = ~0; return ((machs & cd->machs) - && (isas & cd->isas)); + && cgen_bitset_intersect_p (& isas, cd->isas)); } /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ @@ -778,6 +983,9 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_BIT16RN : errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); break; + case M32C_OPERAND_BIT3_S : + errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S)); + break; case M32C_OPERAND_BIT32ANPREFIXED : errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); break; @@ -907,6 +1115,9 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_40_U16 : errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16)); break; + case M32C_OPERAND_DSP_40_U20 : + errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20)); + break; case M32C_OPERAND_DSP_40_U24 : errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24)); break; @@ -922,12 +1133,18 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_48_U16 : errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16)); break; + case M32C_OPERAND_DSP_48_U20 : + errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20)); + break; case M32C_OPERAND_DSP_48_U24 : errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24)); break; case M32C_OPERAND_DSP_48_U8 : errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8)); break; + case M32C_OPERAND_DSP_8_S24 : + errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24)); + break; case M32C_OPERAND_DSP_8_S8 : errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8)); break; @@ -1039,6 +1256,9 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_12_S4 : errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4)); break; + case M32C_OPERAND_IMM_12_S4N : + errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4)); + break; case M32C_OPERAND_IMM_13_U3 : errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3)); break; @@ -1108,6 +1328,9 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_8_S4 : errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4)); break; + case M32C_OPERAND_IMM_8_S4N : + errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4)); + break; case M32C_OPERAND_IMM_SH_12_S4 : errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4); break; @@ -1382,6 +1605,9 @@ m32c_cgen_init_asm (CGEN_CPU_DESC cd) m32c_cgen_init_ibld_table (cd); cd->parse_handlers = & m32c_cgen_parse_handlers[0]; cd->parse_operand = m32c_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif }