X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fm32c-dis.c;h=e78bcd1799e0cd83e9705651be28127da115dbf3;hb=bcf2684fb02d7c2bccc2d8c7cff690b2e2a7d044;hp=d0d8f65771758264cc0d240e5c943db39856288e;hpb=a1a280bb84485d80f95e2efc1d02e962e0529652;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c index d0d8f65771..e78bcd1799 100644 --- a/opcodes/m32c-dis.c +++ b/opcodes/m32c-dis.c @@ -4,20 +4,20 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 - Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007, + 2008 Free Software Foundation, Inc. - This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. - This program is free software; you can redistribute it and/or modify + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., @@ -210,7 +210,7 @@ print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, }; disassemble_info *info = dis_info; int mask; - int index = 0; + int reg_index = 0; char* comma = ""; if (push) @@ -224,7 +224,7 @@ print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, comma = ","; } - for (index = 1; index <= 7; ++index) + for (reg_index = 1; reg_index <= 7; ++reg_index) { if (push) mask >>= 1; @@ -234,7 +234,7 @@ print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, if (value & mask) { (*info->fprintf_func) (info->stream, "%s%s", comma, - m16c_register_names [index]); + m16c_register_names [reg_index]); comma = ","; } } @@ -262,6 +262,19 @@ print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, print_regset (cd, dis_info, value, attrs, pc, length, PUSH); } +static void +print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + signed long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = dis_info; + + (*info->fprintf_func) (info->stream, "%ld", -value); +} + void m32c_cgen_print_operand (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); @@ -299,9 +312,6 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_A1 : print_keyword (cd, info, & m32c_cgen_opval_h_a1, 0, 0); break; - case M32C_OPERAND_A1A0 : - print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, 0, 0); - break; case M32C_OPERAND_AN16_PUSH_S : print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_4_1, 0); break; @@ -311,6 +321,9 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_BIT16RN : print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0); break; + case M32C_OPERAND_BIT3_S : + print_normal (cd, info, fields->f_imm3_S, 0|(1<f_dst32_an_prefixed, 0); break; @@ -440,6 +453,9 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_40_U16 : print_normal (cd, info, fields->f_dsp_40_u16, 0, pc, length); break; + case M32C_OPERAND_DSP_40_U20 : + print_normal (cd, info, fields->f_dsp_40_u20, 0, pc, length); + break; case M32C_OPERAND_DSP_40_U24 : print_normal (cd, info, fields->f_dsp_40_u24, 0, pc, length); break; @@ -455,12 +471,18 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_48_U16 : print_normal (cd, info, fields->f_dsp_48_u16, 0, pc, length); break; + case M32C_OPERAND_DSP_48_U20 : + print_normal (cd, info, fields->f_dsp_48_u20, 0|(1<f_dsp_48_u24, 0|(1<f_dsp_48_u8, 0, pc, length); break; + case M32C_OPERAND_DSP_8_S24 : + print_normal (cd, info, fields->f_dsp_8_s24, 0|(1<f_dsp_8_s8, 0|(1<f_imm_12_s4, 0|(1<f_imm_12_s4, 0|(1<f_imm_13_u3, 0|(1<f_imm_8_s4, 0|(1<f_imm_8_s4, 0|(1<f_imm_12_s4, 0); break; @@ -660,13 +688,13 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd, print_address (cd, info, fields->f_lab_16_8, 0|(1<f_lab_24_8, 0|(1<f_lab_24_8, 0|(1<f_lab_32_8, 0|(1<f_lab_32_8, 0|(1<f_lab_40_8, 0|(1<f_lab_40_8, 0|(1<f_lab_5_3, 0|(1<f_lab_8_16, 0|(1<f_lab_8_24, 0|(1<f_lab_8_24, 0|(1<f_lab_8_8, 0|(1<endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -1210,25 +1239,34 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -1244,7 +1282,7 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -1257,7 +1295,7 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list;