X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fm32c-ibld.c;h=b8ae67b6f046e96a863d047d9de172a75845a822;hb=aa31c464df60c72920e849ed5cf64eef545e3014;hp=c78d1f25f78dad6c88cb9835ff648254427072ef;hpb=f75eb1c00406df9d115a49dcf36c28dfef1478a6;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c index c78d1f25f7..b8ae67b6f0 100644 --- a/opcodes/m32c-ibld.c +++ b/opcodes/m32c-ibld.c @@ -3,20 +3,19 @@ THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. - the resultant file is machine generated, cgen-ibld.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005 - Free Software Foundation, Inc. + Copyright (C) 1996-2015 Free Software Foundation, Inc. - This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. - This program is free software; you can redistribute it and/or modify + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., @@ -33,6 +32,7 @@ #include "symcat.h" #include "m32c-desc.h" #include "m32c-opc.h" +#include "cgen/basic-modes.h" #include "opintl.h" #include "safe-ctype.h" @@ -137,7 +137,7 @@ insert_normal (CGEN_CPU_DESC cd, if (length == 0) return NULL; - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); /* For architectures with insns smaller than the base-insn-bitsize, @@ -168,13 +168,21 @@ insert_normal (CGEN_CPU_DESC cd, else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) { unsigned long maxval = mask; - - if ((unsigned long) value > maxval) + unsigned long val = (unsigned long) value; + + /* For hosts with a word size > 32 check to see if value has been sign + extended beyond 32 bits. If so then ignore these higher sign bits + as the user is attempting to store a 32-bit signed value into an + unsigned 32-bit field which is allowed. */ + if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) + val &= 0xFFFFFFFF; + + if (val > maxval) { /* xgettext:c-format */ sprintf (errbuf, - _("operand out of range (%lu not between 0 and %lu)"), - value, maxval); + _("operand out of range (0x%lx not between 0 and 0x%lx)"), + val, maxval); return errbuf; } } @@ -433,16 +441,15 @@ extract_normal (CGEN_CPU_DESC cd, return 1; } - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); /* For architectures with insns smaller than the insn-base-bitsize, word_length may be too big. */ if (cd->min_insn_bitsize < cd->base_insn_bitsize) { - if (word_offset == 0 - && word_length > total_length) - word_length = total_length; + if (word_offset + word_length > total_length) + word_length = total_length - word_offset; } /* Does the value reside in INSN_VALUE, and at the right alignment? */ @@ -461,7 +468,7 @@ extract_normal (CGEN_CPU_DESC cd, { unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) @@ -571,6 +578,20 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_BIT16RN : errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); break; + case M32C_OPERAND_BIT3_S : + { +{ + FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); + FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); +} + errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); + if (errmsg) + break; + errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); + if (errmsg) + break; + } + break; case M32C_OPERAND_BIT32ANPREFIXED : errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); break; @@ -580,14 +601,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_BIT32RNPREFIXED : { long value = fields->f_dst32_rn_prefixed_QI; - value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); + value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); } break; case M32C_OPERAND_BIT32RNUNPREFIXED : { long value = fields->f_dst32_rn_unprefixed_QI; - value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); + value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); } break; @@ -597,7 +618,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_BITBASE16_16_U16 : { long value = fields->f_dsp_16_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); } break; @@ -608,7 +629,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7)); - FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); + FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); } errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer); if (errmsg) @@ -622,7 +643,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7)); - FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3)); + FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3)); } errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); if (errmsg) @@ -636,14 +657,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7)); - FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3)); + FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3)); } errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); if (errmsg) break; { long value = fields->f_dsp_16_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<> (3))) & (255)); + FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255)); } errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); if (errmsg) @@ -668,14 +689,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7)); - FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); + FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); } errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); if (errmsg) break; { long value = fields->f_dsp_16_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); } if (errmsg) @@ -686,15 +707,15 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7)); - FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); - FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); + FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); + FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); } errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); if (errmsg) break; { long value = fields->f_dsp_16_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); } if (errmsg) @@ -708,7 +729,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7)); - FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3)); + FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3)); } errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); if (errmsg) @@ -722,8 +743,8 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7)); - FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); - FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11)); + FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); + FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11)); } errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); if (errmsg) @@ -740,7 +761,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7)); - FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); + FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); } errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); if (errmsg) @@ -754,8 +775,8 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7)); - FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); - FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255)); + FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); + FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255)); } errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); if (errmsg) @@ -772,8 +793,8 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7)); - FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255)); - FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535)); + FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255)); + FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535)); } errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); if (errmsg) @@ -783,7 +804,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, break; { long value = fields->f_dsp_32_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); } if (errmsg) @@ -805,7 +826,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_16_S16 : { long value = fields->f_dsp_16_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_16_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); } break; @@ -823,11 +844,11 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); - FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255)); + FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); } { long value = fields->f_dsp_16_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); } if (errmsg) @@ -841,11 +862,11 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); - FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255)); + FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); } { long value = fields->f_dsp_16_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); } if (errmsg) @@ -862,7 +883,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); - FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255)); + FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); } errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); if (errmsg) @@ -879,7 +900,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255)); - FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255)); + FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255)); } errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); if (errmsg) @@ -893,14 +914,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); - FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); + FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); } errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); if (errmsg) break; { long value = fields->f_dsp_32_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); } if (errmsg) @@ -911,14 +932,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); - FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); + FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); } errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); if (errmsg) break; { long value = fields->f_dsp_32_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); } if (errmsg) @@ -931,7 +952,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_32_S16 : { long value = fields->f_dsp_32_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_32_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); } break; case M32C_OPERAND_DSP_32_U20 : { long value = fields->f_dsp_32_u24; - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); } break; case M32C_OPERAND_DSP_32_U24 : { long value = fields->f_dsp_32_u24; - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); } break; @@ -965,7 +986,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_40_S16 : { long value = fields->f_dsp_40_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_40_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer); } break; + case M32C_OPERAND_DSP_40_U20 : + { + long value = fields->f_dsp_40_u20; + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); + errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer); + } + break; case M32C_OPERAND_DSP_40_U24 : { long value = fields->f_dsp_40_u24; - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); } break; @@ -992,7 +1020,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_48_S16 : { long value = fields->f_dsp_48_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_48_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); } break; + case M32C_OPERAND_DSP_48_U20 : + { +{ + FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15)); + FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535)); +} + { + long value = fields->f_dsp_48_u16; + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); + } + if (errmsg) + break; + errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); + if (errmsg) + break; + } + break; case M32C_OPERAND_DSP_48_U24 : { { - FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255)); + FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255)); FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535)); } { long value = fields->f_dsp_48_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); } if (errmsg) @@ -1030,7 +1076,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_8_S24 : { long value = fields->f_dsp_8_s24; - value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_8_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer); } break; case M32C_OPERAND_DSP_8_U24 : { long value = fields->f_dsp_8_u24; - value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); + value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer); } break; @@ -1137,7 +1183,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DST32RNPREFIXEDQI : { long value = fields->f_dst32_rn_prefixed_QI; - value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); + value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); } break; @@ -1158,7 +1204,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DST32RNUNPREFIXEDQI : { long value = fields->f_dst32_rn_unprefixed_QI; - value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); + value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); } break; @@ -1174,13 +1220,16 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_12_S4 : errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<f_imm_12_s4, 0|(1<f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer); break; case M32C_OPERAND_IMM_16_HI : { long value = fields->f_dsp_16_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<> (16))) & (65535)); + FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535)); FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535)); } { long value = fields->f_dsp_16_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); } if (errmsg) break; { long value = fields->f_dsp_32_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); } if (errmsg) @@ -1216,7 +1265,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); - FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255)); + FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); } errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); if (errmsg) @@ -1232,7 +1281,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_24_SI : { { - FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215)); + FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215)); FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255)); } errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); @@ -1240,7 +1289,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, break; { long value = fields->f_dsp_32_u24; - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); } if (errmsg) @@ -1250,7 +1299,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_32_HI : { long value = fields->f_dsp_32_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_32_s32; - value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); + value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_40_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<> (24))) & (255)); + FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255)); FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215)); } { long value = fields->f_dsp_40_u24; - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); } if (errmsg) @@ -1295,7 +1344,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_48_HI : { long value = fields->f_dsp_48_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<> (16))) & (65535)); + FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535)); FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535)); } { long value = fields->f_dsp_48_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); } if (errmsg) break; { long value = fields->f_dsp_64_u16; - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer); } if (errmsg) @@ -1328,7 +1377,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, { { FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255)); - FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255)); + FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255)); } errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer); if (errmsg) @@ -1344,14 +1393,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_64_HI : { long value = fields->f_dsp_64_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<f_dsp_8_s16; - value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); errmsg = insert_normal (cd, value, 0|(1<f_imm_8_s4, 0|(1<f_imm_8_s4, 0|(1<f_imm_12_s4, 0|(1<> (1))) & (3)); + FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); } errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); if (errmsg) @@ -1429,14 +1481,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_LAB_8_16 : { long value = fields->f_lab_8_16; - value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8)))); + value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8)))); errmsg = insert_normal (cd, value, 0|(1<f_lab_8_24; - value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); + value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); errmsg = insert_normal (cd, value, 0|(1<> (1)); + FLD (f_2_2) = ((USI) (tmp_val) >> (1)); } errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); if (errmsg) @@ -1543,7 +1595,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_SRC32RNPREFIXEDQI : { long value = fields->f_src32_rn_prefixed_QI; - value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); + value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); } break; @@ -1564,7 +1616,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_SRC32RNUNPREFIXEDQI : { long value = fields->f_src32_rn_unprefixed_QI; - value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); + value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); } break; @@ -1603,7 +1655,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_COND32 : { { - FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1)); + FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1)); FLD (f_13_3) = ((FLD (f_cond32)) & (7)); } errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer); @@ -1629,7 +1681,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_COND32J : { { - FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7)); + FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7)); FLD (f_7_1) = ((FLD (f_cond32j)) & (1)); } errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer); @@ -1725,6 +1777,17 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_BIT16RN : length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); break; + case M32C_OPERAND_BIT3_S : + { + length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); + if (length <= 0) break; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); + if (length <= 0) break; +{ + FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); +} + } + break; case M32C_OPERAND_BIT32ANPREFIXED : length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); break; @@ -1735,7 +1798,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); - value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); fields->f_dst32_rn_prefixed_QI = value; } break; @@ -1743,7 +1806,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); - value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); fields->f_dst32_rn_unprefixed_QI = value; } break; @@ -1754,7 +1817,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_16_u16 = value; } break; @@ -1790,7 +1853,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_16_s16 = value; } if (length <= 0) break; @@ -1817,7 +1880,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_16_u16 = value; } if (length <= 0) break; @@ -1833,7 +1896,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_16_u16 = value; } if (length <= 0) break; @@ -1901,7 +1964,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_32_u16 = value; } if (length <= 0) break; @@ -1926,7 +1989,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_16_s16 = value; } break; @@ -1937,7 +2000,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_16_u16 = value; } break; @@ -1946,7 +2009,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_16_u16 = value; } if (length <= 0) break; @@ -1962,7 +2025,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_16_u16 = value; } if (length <= 0) break; @@ -2008,7 +2071,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_32_u16 = value; } if (length <= 0) break; @@ -2024,7 +2087,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_32_u16 = value; } if (length <= 0) break; @@ -2040,7 +2103,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_32_s16 = value; } break; @@ -2051,7 +2114,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_32_u16 = value; } break; @@ -2059,7 +2122,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); fields->f_dsp_32_u24 = value; } break; @@ -2067,7 +2130,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); fields->f_dsp_32_u24 = value; } break; @@ -2078,7 +2141,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_40_s16 = value; } break; @@ -2089,15 +2152,23 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_40_u16 = value; } break; + case M32C_OPERAND_DSP_40_U20 : + { + long value; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); + fields->f_dsp_40_u20 = value; + } + break; case M32C_OPERAND_DSP_40_U24 : { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); fields->f_dsp_40_u24 = value; } break; @@ -2108,7 +2179,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_48_s16 = value; } break; @@ -2119,16 +2190,32 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_48_u16 = value; } break; + case M32C_OPERAND_DSP_48_U20 : + { + { + long value; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + fields->f_dsp_48_u16 = value; + } + if (length <= 0) break; + length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); + if (length <= 0) break; +{ + FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040)))); +} + } + break; case M32C_OPERAND_DSP_48_U24 : { { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_48_u16 = value; } if (length <= 0) break; @@ -2146,7 +2233,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); fields->f_dsp_8_s24 = value; } break; @@ -2157,7 +2244,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_8_u16 = value; } break; @@ -2165,7 +2252,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); + value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); fields->f_dsp_8_u24 = value; } break; @@ -2257,7 +2344,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); - value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); fields->f_dst32_rn_prefixed_QI = value; } break; @@ -2281,7 +2368,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); - value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); fields->f_dst32_rn_unprefixed_QI = value; } break; @@ -2298,6 +2385,9 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_12_S4 : length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_12_s4); break; + case M32C_OPERAND_IMM_12_S4N : + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_12_s4); + break; case M32C_OPERAND_IMM_13_U3 : length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3); break; @@ -2305,7 +2395,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_16_s16 = value; } break; @@ -2317,14 +2407,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_16_u16 = value; } if (length <= 0) break; { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_32_u16 = value; } if (length <= 0) break; @@ -2357,7 +2447,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); fields->f_dsp_32_u24 = value; } if (length <= 0) break; @@ -2370,7 +2460,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_32_s16 = value; } break; @@ -2381,7 +2471,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); + value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); fields->f_dsp_32_s32 = value; } break; @@ -2389,7 +2479,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_40_s16 = value; } break; @@ -2401,7 +2491,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); - value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); fields->f_dsp_40_u24 = value; } if (length <= 0) break; @@ -2416,7 +2506,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_48_s16 = value; } break; @@ -2428,14 +2518,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_48_u16 = value; } if (length <= 0) break; { long value; length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value); - value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); fields->f_dsp_64_u16 = value; } if (length <= 0) break; @@ -2462,7 +2552,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_64_s16 = value; } break; @@ -2470,7 +2560,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) << (8))) & (65280))))))); + value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); fields->f_dsp_8_s16 = value; } break; @@ -2480,6 +2570,9 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_8_S4 : length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_8_s4); break; + case M32C_OPERAND_IMM_8_S4N : + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_8_s4); + break; case M32C_OPERAND_IMM_SH_12_S4 : length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_12_s4); break; @@ -2552,7 +2645,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1)))); + value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1)))); fields->f_lab_8_16 = value; } break; @@ -2560,7 +2653,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); + value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); fields->f_lab_8_24 = value; } break; @@ -2665,7 +2758,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); - value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); fields->f_src32_rn_prefixed_QI = value; } break; @@ -2689,7 +2782,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); - value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); fields->f_src32_rn_unprefixed_QI = value; } break; @@ -2842,6 +2935,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_BIT16RN : value = fields->f_dst16_rn; break; + case M32C_OPERAND_BIT3_S : + value = fields->f_imm3_S; + break; case M32C_OPERAND_BIT32ANPREFIXED : value = fields->f_dst32_an_prefixed; break; @@ -2971,6 +3067,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_40_U16 : value = fields->f_dsp_40_u16; break; + case M32C_OPERAND_DSP_40_U20 : + value = fields->f_dsp_40_u20; + break; case M32C_OPERAND_DSP_40_U24 : value = fields->f_dsp_40_u24; break; @@ -2986,6 +3085,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U16 : value = fields->f_dsp_48_u16; break; + case M32C_OPERAND_DSP_48_U20 : + value = fields->f_dsp_48_u20; + break; case M32C_OPERAND_DSP_48_U24 : value = fields->f_dsp_48_u24; break; @@ -3106,6 +3208,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : value = fields->f_imm_12_s4; break; + case M32C_OPERAND_IMM_12_S4N : + value = fields->f_imm_12_s4; + break; case M32C_OPERAND_IMM_13_U3 : value = fields->f_imm_13_u3; break; @@ -3175,6 +3280,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : value = fields->f_imm_8_s4; break; + case M32C_OPERAND_IMM_8_S4N : + value = fields->f_imm_8_s4; + break; case M32C_OPERAND_IMM_SH_12_S4 : value = fields->f_imm_12_s4; break; @@ -3426,6 +3534,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_BIT16RN : value = fields->f_dst16_rn; break; + case M32C_OPERAND_BIT3_S : + value = fields->f_imm3_S; + break; case M32C_OPERAND_BIT32ANPREFIXED : value = fields->f_dst32_an_prefixed; break; @@ -3555,6 +3666,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_40_U16 : value = fields->f_dsp_40_u16; break; + case M32C_OPERAND_DSP_40_U20 : + value = fields->f_dsp_40_u20; + break; case M32C_OPERAND_DSP_40_U24 : value = fields->f_dsp_40_u24; break; @@ -3570,6 +3684,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U16 : value = fields->f_dsp_48_u16; break; + case M32C_OPERAND_DSP_48_U20 : + value = fields->f_dsp_48_u20; + break; case M32C_OPERAND_DSP_48_U24 : value = fields->f_dsp_48_u24; break; @@ -3690,6 +3807,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : value = fields->f_imm_12_s4; break; + case M32C_OPERAND_IMM_12_S4N : + value = fields->f_imm_12_s4; + break; case M32C_OPERAND_IMM_13_U3 : value = fields->f_imm_13_u3; break; @@ -3759,6 +3879,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : value = fields->f_imm_8_s4; break; + case M32C_OPERAND_IMM_8_S4N : + value = fields->f_imm_8_s4; + break; case M32C_OPERAND_IMM_SH_12_S4 : value = fields->f_imm_12_s4; break; @@ -4015,6 +4138,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_BIT16RN : fields->f_dst16_rn = value; break; + case M32C_OPERAND_BIT3_S : + fields->f_imm3_S = value; + break; case M32C_OPERAND_BIT32ANPREFIXED : fields->f_dst32_an_prefixed = value; break; @@ -4144,6 +4270,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_40_U16 : fields->f_dsp_40_u16 = value; break; + case M32C_OPERAND_DSP_40_U20 : + fields->f_dsp_40_u20 = value; + break; case M32C_OPERAND_DSP_40_U24 : fields->f_dsp_40_u24 = value; break; @@ -4159,6 +4288,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U16 : fields->f_dsp_48_u16 = value; break; + case M32C_OPERAND_DSP_48_U20 : + fields->f_dsp_48_u20 = value; + break; case M32C_OPERAND_DSP_48_U24 : fields->f_dsp_48_u24 = value; break; @@ -4276,6 +4408,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : fields->f_imm_12_s4 = value; break; + case M32C_OPERAND_IMM_12_S4N : + fields->f_imm_12_s4 = value; + break; case M32C_OPERAND_IMM_13_U3 : fields->f_imm_13_u3 = value; break; @@ -4345,6 +4480,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : fields->f_imm_8_s4 = value; break; + case M32C_OPERAND_IMM_8_S4N : + fields->f_imm_8_s4 = value; + break; case M32C_OPERAND_IMM_SH_12_S4 : fields->f_imm_12_s4 = value; break; @@ -4577,6 +4715,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_BIT16RN : fields->f_dst16_rn = value; break; + case M32C_OPERAND_BIT3_S : + fields->f_imm3_S = value; + break; case M32C_OPERAND_BIT32ANPREFIXED : fields->f_dst32_an_prefixed = value; break; @@ -4706,6 +4847,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_40_U16 : fields->f_dsp_40_u16 = value; break; + case M32C_OPERAND_DSP_40_U20 : + fields->f_dsp_40_u20 = value; + break; case M32C_OPERAND_DSP_40_U24 : fields->f_dsp_40_u24 = value; break; @@ -4721,6 +4865,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U16 : fields->f_dsp_48_u16 = value; break; + case M32C_OPERAND_DSP_48_U20 : + fields->f_dsp_48_u20 = value; + break; case M32C_OPERAND_DSP_48_U24 : fields->f_dsp_48_u24 = value; break; @@ -4838,6 +4985,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : fields->f_imm_12_s4 = value; break; + case M32C_OPERAND_IMM_12_S4N : + fields->f_imm_12_s4 = value; + break; case M32C_OPERAND_IMM_13_U3 : fields->f_imm_13_u3 = value; break; @@ -4907,6 +5057,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : fields->f_imm_8_s4 = value; break; + case M32C_OPERAND_IMM_8_S4N : + fields->f_imm_8_s4 = value; + break; case M32C_OPERAND_IMM_SH_12_S4 : fields->f_imm_12_s4 = value; break;