X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fm32r-asm.c;h=0aa62ce1a155cae54df6b4bd970086241812c269;hb=d60622826d14374d5b18ca343c4aae6627e58609;hp=824366c716541ee6b6197bc731a4ce37e94a7513;hpb=5b3b8cb07149b04b6e612ddae2b01958f839025f;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index 824366c716..0aa62ce1a1 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -1,9 +1,10 @@ /* Assembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator -This file is used to generate m32r-asm.c. +THIS FILE IS MACHINE GENERATED WITH CGEN. +- the resultant file is machine generated, cgen-asm.in isn't -Copyright (C) 1996, 1997 Free Software Foundation, Inc. +Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -18,146 +19,94 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +along with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* ??? Eventually more and more of this stuff can go to cpu-independent files. + Keep that in mind. */ + +#include "sysdep.h" #include #include #include "ansidecl.h" #include "bfd.h" +#include "symcat.h" +#include "m32r-desc.h" #include "m32r-opc.h" +#include "opintl.h" -/* ??? The layout of this stuff is still work in progress. - For speed in assembly/disassembly, we use inline functions. That of course - will only work for GCC. When this stuff is finished, we can decide whether - to keep the inline functions (and only get the performance increase when - compiled with GCC), or switch to macros, or use something else. -*/ +#undef min +#define min(a,b) ((a) < (b) ? (a) : (b)) +#undef max +#define max(a,b) ((a) > (b) ? (a) : (b)) -static const char *parse_insn_normal - PARAMS ((const struct cgen_insn *, const char **, struct cgen_fields *)); -static void insert_insn_normal - PARAMS ((const struct cgen_insn *, struct cgen_fields *, cgen_insn_t *)); +static const char * parse_insn_normal + PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); -/* Default insertion routine. - - SHIFT is negative for left shifts, positive for right shifts. - All bits of VALUE to be inserted must be valid as we don't handle - signed vs unsigned shifts. - - ATTRS is a mask of the boolean attributes. We don't need any at the - moment, but for consistency with extract_normal we have them. */ - -/* FIXME: This duplicates functionality with bfd's howto table and - bfd_install_relocation. */ -/* FIXME: For architectures where insns can be representable as ints, - store insn in `field' struct and add registers, etc. while parsing. */ - -static CGEN_INLINE void -insert_normal (value, attrs, start, length, shift, total_length, buffer) - long value; - unsigned int attrs; - int start, length, shift, total_length; - char *buffer; -{ - bfd_vma x; - -#if 0 /*def CGEN_INT_INSN*/ - *buffer |= ((value & ((1 << length) - 1)) - << (total_length - (start + length))); -#else - switch (total_length) - { - case 8: - x = *(unsigned char *) buffer; - break; - case 16: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - x = bfd_getb16 (buffer); - else - x = bfd_getl16 (buffer); - break; - case 32: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - x = bfd_getb32 (buffer); - else - x = bfd_getl32 (buffer); - break; - default : - abort (); - } +/* -- assembler routines inserted here */ - if (shift < 0) - value <<= -shift; - else - value >>= shift; +/* -- asm.c */ - x |= ((value & ((1 << length) - 1)) - << (total_length - (start + length))); +/* Handle '#' prefixes (i.e. skip over them). */ - switch (total_length) - { - case 8: - *buffer = value; - break; - case 16: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb16 (x, buffer); - else - bfd_putl16 (x, buffer); - break; - case 32: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb32 (x, buffer); - else - bfd_putl32 (x, buffer); - break; - default : - abort (); - } -#endif +static const char * +parse_hash (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; + const char **strp; + int opindex; + unsigned long *valuep; +{ + if (**strp == '#') + ++*strp; + return NULL; } - -/* -- assembler routines inserted here */ -/* -- asm.c */ /* Handle shigh(), high(). */ static const char * -parse_h_hi16 (strp, opindex, min, max, valuep) +parse_hi16 (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; const char **strp; int opindex; - unsigned long min, max; unsigned long *valuep; { const char *errmsg; + enum cgen_parse_operand_result result_type; + bfd_vma value; - /* FIXME: Need # in assembler syntax (means '#' is optional). */ if (**strp == '#') ++*strp; - if (strncmp (*strp, "high(", 5) == 0) + if (strncasecmp (*strp, "high(", 5) == 0) { *strp += 5; - /* FIXME: If value was a number, right shift by 16. */ - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_ULO, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO, + &result_type, &value); if (**strp != ')') return "missing `)'"; ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + value >>= 16; + *valuep = value; return errmsg; } - else if (strncmp (*strp, "shigh(", 6) == 0) + else if (strncasecmp (*strp, "shigh(", 6) == 0) { *strp += 6; - /* FIXME: If value was a number, right shift by 16 (+ sign test). */ - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_SLO, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO, + &result_type, &value); if (**strp != ')') return "missing `)'"; ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + value = (value >> 16) + (value & 0x8000 ? 1 : 0); + *valuep = value; return errmsg; } - return cgen_parse_unsigned_integer (strp, opindex, min, max, valuep); + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); } /* Handle low() in a signed context. Also handle sda(). @@ -165,39 +114,47 @@ parse_h_hi16 (strp, opindex, min, max, valuep) handles the case where low() isn't present. */ static const char * -parse_h_slo16 (strp, opindex, min, max, valuep) +parse_slo16 (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; const char **strp; int opindex; - long min, max; long *valuep; { const char *errmsg; + enum cgen_parse_operand_result result_type; + bfd_vma value; - /* FIXME: Need # in assembler syntax (means '#' is optional). */ if (**strp == '#') ++*strp; - if (strncmp (*strp, "low(", 4) == 0) + if (strncasecmp (*strp, "low(", 4) == 0) { *strp += 4; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, + &result_type, &value); if (**strp != ')') return "missing `)'"; ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + value &= 0xffff; + *valuep = value; return errmsg; } - if (strncmp (*strp, "sda(", 4) == 0) + if (strncasecmp (*strp, "sda(", 4) == 0) { *strp += 4; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_SDA16, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16, + NULL, &value); if (**strp != ')') return "missing `)'"; ++*strp; + *valuep = value; return errmsg; } - return cgen_parse_signed_integer (strp, opindex, min, max, valuep); + return cgen_parse_signed_integer (cd, strp, opindex, valuep); } /* Handle low() in an unsigned context. @@ -205,29 +162,35 @@ parse_h_slo16 (strp, opindex, min, max, valuep) handles the case where low() isn't present. */ static const char * -parse_h_ulo16 (strp, opindex, min, max, valuep) +parse_ulo16 (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; const char **strp; int opindex; - unsigned long min, max; unsigned long *valuep; { const char *errmsg; + enum cgen_parse_operand_result result_type; + bfd_vma value; - /* FIXME: Need # in assembler syntax (means '#' is optional). */ if (**strp == '#') ++*strp; - if (strncmp (*strp, "low(", 4) == 0) + if (strncasecmp (*strp, "low(", 4) == 0) { *strp += 4; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, + &result_type, &value); if (**strp != ')') return "missing `)'"; ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + value &= 0xffff; + *valuep = value; return errmsg; } - return cgen_parse_unsigned_integer (strp, opindex, min, max, valuep); + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); } /* -- */ @@ -246,264 +209,127 @@ parse_h_ulo16 (strp, opindex, min, max, valuep) the handlers. */ -CGEN_INLINE const char * -m32r_cgen_parse_operand (opindex, strp, fields) +const char * +m32r_cgen_parse_operand (cd, opindex, strp, fields) + CGEN_CPU_DESC cd; int opindex; - const char **strp; - struct cgen_fields *fields; + const char ** strp; + CGEN_FIELDS * fields; { - const char *errmsg; + const char * errmsg = NULL; + /* Used by scalar operands that still need to be parsed. */ + long junk; switch (opindex) { - case 0 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r2); - break; - case 1 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r1); - break; - case 2 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r1); - break; - case 3 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r2); - break; - case 4 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, &fields->f_r2); - break; - case 5 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, &fields->f_r1); - break; - case 6 : - errmsg = cgen_parse_signed_integer (strp, 6, -128, 127, &fields->f_simm8); - break; - case 7 : - errmsg = cgen_parse_signed_integer (strp, 7, -32768, 32767, &fields->f_simm16); - break; - case 8 : - errmsg = cgen_parse_unsigned_integer (strp, 8, 0, 15, &fields->f_uimm4); - break; - case 9 : - errmsg = cgen_parse_unsigned_integer (strp, 9, 0, 31, &fields->f_uimm5); + case M32R_OPERAND_ACC : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc); break; - case 10 : - errmsg = cgen_parse_unsigned_integer (strp, 10, 0, 65535, &fields->f_uimm16); + case M32R_OPERAND_ACCD : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd); break; - case 11 : - errmsg = parse_h_hi16 (strp, 11, 0, 65535, &fields->f_hi16); + case M32R_OPERAND_ACCS : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs); break; - case 12 : - errmsg = parse_h_slo16 (strp, 12, -32768, 32767, &fields->f_simm16); + case M32R_OPERAND_DCR : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1); break; - case 13 : - errmsg = parse_h_ulo16 (strp, 13, 0, 65535, &fields->f_uimm16); + case M32R_OPERAND_DISP16 : + { + bfd_vma value; + errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value); + fields->f_disp16 = value; + } break; - case 14 : - errmsg = cgen_parse_address (strp, 14, 0, &fields->f_uimm24); + case M32R_OPERAND_DISP24 : + { + bfd_vma value; + errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value); + fields->f_disp24 = value; + } break; - case 15 : - errmsg = cgen_parse_address (strp, 15, 0, &fields->f_disp8); - break; - case 16 : - errmsg = cgen_parse_address (strp, 16, 0, &fields->f_disp16); - break; - case 17 : - errmsg = cgen_parse_address (strp, 17, 0, &fields->f_disp24); - break; - - default : - fprintf (stderr, "Unrecognized field %d while parsing.\n", opindex); - abort (); - } - - return errmsg; -} - -/* Main entry point for operand insertion. - - This function is basically just a big switch statement. Earlier versions - used tables to look up the function to use, but - - if the table contains both assembler and disassembler functions then - the disassembler contains much of the assembler and vice-versa, - - there's a lot of inlining possibilities as things grow, - - using a switch statement avoids the function call overhead. - - This function could be moved into `parse_insn_normal', but keeping it - separate makes clear the interface between `parse_insn_normal' and each of - the handlers. It's also needed by GAS to insert operands that couldn't be - resolved during parsing. -*/ - -CGEN_INLINE void -m32r_cgen_insert_operand (opindex, fields, buffer) - int opindex; - struct cgen_fields *fields; - cgen_insn_t *buffer; -{ - switch (opindex) - { - case 0 : - insert_normal (fields->f_r2, 0|(1<f_disp8 = value; + } break; - case 1 : - insert_normal (fields->f_r1, 0|(1<f_r1); break; - case 2 : - insert_normal (fields->f_r1, 0|(1<f_r2, 0|(1<f_hi16); break; - case 4 : - insert_normal (fields->f_r2, 0|(1<f_imm1); break; - case 5 : - insert_normal (fields->f_r1, 0|(1<f_r2); break; - case 6 : - insert_normal (fields->f_simm8, 0, 8, 8, 0, CGEN_FIELDS_BITSIZE (fields), buffer); + case M32R_OPERAND_SIMM16 : + errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16); break; - case 7 : - insert_normal (fields->f_simm16, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer); + case M32R_OPERAND_SIMM8 : + errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8); break; - case 8 : - insert_normal (fields->f_uimm4, 0|(1<f_simm16); break; - case 9 : - insert_normal (fields->f_uimm5, 0|(1<f_r2); break; - case 10 : - insert_normal (fields->f_uimm16, 0|(1<f_r1); break; - case 11 : - insert_normal (fields->f_hi16, 0|(1<f_r2); break; - case 12 : - insert_normal (fields->f_simm16, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer); + case M32R_OPERAND_UIMM16 : + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16); break; - case 13 : - insert_normal (fields->f_uimm16, 0|(1<f_uimm24 = value; + } break; - case 14 : - insert_normal (fields->f_uimm24, 0|(1<f_uimm4); break; - case 15 : - insert_normal (fields->f_disp8, 0|(1<f_uimm5); break; - case 16 : - insert_normal (fields->f_disp16, 0|(1<f_disp24, 0|(1<f_uimm16); break; default : - fprintf (stderr, "Unrecognized field %d while building insn.\n", - opindex); - abort (); - } -} - -/* Main entry point for operand validation. - - This function is called from GAS when it has fully resolved an operand - that couldn't be resolved during parsing. - - The result is NULL for success or an error message (which may be - computed into a static buffer). -*/ - -CGEN_INLINE const char * -m32r_cgen_validate_operand (opindex, fields) - int opindex; - const struct cgen_fields *fields; -{ - const char *errmsg = NULL; - - switch (opindex) - { - case 0 : - /* nothing to do */ - break; - case 1 : - /* nothing to do */ - break; - case 2 : - /* nothing to do */ - break; - case 3 : - /* nothing to do */ - break; - case 4 : - /* nothing to do */ - break; - case 5 : - /* nothing to do */ - break; - case 6 : - errmsg = cgen_validate_signed_integer (fields->f_simm8, -128, 127); - break; - case 7 : - errmsg = cgen_validate_signed_integer (fields->f_simm16, -32768, 32767); - break; - case 8 : - errmsg = cgen_validate_unsigned_integer (fields->f_uimm4, 0, 15); - break; - case 9 : - errmsg = cgen_validate_unsigned_integer (fields->f_uimm5, 0, 31); - break; - case 10 : - errmsg = cgen_validate_unsigned_integer (fields->f_uimm16, 0, 65535); - break; - case 11 : - errmsg = cgen_validate_unsigned_integer (fields->f_hi16, 0, 65535); - break; - case 12 : - errmsg = cgen_validate_signed_integer (fields->f_simm16, -32768, 32767); - break; - case 13 : - errmsg = cgen_validate_unsigned_integer (fields->f_uimm16, 0, 65535); - break; - case 14 : - /* nothing to do */ - break; - case 15 : - /* nothing to do */ - break; - case 16 : - /* nothing to do */ - break; - case 17 : - /* nothing to do */ - break; - - default : - fprintf (stderr, "Unrecognized field %d while validating operand.\n", - opindex); + /* xgettext:c-format */ + fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); abort (); } return errmsg; } -cgen_parse_fn *m32r_cgen_parse_handlers[] = { - 0, /* default */ +cgen_parse_fn * const m32r_cgen_parse_handlers[] = +{ parse_insn_normal, }; -cgen_insert_fn *m32r_cgen_insert_handlers[] = { - 0, /* default */ - insert_insn_normal, -}; - void -m32r_cgen_init_asm (mach, endian) - int mach; - enum cgen_endian endian; +m32r_cgen_init_asm (cd) + CGEN_CPU_DESC cd; { - m32r_cgen_init_tables (mach); - cgen_set_cpu (& m32r_cgen_opcode_data, mach, endian); - cgen_asm_init (); + m32r_cgen_init_opcode_table (cd); + m32r_cgen_init_ibld_table (cd); + cd->parse_handlers = & m32r_cgen_parse_handlers[0]; + cd->parse_operand = m32r_cgen_parse_operand; } @@ -522,216 +348,185 @@ m32r_cgen_init_asm (mach, endian) */ static const char * -parse_insn_normal (insn, strp, fields) - const struct cgen_insn *insn; +parse_insn_normal (cd, insn, strp, fields) + CGEN_CPU_DESC cd; + const CGEN_INSN *insn; const char **strp; - struct cgen_fields *fields; + CGEN_FIELDS *fields; { - const struct cgen_syntax *syntax = CGEN_INSN_SYNTAX (insn); + /* ??? Runtime added insns not handled yet. */ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); const char *str = *strp; const char *errmsg; - const unsigned char *syn; + const char *p; + const unsigned char * syn; #ifdef CGEN_MNEMONIC_OPERANDS + /* FIXME: wip */ int past_opcode_p; #endif - /* If mnemonics are constant, they're not stored with the syntax string. */ -#ifndef CGEN_MNEMONIC_OPERANDS - { - const char *p = syntax->mnemonic; + /* For now we assume the mnemonic is first (there are no leading operands). + We can parse it without needing to set up operand parsing. + GAS's input scrubber will ensure mnemonics are lowercase, but we may + not be called from GAS. */ + p = CGEN_INSN_MNEMONIC (insn); + while (*p && tolower (*p) == tolower (*str)) + ++p, ++str; - while (*p && *p == *str) - ++p, ++str; - if (*p || (*str && !isspace (*str))) - return "unrecognized instruction"; + if (* p) + return _("unrecognized instruction"); - while (isspace (*str)) - ++str; - } +#ifndef CGEN_MNEMONIC_OPERANDS + if (* str && !isspace (* str)) + return _("unrecognized instruction"); #endif - CGEN_INIT_PARSE (); + CGEN_INIT_PARSE (cd); + cgen_init_parse_operand (cd); #ifdef CGEN_MNEMONIC_OPERANDS past_opcode_p = 0; #endif /* We don't check for (*str != '\0') here because we want to parse any trailing fake arguments in the syntax string. */ - for (syn = syntax->syntax; *syn != '\0'; ) + syn = CGEN_SYNTAX_STRING (syntax); + + /* Mnemonics come first for now, ensure valid string. */ + if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) + abort (); + + ++syn; + + while (* syn != 0) { /* Non operand chars must match exactly. */ - /* FIXME: Need to better handle whitespace. */ - if (CGEN_SYNTAX_CHAR_P (*syn)) + if (CGEN_SYNTAX_CHAR_P (* syn)) { - if (*str == CGEN_SYNTAX_CHAR (*syn)) + /* FIXME: While we allow for non-GAS callers above, we assume the + first char after the mnemonic part is a space. */ + /* FIXME: We also take inappropriate advantage of the fact that + GAS's input scrubber will remove extraneous blanks. */ + if (*str == CGEN_SYNTAX_CHAR (* syn)) { #ifdef CGEN_MNEMONIC_OPERANDS - if (*syn == ' ') + if (* syn == ' ') past_opcode_p = 1; #endif - ++syn; - ++str; + ++ syn; + ++ str; } else { /* Syntax char didn't match. Can't be this insn. */ - /* FIXME: would like to return "expected char `c'" */ - return "syntax error"; + /* FIXME: would like to return something like + "expected char `c'" */ + return _("syntax error"); } continue; } /* We have an operand of some sort. */ - errmsg = m32r_cgen_parse_operand (CGEN_SYNTAX_FIELD (*syn), - &str, fields); + errmsg = m32r_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), + &str, fields); if (errmsg) return errmsg; /* Done with this operand, continue with next one. */ - ++syn; + ++ syn; } /* If we're at the end of the syntax string, we're done. */ - if (*syn == '\0') + if (* syn == '\0') { /* FIXME: For the moment we assume a valid `str' can only contain blanks now. IE: We needn't try again with a longer version of the insn and it is assumed that longer versions of insns appear before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ - while (isspace (*str)) - ++str; + while (isspace (* str)) + ++ str; - if (*str != '\0') - return "junk at end of line"; /* FIXME: would like to include `str' */ + if (* str != '\0') + return _("junk at end of line"); /* FIXME: would like to include `str' */ return NULL; } /* We couldn't parse it. */ - return "unrecognized instruction"; -} - -/* Default insn builder (insert handler). - The instruction is recorded in target byte order. */ - -static void -insert_insn_normal (insn, fields, buffer) - const struct cgen_insn *insn; - struct cgen_fields *fields; - cgen_insn_t *buffer; -{ - const struct cgen_syntax *syntax = CGEN_INSN_SYNTAX (insn); - bfd_vma value; - const unsigned char *syn; - - CGEN_INIT_INSERT (); - value = syntax->value; - - /* If we're recording insns as numbers (rather than a string of bytes), - target byte order handling is deferred until later. */ -#undef min -#define min(a,b) ((a) < (b) ? (a) : (b)) -#if 0 /*def CGEN_INT_INSN*/ - *buffer = value; -#else - switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields))) - { - case 8: - *buffer = value; - break; - case 16: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb16 (value, (char *) buffer); - else - bfd_putl16 (value, (char *) buffer); - break; - case 32: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb32 (value, (char *) buffer); - else - bfd_putl32 (value, (char *) buffer); - break; - default: - abort (); - } -#endif - - /* ??? Rather than scanning the syntax string again, we could store - in `fields' a null terminated list of the fields that are present. */ - - for (syn = syntax->syntax; *syn != '\0'; ++syn) - { - if (CGEN_SYNTAX_CHAR_P (*syn)) - continue; - - m32r_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields, buffer); - } + return _("unrecognized instruction"); } /* Main entry point. This routine is called for each instruction to be assembled. STR points to the insn to be assembled. We assume all necessary tables have been initialized. + The assembled instruction, less any fixups, is stored in BUF. + Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value + still needs to be converted to target byte order, otherwise BUF is an array + of bytes in target byte order. The result is a pointer to the insn's entry in the opcode table, or NULL if an error occured (an error message will have already been - printed). */ + printed). + + Note that when processing (non-alias) macro-insns, + this function recurses. -const struct cgen_insn * -m32r_cgen_assemble_insn (str, fields, buf, errmsg) + ??? It's possible to make this cpu-independent. + One would have to deal with a few minor things. + At this point in time doing so would be more of a curiosity than useful + [for example this file isn't _that_ big], but keeping the possibility in + mind helps keep the design clean. */ + +const CGEN_INSN * +m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg) + CGEN_CPU_DESC cd; const char *str; - struct cgen_fields *fields; - cgen_insn_t *buf; + CGEN_FIELDS *fields; + CGEN_INSN_BYTES_PTR buf; char **errmsg; { const char *start; CGEN_INSN_LIST *ilist; + const char *tmp_errmsg; /* Skip leading white space. */ - while (isspace (*str)) - ++str; + while (isspace (* str)) + ++ str; /* The instructions are stored in hashed lists. Get the first in the list. */ - ilist = CGEN_ASM_LOOKUP_INSN (str); + ilist = CGEN_ASM_LOOKUP_INSN (cd, str); /* Keep looking until we find a match. */ start = str; for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) { - const struct cgen_insn *insn = ilist->insn; + const CGEN_INSN *insn = ilist->insn; -#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */ +#ifdef CGEN_VALIDATE_INSN_SUPPORTED + /* not usually needed as unsupported opcodes shouldn't be in the hash lists */ /* Is this insn supported by the selected cpu? */ - if (! m32r_cgen_insn_supported (insn)) + if (! m32r_cgen_insn_supported (cd, insn)) continue; #endif -#if 1 /* FIXME: wip */ /* If the RELAX attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) continue; -#endif str = start; - /* Record a default length for the insn. This will get set to the - correct value while parsing. */ - /* FIXME: wip */ + /* Allow parse/insert handlers to obtain length of insn. */ CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); - /* ??? The extent to which moving the parse and insert handlers into - this function (thus removing the function call) will speed things up - is unclear. The simplicity and flexibility of the current scheme is - appropriate for now. One could have the best of both worlds with - inline functions but of course that would only work for gcc. Since - we're machine generating some code we could do that here too. Maybe - later. */ - if (! (*CGEN_PARSE_FN (insn)) (insn, &str, fields)) + if (!(tmp_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields))) { - (*CGEN_INSERT_FN (insn)) (insn, fields, buf); + /* ??? 0 is passed for `pc' */ + if (CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, (bfd_vma) 0) + != NULL) + continue; /* It is up to the caller to actually output the insn and any queued relocs. */ return insn; @@ -740,12 +535,26 @@ m32r_cgen_assemble_insn (str, fields, buf, errmsg) /* Try the next entry. */ } - /* FIXME: We can return a better error message than this. - Need to track why it failed and pick the right one. */ { - static char errbuf[100]; - sprintf (errbuf, "bad instruction `%.50s%s'", - start, strlen (start) > 50 ? "..." : ""); + static char errbuf[150]; + +#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS + /* if verbose error messages, use errmsg from CGEN_PARSE_FN */ + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); + else + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); +#else + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s...'"), start); + else + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s'"), start); +#endif + *errmsg = errbuf; return NULL; } @@ -757,20 +566,24 @@ m32r_cgen_assemble_insn (str, fields, buf, errmsg) This lets GAS parse registers for us. ??? Interesting idea but not currently used. */ +/* Record each member of OPVALS in the assembler's symbol table. + FIXME: Not currently used. */ + void -m32r_cgen_asm_hash_keywords (opvals) - struct cgen_keyword *opvals; +m32r_cgen_asm_hash_keywords (cd, opvals) + CGEN_CPU_DESC cd; + CGEN_KEYWORD *opvals; { - struct cgen_keyword_search search = cgen_keyword_search_init (opvals, NULL); - const struct cgen_keyword_entry *ke; + CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); + const CGEN_KEYWORD_ENTRY * ke; - while ((ke = cgen_keyword_search_next (&search)) != NULL) + while ((ke = cgen_keyword_search_next (& search)) != NULL) { #if 0 /* Unnecessary, should be done in the search routine. */ if (! m32r_cgen_opval_supported (ke)) continue; #endif - cgen_asm_record_register (ke->name, ke->value); + cgen_asm_record_register (cd, ke->name, ke->value); } }