X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fm32r-dis.c;h=40d7679907ebf01b807019ba0c2f72e04d56aa0f;hb=cadaa5224a27a03e954df59576f41d0f6b75a443;hp=48c591a6941cc7f299eef643a0d23b09514370d4;hpb=252b5132c753830d5fd56823373aed85f2a0db63;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 48c591a694..40d7679907 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. +Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -47,39 +47,46 @@ static void print_keyword static void print_insn_normal PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int)); -static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, - disassemble_info *, char *, int)); +static int print_insn + PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned)); static int default_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); +static int read_insn + PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, + CGEN_EXTRACT_INFO *, unsigned long *)); /* -- disassembler routines inserted here */ /* -- dis.c */ +static void print_hash PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static int my_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); /* Immediate values are prefixed with '#'. */ -#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ -do { \ - if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \ - (*info->fprintf_func) (info->stream, "#"); \ -} while (0) +#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ + do \ + { \ + if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \ + (*info->fprintf_func) (info->stream, "#"); \ + } \ + while (0) /* Handle '#' prefixes as operands. */ static void print_hash (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; - long value; - unsigned int attrs; - bfd_vma pc; - int length; + long value ATTRIBUTE_UNUSED; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { disassemble_info *info = (disassemble_info *) dis_info; (*info->fprintf_func) (info->stream, "#"); } -#undef CGEN_PRINT_INSN +#undef CGEN_PRINT_INSN #define CGEN_PRINT_INSN my_print_insn static int @@ -134,6 +141,10 @@ my_print_insn (cd, pc, info) /* -- */ +void m32r_cgen_print_operand + PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, + void const *, bfd_vma, int)); + /* Main entry point for printing operands. XINFO is a `void *' and not a `disassemble_info *' to not put a requirement of dis-asm.h on cgen.h. @@ -147,8 +158,7 @@ my_print_insn (cd, pc, info) This function could be moved into `print_insn_normal', but keeping it separate makes clear the interface between `print_insn_normal' and each of - the handlers. -*/ + the handlers. */ void m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) @@ -156,7 +166,7 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) int opindex; PTR xinfo; CGEN_FIELDS *fields; - void const *attrs; + void const *attrs ATTRIBUTE_UNUSED; bfd_vma pc; int length; { @@ -164,6 +174,15 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) switch (opindex) { + case M32R_OPERAND_ACC : + print_keyword (cd, info, & m32r_cgen_opval_h_accums, fields->f_acc, 0); + break; + case M32R_OPERAND_ACCD : + print_keyword (cd, info, & m32r_cgen_opval_h_accums, fields->f_accd, 0); + break; + case M32R_OPERAND_ACCS : + print_keyword (cd, info, & m32r_cgen_opval_h_accums, fields->f_accs, 0); + break; case M32R_OPERAND_DCR : print_keyword (cd, info, & m32r_cgen_opval_cr_names, fields->f_r1, 0); break; @@ -180,11 +199,14 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) print_keyword (cd, info, & m32r_cgen_opval_gr_names, fields->f_r1, 0); break; case M32R_OPERAND_HASH : - print_hash (cd, info, fields->f_nil, 0|(1<f_hi16, 0|(1<f_imm1, 0|(1<f_r2, 0); break; @@ -251,12 +273,12 @@ m32r_cgen_init_dis (cd) static void print_normal (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; long value; unsigned int attrs; - bfd_vma pc; - int length; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { disassemble_info *info = (disassemble_info *) dis_info; @@ -277,12 +299,12 @@ print_normal (cd, dis_info, value, attrs, pc, length) static void print_address (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; bfd_vma value; unsigned int attrs; - bfd_vma pc; - int length; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { disassemble_info *info = (disassemble_info *) dis_info; @@ -307,11 +329,11 @@ print_address (cd, dis_info, value, attrs, pc, length) static void print_keyword (cd, dis_info, keyword_table, value, attrs) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; CGEN_KEYWORD *keyword_table; long value; - unsigned int attrs; + unsigned int attrs ATTRIBUTE_UNUSED; { disassemble_info *info = (disassemble_info *) dis_info; const CGEN_KEYWORD_ENTRY *ke; @@ -339,7 +361,7 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length) { const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); disassemble_info *info = (disassemble_info *) dis_info; - const unsigned char *syn; + const CGEN_SYNTAX_CHAR_TYPE *syn; CGEN_INIT_PRINT (cd); @@ -362,6 +384,35 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length) } } +/* Subroutine of print_insn. Reads an insn into the given buffers and updates + the extract info. + Returns 0 if all is well, non-zero otherwise. */ + +static int +read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; + bfd_vma pc; + disassemble_info *info; + char *buf; + int buflen; + CGEN_EXTRACT_INFO *ex_info; + unsigned long *insn_value; +{ + int status = (*info->read_memory_func) (pc, buf, buflen, info); + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return -1; + } + + ex_info->dis_info = info; + ex_info->valid = (1 << buflen) - 1; + ex_info->insn_bytes = buf; + + *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); + return 0; +} + /* Utility to print an insn. BUF is the base part of the insn, target byte order, BUFLEN bytes long. The result is the size of the insn in bytes or zero for an unknown insn @@ -374,31 +425,26 @@ print_insn (cd, pc, info, buf, buflen) bfd_vma pc; disassemble_info *info; char *buf; - int buflen; + unsigned int buflen; { - unsigned long insn_value; + CGEN_INSN_INT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; + int basesize; + + /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ + basesize = cd->base_insn_bitsize < buflen * 8 ? + cd->base_insn_bitsize : buflen * 8; + insn_value = cgen_get_insn_value (cd, buf, basesize); + + /* Fill in ex_info fields like read_insn would. Don't actually call + read_insn, since the incoming buffer is already read (and possibly + modified a la m32r). */ + ex_info.valid = (1 << buflen) - 1; ex_info.dis_info = info; - ex_info.valid = (1 << (cd->base_insn_bitsize / 8)) - 1; ex_info.insn_bytes = buf; - switch (buflen) - { - case 1: - insn_value = buf[0]; - break; - case 2: - insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf); - break; - case 4: - insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf); - break; - default: - abort (); - } - /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ @@ -408,25 +454,56 @@ print_insn (cd, pc, info, buf, buflen) const CGEN_INSN *insn = insn_list->insn; CGEN_FIELDS fields; int length; + unsigned long insn_value_cropped; -#if 0 /* not needed as insn shouldn't be in hash lists if not supported */ +#ifdef CGEN_VALIDATE_INSN_SUPPORTED + /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! m32r_cgen_insn_supported (cd, insn)) - continue; + { + insn_list = CGEN_DIS_NEXT_INSN (insn_list); + continue; + } #endif /* Basic bit mask must be correct. */ /* ??? May wish to allow target to defer this check until the extract handler. */ - if ((insn_value & CGEN_INSN_BASE_MASK (insn)) + + /* Base size may exceed this instruction's size. Extract the + relevant part from the buffer. */ + if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + info->endian == BFD_ENDIAN_BIG); + else + insn_value_cropped = insn_value; + + if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) == CGEN_INSN_BASE_VALUE (insn)) { /* Printing is handled in two passes. The first pass parses the machine insn and extracts the fields. The second pass prints them. */ - length = CGEN_EXTRACT_FN (cd, insn) - (cd, insn, &ex_info, insn_value, &fields, pc); + /* Make sure the entire insn is loaded into insn_value, if it + can fit. */ + if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + { + unsigned long full_insn_value; + int rc = read_insn (cd, pc, info, buf, + CGEN_INSN_BITSIZE (insn) / 8, + & ex_info, & full_insn_value); + if (rc != 0) + return rc; + length = CGEN_EXTRACT_FN (cd, insn) + (cd, insn, &ex_info, full_insn_value, &fields, pc); + } + else + length = CGEN_EXTRACT_FN (cd, insn) + (cd, insn, &ex_info, insn_value_cropped, &fields, pc); + /* length < 0 -> error */ if (length < 0) return length; @@ -459,18 +536,27 @@ default_print_insn (cd, pc, info) disassemble_info *info; { char buf[CGEN_MAX_INSN_SIZE]; + int buflen; int status; - /* Read the base part of the insn. */ + /* Attempt to read the base part of the insn. */ + buflen = cd->base_insn_bitsize / 8; + status = (*info->read_memory_func) (pc, buf, buflen, info); + + /* Try again with the minimum part, if min < base. */ + if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) + { + buflen = cd->min_insn_bitsize / 8; + status = (*info->read_memory_func) (pc, buf, buflen, info); + } - status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info); if (status != 0) { (*info->memory_error_func) (status, pc, info); return -1; } - return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8); + return print_insn (cd, pc, info, buf, buflen); } /* Main entry point. @@ -483,7 +569,9 @@ print_insn_m32r (pc, info) disassemble_info *info; { static CGEN_CPU_DESC cd = 0; - static prev_isa,prev_mach,prev_endian; + static int prev_isa; + static int prev_mach; + static int prev_endian; int length; int isa,mach; int endian = (info->endian == BFD_ENDIAN_BIG @@ -498,17 +586,21 @@ print_insn_m32r (pc, info) arch = info->arch; if (arch == bfd_arch_unknown) arch = CGEN_BFD_ARCH; - - /* There's no standard way to compute the isa number (e.g. for arm thumb) + + /* There's no standard way to compute the machine or isa number so we leave it to the target. */ +#ifdef CGEN_COMPUTE_MACH + mach = CGEN_COMPUTE_MACH (info); +#else + mach = info->mach; +#endif + #ifdef CGEN_COMPUTE_ISA isa = CGEN_COMPUTE_ISA (info); #else isa = 0; #endif - mach = info->mach; - /* If we've switched cpu's, close the current table and open a new one. */ if (cd && (isa != prev_isa