X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fm32r-dis.c;h=a1dafce2d0d27df9bf2f25c95f19db5a8c36b3b6;hb=5430098f1807e084fe4ff5057040d68435f3d8a2;hp=7590a200b86c917d8ceed0439f0360a8da19eef4;hpb=1620f33de1ac5f1ee4abf14b87c49e45b5bf097f;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 7590a200b8..a1dafce2d0 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -4,20 +4,19 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 - Free Software Foundation, Inc. + Copyright (C) 1996-2017 Free Software Foundation, Inc. - This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. - This program is free software; you can redistribute it and/or modify + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., @@ -59,15 +58,38 @@ static int read_insn /* -- disassembler routines inserted here. */ /* -- dis.c */ -/* Immediate values are prefixed with '#'. */ -#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ - do \ - { \ - if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \ - (*info->fprintf_func) (info->stream, "#"); \ - } \ - while (0) +/* Print signed operands with '#' prefixes. */ + +static void +print_signed_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + (*info->fprintf_func) (info->stream, "#"); + (*info->fprintf_func) (info->stream, "%ld", value); +} + +/* Print unsigned operands with '#' prefixes. */ + +static void +print_unsigned_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + (*info->fprintf_func) (info->stream, "#"); + (*info->fprintf_func) (info->stream, "0x%lx", value); +} /* Handle '#' prefixes as operands. */ @@ -206,16 +228,16 @@ m32r_cgen_print_operand (CGEN_CPU_DESC cd, print_normal (cd, info, fields->f_hi16, 0|(1<f_imm1, 0|(1<f_imm1, 0, pc, length); break; case M32R_OPERAND_SCR : print_keyword (cd, info, & m32r_cgen_opval_cr_names, fields->f_r2, 0); break; case M32R_OPERAND_SIMM16 : - print_normal (cd, info, fields->f_simm16, 0|(1<f_simm16, 0|(1<f_simm8, 0|(1<f_simm8, 0|(1<f_simm16, 0|(1<f_r2, 0); break; case M32R_OPERAND_UIMM16 : - print_normal (cd, info, fields->f_uimm16, 0|(1<f_uimm16, 0, pc, length); break; case M32R_OPERAND_UIMM24 : - print_address (cd, info, fields->f_uimm24, 0|(1<f_uimm24, 0|(1<f_uimm3, 0|(1<f_uimm3, 0, pc, length); break; case M32R_OPERAND_UIMM4 : - print_normal (cd, info, fields->f_uimm4, 0|(1<f_uimm4, 0, pc, length); break; case M32R_OPERAND_UIMM5 : - print_normal (cd, info, fields->f_uimm5, 0|(1<f_uimm5, 0, pc, length); break; case M32R_OPERAND_UIMM8 : - print_normal (cd, info, fields->f_uimm8, 0|(1<f_uimm8, 0, pc, length); break; case M32R_OPERAND_ULO16 : print_normal (cd, info, fields->f_uimm16, 0, pc, length); @@ -259,7 +281,7 @@ m32r_cgen_print_operand (CGEN_CPU_DESC cd, } } -cgen_print_fn * const m32r_cgen_print_handlers[] = +cgen_print_fn * const m32r_cgen_print_handlers[] = { print_insn_normal, }; @@ -287,10 +309,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -312,10 +330,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* Nothing to do. */ @@ -457,7 +471,7 @@ print_insn (CGEN_CPU_DESC cd, int length; unsigned long insn_value_cropped; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! m32r_cgen_insn_supported (cd, insn)) @@ -475,7 +489,7 @@ print_insn (CGEN_CPU_DESC cd, relevant part from the buffer. */ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) - insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), info->endian == BFD_ENDIAN_BIG); else insn_value_cropped = insn_value; @@ -594,7 +608,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) arch = info->arch; if (arch == bfd_arch_unknown) arch = CGEN_BFD_ARCH; - + /* There's no standard way to compute the machine or isa number so we leave it to the target. */ #ifdef CGEN_COMPUTE_MACH @@ -635,7 +649,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) break; } } - } + } /* If we haven't initialized yet, initialize the opcode table. */ if (! cd)