X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fm68k-opc.c;h=db198941f07beb0abed120e6ec47e59d43806f19;hb=50d036364fb2a71b3ac9a0b0cdbe58296832a1b2;hp=6ec6163aa390a63059f7ff837e95b5fb667e30fe;hpb=6f2750feaf2827ef8a1a0a5b2f90c1e9a6cabbd1;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index 6ec6163aa3..db198941f0 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -1,5 +1,5 @@ /* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200. - Copyright (C) 1989-2016 Free Software Foundation, Inc. + Copyright (C) 1989-2020 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -265,11 +265,14 @@ const struct m68k_opcode m68k_opcodes[] = {"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up }, {"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpib", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 }, +{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a }, {"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c }, -{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpiw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 }, +{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a }, {"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c }, -{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpil", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 }, +{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a }, {"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, {"cmpmb", 2, one(0130410), one(0170770), "+s+d", m68000up }, @@ -277,18 +280,21 @@ const struct m68k_opcode m68k_opcodes[] = {"cmpml", 2, one(0130610), one(0170770), "+s+d", m68000up }, /* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */ -{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpb", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 }, +{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a }, {"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c }, {"cmpb", 2, one(0130410), one(0170770), "+s+d", m68000up }, {"cmpb", 2, one(0130000), one(0170700), ";bDd", m68000up }, {"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b | mcfisa_c }, {"cmpw", 2, one(0130300), one(0170700), "*wAd", m68000up }, -{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 }, +{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a }, {"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c }, {"cmpw", 2, one(0130510), one(0170770), "+s+d", m68000up }, {"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b | mcfisa_c }, {"cmpl", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpl", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 }, +{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a }, {"cmpl", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, {"cmpl", 2, one(0130610), one(0170770), "+s+d", m68000up }, {"cmpl", 2, one(0130200), one(0170700), "*lDd", m68000up | mcfisa_a }, @@ -1501,6 +1507,13 @@ const struct m68k_opcode m68k_opcodes[] = {"macw", 4, two(0xa000, 0x0200), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX. */ {"macw", 4, two(0xa000, 0x0000), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX. */ +{"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfemac }, +{"macw", 4, two(0xa080, 0x0200), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfemac }, +{"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0f10), "uNuo4/Rn", mcfemac }, +{"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0910), "uMumiI", mcfemac }, +{"macw", 4, two(0xa000, 0x0200), two(0xf1b0, 0x0910), "uMumMh", mcfemac }, +{"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0f10), "uMum", mcfemac }, + {"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac }, {"macl", 4, two(0xa080, 0x0a00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac }, {"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac }, @@ -1515,6 +1528,13 @@ const struct m68k_opcode m68k_opcodes[] = {"macl", 4, two(0xa000, 0x0a00), two(0xf130, 0x0900), "RMRmMheH", mcfemac }, {"macl", 4, two(0xa000, 0x0800), two(0xf130, 0x0f00), "RMRmeH", mcfemac }, +{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfemac }, +{"macl", 4, two(0xa080, 0x0a00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfemac }, +{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfemac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0b10), "RMRmiI", mcfemac }, +{"macl", 4, two(0xa000, 0x0a00), two(0xf1b0, 0x0b10), "RMRmMh", mcfemac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0910), "RMRm", mcfemac }, + /* NOTE: The mcf5200 family programmer's reference manual does not indicate the byte form of the movea instruction is invalid (as it is on 68000 family cpus). However, experiments on the 5202 yeild @@ -1575,13 +1595,13 @@ const struct m68k_opcode m68k_opcodes[] = {"moveb", 2, one(0010200), one(0170700), "obad", mcfisa_a }, {"moveb", 2, one(0010300), one(0170700), "ob+d", mcfisa_a }, {"moveb", 2, one(0010400), one(0170700), "ob-d", mcfisa_a }, -{"moveb", 2, one(0010000), one(0170000), "obnd", mcfisa_b | mcfisa_c }, +{"moveb", 2, one(0010074), one(0170077), "#bpd", mcfisa_b | mcfisa_c }, {"movew", 2, one(0030000), one(0170000), "*w%d", m68000up }, {"movew", 2, one(0030000), one(0170000), "ms%d", mcfisa_a }, {"movew", 2, one(0030000), one(0170000), "nspd", mcfisa_a }, {"movew", 2, one(0030000), one(0170000), "owmd", mcfisa_a }, -{"movew", 2, one(0030000), one(0170000), "ownd", mcfisa_b | mcfisa_c }, +{"movew", 2, one(0030074), one(0170077), "#wpd", mcfisa_b | mcfisa_c }, {"movew", 2, one(0040300), one(0177700), "Ss$s", m68000up }, {"movew", 2, one(0040300), one(0177770), "SsDs", mcfisa_a }, {"movew", 2, one(0041300), one(0177700), "Cs$s", m68010up }, @@ -1630,7 +1650,7 @@ const struct m68k_opcode m68k_opcodes[] = {"move", 2, one(0030000), one(0170000), "ms%d", mcfisa_a }, {"move", 2, one(0030000), one(0170000), "nspd", mcfisa_a }, {"move", 2, one(0030000), one(0170000), "owmd", mcfisa_a }, -{"move", 2, one(0030000), one(0170000), "ownd", mcfisa_b | mcfisa_c }, +{"move", 2, one(0030074), one(0170077), "#wpd", mcfisa_b | mcfisa_c }, {"move", 2, one(0040300), one(0177700), "Ss$s", m68000up }, {"move", 2, one(0040300), one(0177770), "SsDs", mcfisa_a }, {"move", 2, one(0041300), one(0177700), "Cs$s", m68010up }, @@ -2311,7 +2331,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] = { "dbhsw", "dbcc", }, { "dbra", "dbf", }, { "dbraw", "dbf", }, - { "tdivsl", "divsl", }, + { "tdivsl", "divsll", }, { "divs", "divsw", }, { "divu", "divuw", }, { "ext", "extw", }, @@ -2421,7 +2441,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] = { "movsw", "movesw", }, { "mov3q", "mov3ql", }, - { "tdivul", "divul", }, /* For m68k-svr4. */ + { "tdivul", "divull", }, /* For m68k-svr4. */ { "fmovb", "fmoveb", }, { "fsmovb", "fsmoveb", }, { "fdmovb", "fdmoveb", },