X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fmep-opc.h;h=f8c8d70ff26be5f25bb97c55698413da95e68c35;hb=9da4dfd6816fa2198bd80fd6a7b12fef4d6c8361;hp=0704c3001a7727e1e004f13353366d1ff4f1ae01;hpb=1d74713bc6983fddbae51aed5337c0b88b0a672f;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/mep-opc.h b/opcodes/mep-opc.h index 0704c3001a..f8c8d70ff2 100644 --- a/opcodes/mep-opc.h +++ b/opcodes/mep-opc.h @@ -1,8 +1,9 @@ +/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ /* Instruction opcode header for mep. THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2007 Free Software Foundation, Inc. +Copyright (C) 1996-2018 Free Software Foundation, Inc. This file is part of the GNU Binutils and/or GDB, the GNU debugger. @@ -25,6 +26,10 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger. #ifndef MEP_OPC_H #define MEP_OPC_H +#ifdef __cplusplus +extern "C" { +#endif + /* -- opc.h */ #undef CGEN_DIS_HASH_SIZE @@ -87,7 +92,7 @@ extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask; ) /* A mask for all ISAs executed by a VLIW coprocessor. */ -#define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask +#define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask; #define MEP_INSN_COP_P(insn) ( \ @@ -96,6 +101,7 @@ extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask; ) extern int mep_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *); +extern int mep_cgen_insn_supported_asm (CGEN_CPU_DESC, const CGEN_INSN *); /* -- asm.c */ /* Enum declaration for mep instruction types. */ @@ -484,6 +490,8 @@ struct cgen_fields long f_ivc2_3u25; long f_ivc2_imm16p0; long f_ivc2_simm16p0; + long f_ivc2_ccrn_c3hi; + long f_ivc2_ccrn_c3lo; long f_ivc2_crn; long f_ivc2_crm; long f_ivc2_ccrn_h1; @@ -492,6 +500,7 @@ struct cgen_fields long f_ivc2_cmov1; long f_ivc2_cmov2; long f_ivc2_cmov3; + long f_ivc2_ccrn_c3; long f_ivc2_ccrn; long f_ivc2_crnx; }; @@ -510,4 +519,8 @@ struct cgen_fields } + #ifdef __cplusplus + } + #endif + #endif /* MEP_OPC_H */