X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fmips-dis.c;h=fa33821f32c587fc832dd6627977c8cf20df08b3;hb=fb48caede320a6314cff339ab026c71a837184d1;hp=1e3577cec32dc90a500e7101f485cf4eb9ee81f0;hpb=30727aa6d12fb866494020c0b62ab265a2bdcdfe;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 1e3577cec3..fa33821f32 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1,5 +1,6 @@
 /* Print mips instructions for GDB, the GNU debugger, or for objdump.
-   Copyright (c) 1989, 91-97, 1998 Free Software Foundation, Inc.
+   Copyright (c) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
+   Free Software Foundation, Inc.
    Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
 
 This file is part of GDB, GAS, and the GNU binutils.
@@ -18,7 +19,6 @@ You should have received a copy of the GNU General Public License
 along with this program; if not, write to the Free Software
 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
-#include <ansidecl.h>
 #include "sysdep.h"
 #include "dis-asm.h"
 #include "opcode/mips.h"
@@ -50,7 +50,7 @@ static int _print_insn_mips PARAMS ((bfd_vma, unsigned long int,
 
 
 /* FIXME: This should be shared with gdb somehow.  */
-#define REGISTER_NAMES 	\
+#define STD_REGISTER_NAMES 	\
     {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
 	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7", \
 	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
@@ -64,13 +64,17 @@ static int _print_insn_mips PARAMS ((bfd_vma, unsigned long int,
 	"epc",  "prid"\
     }
 
-static CONST char * CONST reg_names[] = REGISTER_NAMES;
+static CONST char * CONST std_reg_names[] = STD_REGISTER_NAMES;
 
 /* The mips16 register names.  */
 static const char * const mips16_reg_names[] =
 {
   "s0", "s1", "v0", "v1", "a0", "a1", "a2", "a3"
 };
+
+/* Scalar register names. set_mips_isa_type() decides which register name
+   table to use.  */
+static CONST char * CONST *reg_names = NULL;
 
 /* subroutine */
 static void
@@ -133,7 +137,8 @@ print_insn_arg (d, l, pc, info)
 
     case 'a':
       (*info->print_address_func)
-	(((pc & 0xF0000000) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
+	(((pc & ~ (bfd_vma) 0x0fffffff)
+	  | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
 	 info);
       break;
 
@@ -254,6 +259,9 @@ set_mips_isa_type (mach, isa, cputype)
   int target_processor = 0;
   int mips_isa = 0;
 
+  /* Use standard MIPS register names by default.  */
+  reg_names = std_reg_names;
+
   switch (mach)
     {
       case bfd_mach_mips3000:
@@ -387,28 +395,8 @@ _print_insn_mips (memaddr, word, info)
 	  if (op->pinfo != INSN_MACRO && (word & op->mask) == op->match)
 	    {
 	      register const char *d;
-	      int insn_isa;
-
-	      if ((op->membership & INSN_ISA) == INSN_ISA1)
-		insn_isa = 1;
-	      else if ((op->membership & INSN_ISA) == INSN_ISA2)
-		insn_isa = 2;
-	      else if ((op->membership & INSN_ISA) == INSN_ISA3)
-		insn_isa = 3;
-	      else if ((op->membership & INSN_ISA) == INSN_ISA4)
-		insn_isa = 4;
-	      else
-		insn_isa = 15;
-
-	      if (insn_isa > mips_isa
-		  && (target_processor == 4650
-		      && op->membership & INSN_4650) == 0
-		  && (target_processor == 4010
-		      && op->membership & INSN_4010) == 0
-		  && (target_processor == 4100
-		      && op->membership & INSN_4100) == 0
-		  && (target_processor == 3900
-		      && op->membership & INSN_3900) == 0)
+
+	      if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor, 0))
 		continue;
 
 	      (*info->fprintf_func) (info->stream, "%s", op->name);