X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fpo%2Fopcodes.pot;h=8ff1e9c975151802ad6a870e25269467c7b37c4d;hb=af0b2a3e85df9f49a3528e5b7578fcf9412f1acc;hp=f2868722c13feda6fe99e3c2e901f240595f5abb;hpb=6a56ec7ea31f044f802074fac62f0cc30fb81aff;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/po/opcodes.pot b/opcodes/po/opcodes.pot
index f2868722c1..8ff1e9c975 100644
--- a/opcodes/po/opcodes.pot
+++ b/opcodes/po/opcodes.pot
@@ -1,314 +1,2203 @@
 # SOME DESCRIPTIVE TITLE.
-# Copyright (C) YEAR Free Software Foundation, Inc.
+# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER
+# This file is distributed under the same license as the PACKAGE package.
 # FIRST AUTHOR <EMAIL@ADDRESS>, YEAR.
 #
 #, fuzzy
 msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
-"POT-Creation-Date: 2001-01-09 12:07-0800\n"
+"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
+"POT-Creation-Date: 2020-05-20 15:53+0100\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
+"Language: \n"
 "MIME-Version: 1.0\n"
 "Content-Type: text/plain; charset=CHARSET\n"
-"Content-Transfer-Encoding: ENCODING\n"
+"Content-Transfer-Encoding: 8bit\n"
 
-#: alpha-opc.c:335
+#: aarch64-asm.c:820
+msgid "specified register cannot be read from"
+msgstr ""
+
+#: aarch64-asm.c:829
+msgid "specified register cannot be written to"
+msgstr ""
+
+#. Invalid option.
+#: aarch64-dis.c:93 arc-dis.c:802 arm-dis.c:11646
+#, c-format
+msgid "unrecognised disassembler option: %s"
+msgstr ""
+
+#: aarch64-dis.c:3531
+#, c-format
+msgid ""
+"\n"
+"The following AARCH64 specific disassembler options are supported for use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
+msgstr ""
+
+#: aarch64-dis.c:3535
+#, c-format
+msgid ""
+"\n"
+"  no-aliases         Don't print instruction aliases.\n"
+msgstr ""
+
+#: aarch64-dis.c:3538
+#, c-format
+msgid ""
+"\n"
+"  aliases            Do print instruction aliases.\n"
+msgstr ""
+
+#: aarch64-dis.c:3541
+#, c-format
+msgid ""
+"\n"
+"  no-notes         Don't print instruction notes.\n"
+msgstr ""
+
+#: aarch64-dis.c:3544
+#, c-format
+msgid ""
+"\n"
+"  notes            Do print instruction notes.\n"
+msgstr ""
+
+#: aarch64-dis.c:3548
+#, c-format
+msgid ""
+"\n"
+"  debug_dump         Temp switch for debug trace.\n"
+msgstr ""
+
+#: aarch64-dis.c:3552 mips-dis.c:2778 mips-dis.c:2788 mips-dis.c:2791
+#: nfp-dis.c:2981 riscv-dis.c:616
+#, c-format
+msgid "\n"
+msgstr ""
+
+#: aarch64-opc.c:1347
+msgid "immediate value"
+msgstr ""
+
+#: aarch64-opc.c:1357
+msgid "immediate offset"
+msgstr ""
+
+#: aarch64-opc.c:1367
+msgid "register number"
+msgstr ""
+
+#: aarch64-opc.c:1377
+msgid "register element index"
+msgstr ""
+
+#: aarch64-opc.c:1387
+msgid "shift amount"
+msgstr ""
+
+#: aarch64-opc.c:1399
+msgid "multiplier"
+msgstr ""
+
+#: aarch64-opc.c:1472
+msgid "reg pair must start from even reg"
+msgstr ""
+
+#: aarch64-opc.c:1478
+msgid "reg pair must be contiguous"
+msgstr ""
+
+#: aarch64-opc.c:1492
+msgid "extraneous register"
+msgstr ""
+
+#: aarch64-opc.c:1498
+msgid "missing register"
+msgstr ""
+
+#: aarch64-opc.c:1509
+msgid "stack pointer register expected"
+msgstr ""
+
+#: aarch64-opc.c:1534
+msgid "z0-z15 expected"
+msgstr ""
+
+#: aarch64-opc.c:1535
+msgid "z0-z7 expected"
+msgstr ""
+
+#: aarch64-opc.c:1561
+msgid "invalid register list"
+msgstr ""
+
+#: aarch64-opc.c:1575
+msgid "p0-p7 expected"
+msgstr ""
+
+#: aarch64-opc.c:1601 aarch64-opc.c:1609
+msgid "unexpected address writeback"
+msgstr ""
+
+#: aarch64-opc.c:1620
+msgid "address writeback expected"
+msgstr ""
+
+#: aarch64-opc.c:1667
+msgid "negative or unaligned offset expected"
+msgstr ""
+
+#: aarch64-opc.c:1724
+msgid "invalid register offset"
+msgstr ""
+
+#: aarch64-opc.c:1746
+msgid "invalid post-increment amount"
+msgstr ""
+
+#: aarch64-opc.c:1762 aarch64-opc.c:2271
+msgid "invalid shift amount"
+msgstr ""
+
+#: aarch64-opc.c:1775
+msgid "invalid extend/shift operator"
+msgstr ""
+
+#: aarch64-opc.c:1821 aarch64-opc.c:2073 aarch64-opc.c:2108 aarch64-opc.c:2127
+#: aarch64-opc.c:2135 aarch64-opc.c:2224 aarch64-opc.c:2401 aarch64-opc.c:2501
+#: aarch64-opc.c:2514
+msgid "immediate out of range"
+msgstr ""
+
+#: aarch64-opc.c:1843 aarch64-opc.c:1885 aarch64-opc.c:1947 aarch64-opc.c:1981
+msgid "invalid addressing mode"
+msgstr ""
+
+#: aarch64-opc.c:1939
+msgid "index register xzr is not allowed"
+msgstr ""
+
+#: aarch64-opc.c:2061 aarch64-opc.c:2083 aarch64-opc.c:2304 aarch64-opc.c:2312
+#: aarch64-opc.c:2378 aarch64-opc.c:2407
+msgid "invalid shift operator"
+msgstr ""
+
+#: aarch64-opc.c:2067
+msgid "shift amount must be 0 or 12"
+msgstr ""
+
+#: aarch64-opc.c:2090
+msgid "shift amount must be a multiple of 16"
+msgstr ""
+
+#: aarch64-opc.c:2102
+msgid "negative immediate value not allowed"
+msgstr ""
+
+#: aarch64-opc.c:2235
+msgid "immediate zero expected"
+msgstr ""
+
+#: aarch64-opc.c:2249
+msgid "rotate expected to be 0, 90, 180 or 270"
+msgstr ""
+
+#: aarch64-opc.c:2260
+msgid "rotate expected to be 90 or 270"
+msgstr ""
+
+#: aarch64-opc.c:2320
+msgid "shift is not permitted"
+msgstr ""
+
+#: aarch64-opc.c:2345
+msgid "invalid value for immediate"
+msgstr ""
+
+#: aarch64-opc.c:2370
+msgid "shift amount must be 0 or 16"
+msgstr ""
+
+#: aarch64-opc.c:2391
+msgid "floating-point immediate expected"
+msgstr ""
+
+#: aarch64-opc.c:2425
+msgid "no shift amount allowed for 8-bit constants"
+msgstr ""
+
+#: aarch64-opc.c:2435
+msgid "shift amount must be 0 or 8"
+msgstr ""
+
+#: aarch64-opc.c:2448
+msgid "immediate too big for element size"
+msgstr ""
+
+#: aarch64-opc.c:2455
+msgid "invalid arithmetic immediate"
+msgstr ""
+
+#: aarch64-opc.c:2469
+msgid "floating-point value must be 0.5 or 1.0"
+msgstr ""
+
+#: aarch64-opc.c:2479
+msgid "floating-point value must be 0.5 or 2.0"
+msgstr ""
+
+#: aarch64-opc.c:2489
+msgid "floating-point value must be 0.0 or 1.0"
+msgstr ""
+
+#: aarch64-opc.c:2520
+msgid "invalid replicated MOV immediate"
+msgstr ""
+
+#: aarch64-opc.c:2641
+msgid "extend operator expected"
+msgstr ""
+
+#: aarch64-opc.c:2654
+msgid "missing extend operator"
+msgstr ""
+
+#: aarch64-opc.c:2660
+msgid "'LSL' operator not allowed"
+msgstr ""
+
+#: aarch64-opc.c:2681
+msgid "W register expected"
+msgstr ""
+
+#: aarch64-opc.c:2692
+msgid "shift operator expected"
+msgstr ""
+
+#: aarch64-opc.c:2699
+msgid "'ROR' operator not allowed"
+msgstr ""
+
+#: aarch64-opc.c:3714
+msgid "reading from a write-only register"
+msgstr ""
+
+#: aarch64-opc.c:3716
+msgid "writing to a read-only register"
+msgstr ""
+
+#: aarch64-opc.c:4886
+msgid "instruction opens new dependency sequence without ending previous one"
+msgstr ""
+
+#: aarch64-opc.c:4906
+msgid "previous `movprfx' sequence not closed"
+msgstr ""
+
+#: aarch64-opc.c:4925
+msgid "SVE instruction expected after `movprfx'"
+msgstr ""
+
+#: aarch64-opc.c:4938
+msgid "SVE `movprfx' compatible instruction expected"
+msgstr ""
+
+#: aarch64-opc.c:5025
+msgid "predicated instruction expected after `movprfx'"
+msgstr ""
+
+#: aarch64-opc.c:5037
+msgid "merging predicate expected due to preceding `movprfx'"
+msgstr ""
+
+#: aarch64-opc.c:5049
+msgid "predicate register differs from that in preceding `movprfx'"
+msgstr ""
+
+#: aarch64-opc.c:5068
+msgid "output register of preceding `movprfx' not used in current instruction"
+msgstr ""
+
+#: aarch64-opc.c:5081
+msgid "output register of preceding `movprfx' expected as output"
+msgstr ""
+
+#: aarch64-opc.c:5093
+msgid "output register of preceding `movprfx' used as input"
+msgstr ""
+
+#: aarch64-opc.c:5109
+msgid "register size not compatible with previous `movprfx'"
+msgstr ""
+
+#: alpha-opc.c:154
 msgid "branch operand unaligned"
 msgstr ""
 
-#: alpha-opc.c:358 alpha-opc.c:380
-msgid "jump hint unaligned"
+#: alpha-opc.c:170 alpha-opc.c:186
+msgid "jump hint unaligned"
+msgstr ""
+
+#: arc-dis.c:379
+msgid ""
+"\n"
+"Warning: disassembly may be wrong due to guessed opcode class choice.\n"
+"Use -M<class[,class]> to select the correct opcode class(es).\n"
+"\t\t\t\t"
+msgstr ""
+
+#: arc-dis.c:440
+msgid "An error occured while generating the extension instruction operations"
+msgstr ""
+
+#: arc-dis.c:845
+#, c-format
+msgid "unrecognised disassembler CPU option: %s"
+msgstr ""
+
+#: arc-dis.c:1412
+#, c-format
+msgid ""
+"\n"
+"The following ARC specific disassembler options are supported for use \n"
+"with -M switch (multiple options should be separated by commas):\n"
+msgstr ""
+
+#: arc-dis.c:1424
+#, c-format
+msgid "  dsp             Recognize DSP instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1426
+#, c-format
+msgid "  spfp            Recognize FPX SP instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1428
+#, c-format
+msgid "  dpfp            Recognize FPX DP instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1430
+#, c-format
+msgid "  quarkse_em      Recognize FPU QuarkSE-EM instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1432
+#, c-format
+msgid "  fpuda           Recognize double assist FPU instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1434
+#, c-format
+msgid "  fpus            Recognize single precision FPU instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1436
+#, c-format
+msgid "  fpud            Recognize double precision FPU instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1438
+#, c-format
+msgid "  nps400          Recognize NPS400 instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1440
+#, c-format
+msgid "  hex             Use only hexadecimal number to print immediates.\n"
+msgstr ""
+
+#: arc-opc.c:41 arc-opc.c:64 arc-opc.c:90
+msgid "LP_COUNT register cannot be used as destination register"
+msgstr ""
+
+#: arc-opc.c:88
+msgid "cannot use odd number destination register"
+msgstr ""
+
+#: arc-opc.c:101
+msgid "cannot use odd number source register"
+msgstr ""
+
+#: arc-opc.c:114
+msgid "operand is not zero"
+msgstr ""
+
+#: arc-opc.c:173
+msgid "register R30 is a limm indicator"
+msgstr ""
+
+#: arc-opc.c:175
+msgid "register out of range"
+msgstr ""
+
+#: arc-opc.c:194
+msgid "register must be R0"
+msgstr ""
+
+#: arc-opc.c:212
+msgid "register must be R1"
+msgstr ""
+
+#: arc-opc.c:229
+msgid "register must be R2"
+msgstr ""
+
+#: arc-opc.c:246
+msgid "register must be R3"
+msgstr ""
+
+#: arc-opc.c:263
+msgid "register must be SP"
+msgstr ""
+
+#: arc-opc.c:280
+msgid "register must be GP"
+msgstr ""
+
+#: arc-opc.c:297
+msgid "register must be PCL"
+msgstr ""
+
+#: arc-opc.c:314
+msgid "register must be BLINK"
+msgstr ""
+
+#: arc-opc.c:331
+msgid "register must be ILINK1"
+msgstr ""
+
+#: arc-opc.c:348
+msgid "register must be ILINK2"
+msgstr ""
+
+#. ARC NPS400 Support: See comment near head of file.
+#: arc-opc.c:379 arc-opc.c:417 arc-opc.c:455 arc-opc.c:724
+msgid "register must be either r0-r3 or r12-r15"
+msgstr ""
+
+#: arc-opc.c:506
+msgid "accepted values are from -1 to 6"
+msgstr ""
+
+#: arc-opc.c:535
+msgid "first register of the range should be r13"
+msgstr ""
+
+#: arc-opc.c:537
+msgid "last register of the range doesn't fit"
+msgstr ""
+
+#: arc-opc.c:557 arc-opc.c:572
+msgid "invalid register number, should be fp"
+msgstr ""
+
+#: arc-opc.c:594
+msgid "invalid register number, should be blink"
+msgstr ""
+
+#: arc-opc.c:616
+msgid "invalid register number, should be pcl"
+msgstr ""
+
+#: arc-opc.c:772
+msgid "invalid size, should be 1, 2, 4, or 8"
+msgstr ""
+
+#: arc-opc.c:817
+msgid "invalid immediate, must be 1, 2, or 4"
+msgstr ""
+
+#: arc-opc.c:856
+msgid "invalid value for CMEM ld/st immediate"
+msgstr ""
+
+#: arc-opc.c:883
+msgid "invalid position, should be 0, 16, 32, 48 or 64."
+msgstr ""
+
+#: arc-opc.c:917
+msgid "invalid position, should be 16, 32, 64 or 128."
+msgstr ""
+
+#: arc-opc.c:939
+msgid "invalid size value must be on range 1-64."
+msgstr ""
+
+#: arc-opc.c:970
+msgid "invalid position, should be 0, 8, 16, or 24"
+msgstr ""
+
+#: arc-opc.c:995
+msgid "invalid size, value must be "
+msgstr ""
+
+#: arc-opc.c:1069
+msgid "value out of range 1 - 256"
+msgstr ""
+
+#: arc-opc.c:1078
+msgid "value must be power of 2"
+msgstr ""
+
+#: arc-opc.c:1131
+msgid "value must be in the range 0 to 28"
+msgstr ""
+
+#: arc-opc.c:1153
+msgid "value must be in the range 1 to "
+msgstr ""
+
+#: arc-opc.c:1183
+msgid "value must be in the range 0 to 240"
+msgstr ""
+
+#: arc-opc.c:1185
+msgid "value must be a multiple of 16"
+msgstr ""
+
+#: arc-opc.c:1205
+msgid "invalid address type for operand"
+msgstr ""
+
+#: arc-opc.c:1239
+msgid "value must be in the range 0 to 31"
+msgstr ""
+
+#: arc-opc.c:1264
+msgid "invalid position, should be one of: 0,4,8,...124."
+msgstr ""
+
+#: arm-dis.c:5184
+msgid "Select raw register names"
+msgstr ""
+
+#: arm-dis.c:5186
+msgid "Select register names used by GCC"
+msgstr ""
+
+#: arm-dis.c:5188
+msgid "Select register names used in ARM's ISA documentation"
+msgstr ""
+
+#: arm-dis.c:5190
+msgid "Assume all insns are Thumb insns"
+msgstr ""
+
+#: arm-dis.c:5191
+msgid "Examine preceding label to determine an insn's type"
+msgstr ""
+
+#: arm-dis.c:5192
+msgid "Select register names used in the APCS"
+msgstr ""
+
+#: arm-dis.c:5194
+msgid "Select register names used in the ATPCS"
+msgstr ""
+
+#: arm-dis.c:5196
+msgid "Select special register names used in the ATPCS"
+msgstr ""
+
+#: arm-dis.c:5198
+msgid "Enable CDE extensions for coprocessor N space"
+msgstr ""
+
+#: arm-dis.c:8367
+msgid "<illegal precision>"
+msgstr ""
+
+#: arm-dis.c:11607
+#, c-format
+msgid "unrecognised register name set: %s"
+msgstr ""
+
+#: arm-dis.c:11621
+#, c-format
+msgid "cde coprocessor not between 0-7: %s"
+msgstr ""
+
+#: arm-dis.c:11627
+#, c-format
+msgid "coproc must have an argument: %s"
+msgstr ""
+
+#: arm-dis.c:11640
+#, c-format
+msgid "coprocN argument takes options \"generic\", \"cde\", or \"CDE\": %s"
+msgstr ""
+
+#: arm-dis.c:12351
+#, c-format
+msgid ""
+"\n"
+"The following ARM specific disassembler options are supported for use with\n"
+"the -M switch:\n"
+msgstr ""
+
+#: avr-dis.c:115 avr-dis.c:136
+#, c-format
+msgid "undefined"
+msgstr ""
+
+#: avr-dis.c:218
+#, c-format
+msgid "internal disassembler error"
+msgstr ""
+
+#: avr-dis.c:272
+#, c-format
+msgid "unknown constraint `%c'"
+msgstr ""
+
+#: bpf-asm.c:97
+msgid "expected 16, 32 or 64 in"
+msgstr ""
+
+#: bpf-asm.c:181 epiphany-asm.c:456 fr30-asm.c:311 frv-asm.c:1264
+#: ip2k-asm.c:512 iq2000-asm.c:460 lm32-asm.c:350 m32c-asm.c:1585
+#: m32r-asm.c:329 mep-asm.c:1288 mt-asm.c:596 or1k-asm.c:571 xc16x-asm.c:377
+#: xstormy16-asm.c:277
+#, c-format
+msgid "internal error: unrecognized field %d while parsing"
+msgstr ""
+
+#: bpf-asm.c:233 epiphany-asm.c:508 fr30-asm.c:363 frv-asm.c:1316
+#: ip2k-asm.c:564 iq2000-asm.c:512 lm32-asm.c:402 m32c-asm.c:1637
+#: m32r-asm.c:381 mep-asm.c:1340 mt-asm.c:648 or1k-asm.c:623 xc16x-asm.c:429
+#: xstormy16-asm.c:329
+msgid "missing mnemonic in syntax string"
+msgstr ""
+
+#. We couldn't parse it.
+#: bpf-asm.c:368 bpf-asm.c:372 bpf-asm.c:461 bpf-asm.c:568 epiphany-asm.c:643
+#: epiphany-asm.c:647 epiphany-asm.c:736 epiphany-asm.c:843 fr30-asm.c:498
+#: fr30-asm.c:502 fr30-asm.c:591 fr30-asm.c:698 frv-asm.c:1451 frv-asm.c:1455
+#: frv-asm.c:1544 frv-asm.c:1651 ip2k-asm.c:699 ip2k-asm.c:703 ip2k-asm.c:792
+#: ip2k-asm.c:899 iq2000-asm.c:647 iq2000-asm.c:651 iq2000-asm.c:740
+#: iq2000-asm.c:847 lm32-asm.c:537 lm32-asm.c:541 lm32-asm.c:630 lm32-asm.c:737
+#: m32c-asm.c:1772 m32c-asm.c:1776 m32c-asm.c:1865 m32c-asm.c:1972
+#: m32r-asm.c:516 m32r-asm.c:520 m32r-asm.c:609 m32r-asm.c:716 mep-asm.c:1475
+#: mep-asm.c:1479 mep-asm.c:1568 mep-asm.c:1675 mt-asm.c:783 mt-asm.c:787
+#: mt-asm.c:876 mt-asm.c:983 or1k-asm.c:758 or1k-asm.c:762 or1k-asm.c:851
+#: or1k-asm.c:958 xc16x-asm.c:564 xc16x-asm.c:568 xc16x-asm.c:657
+#: xc16x-asm.c:764 xstormy16-asm.c:464 xstormy16-asm.c:468 xstormy16-asm.c:557
+#: xstormy16-asm.c:664
+msgid "unrecognized instruction"
+msgstr ""
+
+#: bpf-asm.c:415 epiphany-asm.c:690 fr30-asm.c:545 frv-asm.c:1498
+#: ip2k-asm.c:746 iq2000-asm.c:694 lm32-asm.c:584 m32c-asm.c:1819
+#: m32r-asm.c:563 mep-asm.c:1522 mt-asm.c:830 or1k-asm.c:805 xc16x-asm.c:611
+#: xstormy16-asm.c:511
+#, c-format
+msgid "syntax error (expected char `%c', found `%c')"
+msgstr ""
+
+#: bpf-asm.c:425 epiphany-asm.c:700 fr30-asm.c:555 frv-asm.c:1508
+#: ip2k-asm.c:756 iq2000-asm.c:704 lm32-asm.c:594 m32c-asm.c:1829
+#: m32r-asm.c:573 mep-asm.c:1532 mt-asm.c:840 or1k-asm.c:815 xc16x-asm.c:621
+#: xstormy16-asm.c:521
+#, c-format
+msgid "syntax error (expected char `%c', found end of instruction)"
+msgstr ""
+
+#: bpf-asm.c:455 epiphany-asm.c:730 fr30-asm.c:585 frv-asm.c:1538
+#: ip2k-asm.c:786 iq2000-asm.c:734 lm32-asm.c:624 m32c-asm.c:1859
+#: m32r-asm.c:603 mep-asm.c:1562 mt-asm.c:870 or1k-asm.c:845 xc16x-asm.c:651
+#: xstormy16-asm.c:551
+msgid "junk at end of line"
+msgstr ""
+
+#: bpf-asm.c:567 epiphany-asm.c:842 fr30-asm.c:697 frv-asm.c:1650
+#: ip2k-asm.c:898 iq2000-asm.c:846 lm32-asm.c:736 m32c-asm.c:1971
+#: m32r-asm.c:715 mep-asm.c:1674 mt-asm.c:982 or1k-asm.c:957 xc16x-asm.c:763
+#: xstormy16-asm.c:663
+msgid "unrecognized form of instruction"
+msgstr ""
+
+#: bpf-asm.c:581 epiphany-asm.c:856 fr30-asm.c:711 frv-asm.c:1664
+#: ip2k-asm.c:912 iq2000-asm.c:860 lm32-asm.c:750 m32c-asm.c:1985
+#: m32r-asm.c:729 mep-asm.c:1688 mt-asm.c:996 or1k-asm.c:971 xc16x-asm.c:777
+#: xstormy16-asm.c:677
+#, c-format
+msgid "bad instruction `%.50s...'"
+msgstr ""
+
+#: bpf-asm.c:584 epiphany-asm.c:859 fr30-asm.c:714 frv-asm.c:1667
+#: ip2k-asm.c:915 iq2000-asm.c:863 lm32-asm.c:753 m32c-asm.c:1988
+#: m32r-asm.c:732 mep-asm.c:1691 mt-asm.c:999 or1k-asm.c:974 xc16x-asm.c:780
+#: xstormy16-asm.c:680
+#, c-format
+msgid "bad instruction `%.50s'"
+msgstr ""
+
+#: bpf-desc.c:1661
+#, c-format
+msgid ""
+"internal error: bpf_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: bpf-desc.c:1744
+#, c-format
+msgid "internal error: bpf_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: bpf-desc.c:1763
+#, c-format
+msgid "internal error: bpf_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#. Default text to print if an instruction isn't recognized.
+#: bpf-dis.c:41 epiphany-dis.c:41 fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41
+#: iq2000-dis.c:41 lm32-dis.c:41 m32c-dis.c:41 m32r-dis.c:41 mep-dis.c:41
+#: mmix-dis.c:293 mt-dis.c:41 nds32-dis.c:64 or1k-dis.c:41 xc16x-dis.c:41
+#: xstormy16-dis.c:41
+msgid "*unknown*"
+msgstr ""
+
+#: bpf-dis.c:203 epiphany-dis.c:279 fr30-dis.c:300 frv-dis.c:397 ip2k-dis.c:289
+#: iq2000-dis.c:190 lm32-dis.c:148 m32c-dis.c:892 m32r-dis.c:280 mep-dis.c:1188
+#: mt-dis.c:291 or1k-dis.c:175 xc16x-dis.c:421 xstormy16-dis.c:169
+#, c-format
+msgid "internal error: unrecognized field %d while printing insn"
+msgstr ""
+
+#: bpf-ibld.c:164 epiphany-ibld.c:164 fr30-ibld.c:164 frv-ibld.c:164
+#: ip2k-ibld.c:164 iq2000-ibld.c:164 lm32-ibld.c:164 m32c-ibld.c:164
+#: m32r-ibld.c:164 mep-ibld.c:164 mt-ibld.c:164 or1k-ibld.c:164
+#: xc16x-ibld.c:164 xstormy16-ibld.c:164
+#, c-format
+msgid "operand out of range (%ld not between %ld and %lu)"
+msgstr ""
+
+#: bpf-ibld.c:185 epiphany-ibld.c:185 fr30-ibld.c:185 frv-ibld.c:185
+#: ip2k-ibld.c:185 iq2000-ibld.c:185 lm32-ibld.c:185 m32c-ibld.c:185
+#: m32r-ibld.c:185 mep-ibld.c:185 mt-ibld.c:185 or1k-ibld.c:185
+#: xc16x-ibld.c:185 xstormy16-ibld.c:185
+#, c-format
+msgid "operand out of range (0x%lx not between 0 and 0x%lx)"
+msgstr ""
+
+#: bpf-ibld.c:201 cgen-asm.c:351 epiphany-ibld.c:201 fr30-ibld.c:201
+#: frv-ibld.c:201 ip2k-ibld.c:201 iq2000-ibld.c:201 lm32-ibld.c:201
+#: m32c-ibld.c:201 m32r-ibld.c:201 mep-ibld.c:201 mt-ibld.c:201 or1k-ibld.c:201
+#: xc16x-ibld.c:201 xstormy16-ibld.c:201
+#, c-format
+msgid "operand out of range (%ld not between %ld and %ld)"
+msgstr ""
+
+#: bpf-ibld.c:628 epiphany-ibld.c:883 fr30-ibld.c:738 frv-ibld.c:864
+#: ip2k-ibld.c:615 iq2000-ibld.c:721 lm32-ibld.c:642 m32c-ibld.c:1739
+#: m32r-ibld.c:673 mep-ibld.c:1216 mt-ibld.c:757 or1k-ibld.c:736
+#: xc16x-ibld.c:760 xstormy16-ibld.c:686
+#, c-format
+msgid "internal error: unrecognized field %d while building insn"
+msgstr ""
+
+#: bpf-ibld.c:712 epiphany-ibld.c:1178 fr30-ibld.c:944 frv-ibld.c:1182
+#: ip2k-ibld.c:691 iq2000-ibld.c:897 lm32-ibld.c:747 m32c-ibld.c:2901
+#: m32r-ibld.c:811 mep-ibld.c:1816 mt-ibld.c:978 or1k-ibld.c:895
+#: xc16x-ibld.c:981 xstormy16-ibld.c:833
+#, c-format
+msgid "internal error: unrecognized field %d while decoding insn"
+msgstr ""
+
+#: bpf-ibld.c:781 epiphany-ibld.c:1322 fr30-ibld.c:1091 frv-ibld.c:1461
+#: ip2k-ibld.c:766 iq2000-ibld.c:1029 lm32-ibld.c:837 m32c-ibld.c:3519
+#: m32r-ibld.c:925 mep-ibld.c:2287 mt-ibld.c:1179 or1k-ibld.c:991
+#: xc16x-ibld.c:1203 xstormy16-ibld.c:944
+#, c-format
+msgid "internal error: unrecognized field %d while getting int operand"
+msgstr ""
+
+#: bpf-ibld.c:832 epiphany-ibld.c:1448 fr30-ibld.c:1220 frv-ibld.c:1722
+#: ip2k-ibld.c:823 iq2000-ibld.c:1143 lm32-ibld.c:909 m32c-ibld.c:4119
+#: m32r-ibld.c:1021 mep-ibld.c:2740 mt-ibld.c:1362 or1k-ibld.c:1069
+#: xc16x-ibld.c:1407 xstormy16-ibld.c:1037
+#, c-format
+msgid "internal error: unrecognized field %d while getting vma operand"
+msgstr ""
+
+#: bpf-ibld.c:890 epiphany-ibld.c:1581 fr30-ibld.c:1352 frv-ibld.c:1990
+#: ip2k-ibld.c:883 iq2000-ibld.c:1264 lm32-ibld.c:988 m32c-ibld.c:4707
+#: m32r-ibld.c:1123 mep-ibld.c:3154 mt-ibld.c:1552 or1k-ibld.c:1154
+#: xc16x-ibld.c:1612 xstormy16-ibld.c:1137
+#, c-format
+msgid "internal error: unrecognized field %d while setting int operand"
+msgstr ""
+
+#: bpf-ibld.c:938 epiphany-ibld.c:1704 fr30-ibld.c:1474 frv-ibld.c:2248
+#: ip2k-ibld.c:933 iq2000-ibld.c:1375 lm32-ibld.c:1057 m32c-ibld.c:5285
+#: m32r-ibld.c:1215 mep-ibld.c:3558 mt-ibld.c:1732 or1k-ibld.c:1229
+#: xc16x-ibld.c:1807 xstormy16-ibld.c:1227
+#, c-format
+msgid "internal error: unrecognized field %d while setting vma operand"
+msgstr ""
+
+#: cgen-asm.c:373
+#, c-format
+msgid "operand out of range (%lu not between %lu and %lu)"
+msgstr ""
+
+#: d30v-dis.c:232
+#, c-format
+msgid "illegal id (%d)"
+msgstr ""
+
+#: d30v-dis.c:259
+#, c-format
+msgid "<unknown register %d>"
+msgstr ""
+
+#. Can't happen.
+#: dis-buf.c:61
+#, c-format
+msgid "Unknown error %d\n"
+msgstr ""
+
+#: dis-buf.c:70
+#, c-format
+msgid "Address 0x%s is out of bounds.\n"
+msgstr ""
+
+#: disassemble.c:839
+#, c-format
+msgid "assertion fail %s:%d"
+msgstr ""
+
+#: disassemble.c:840
+msgid "Please report this bug"
+msgstr ""
+
+#: epiphany-asm.c:68
+msgid "register unavailable for short instructions"
+msgstr ""
+
+#: epiphany-asm.c:115
+msgid "register name used as immediate value"
+msgstr ""
+
+#. Don't treat "mov ip,ip" as a move-immediate.
+#: epiphany-asm.c:178 epiphany-asm.c:234
+msgid "register source in immediate move"
+msgstr ""
+
+#: epiphany-asm.c:187
+msgid "byte relocation unsupported"
+msgstr ""
+
+#. -- assembler routines inserted here.
+#. -- asm.c
+#: epiphany-asm.c:193 frv-asm.c:972 iq2000-asm.c:56 lm32-asm.c:95
+#: lm32-asm.c:127 lm32-asm.c:157 lm32-asm.c:187 lm32-asm.c:217 lm32-asm.c:247
+#: m32c-asm.c:140 m32c-asm.c:235 m32c-asm.c:276 m32c-asm.c:334 m32c-asm.c:355
+#: m32r-asm.c:53 mep-asm.c:241 mep-asm.c:259 mep-asm.c:274 mep-asm.c:289
+#: mep-asm.c:301 or1k-asm.c:54
+msgid "missing `)'"
+msgstr ""
+
+#: epiphany-asm.c:270
+msgid "ABORT: unknown operand"
+msgstr ""
+
+#: epiphany-asm.c:296
+msgid "Not a pc-relative address."
+msgstr ""
+
+#: epiphany-desc.c:2109
+#, c-format
+msgid ""
+"internal error: epiphany_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: epiphany-desc.c:2192
+#, c-format
+msgid "internal error: epiphany_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: epiphany-desc.c:2211
+#, c-format
+msgid "internal error: epiphany_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: fr30-asm.c:93 m32c-asm.c:872 m32c-asm.c:879
+msgid "Register number is not valid"
+msgstr ""
+
+#: fr30-asm.c:95
+msgid "Register must be between r0 and r7"
+msgstr ""
+
+#: fr30-asm.c:97
+msgid "Register must be between r8 and r15"
+msgstr ""
+
+#: fr30-asm.c:116 m32c-asm.c:910
+msgid "Register list is not valid"
+msgstr ""
+
+#: fr30-desc.c:1586
+#, c-format
+msgid ""
+"internal error: fr30_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: fr30-desc.c:1669
+#, c-format
+msgid "internal error: fr30_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: fr30-desc.c:1688
+#, c-format
+msgid "internal error: fr30_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: frv-asm.c:608
+msgid "missing `]'"
+msgstr ""
+
+#: frv-asm.c:611 frv-asm.c:621
+msgid "Special purpose register number is out of range"
+msgstr ""
+
+#: frv-asm.c:908
+msgid "Value of A operand must be 0 or 1"
+msgstr ""
+
+#: frv-asm.c:944
+msgid "register number must be even"
+msgstr ""
+
+#: frv-desc.c:6326
+#, c-format
+msgid ""
+"internal error: frv_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: frv-desc.c:6409
+#, c-format
+msgid "internal error: frv_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: frv-desc.c:6428
+#, c-format
+msgid "internal error: frv_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: frv-opc.c:459
+#, c-format
+msgid "internal error: bad vliw->next_slot value"
+msgstr ""
+
+#: frv-opc.c:769
+#, c-format
+msgid "internal error: bad major code"
+msgstr ""
+
+#: frv-opc.c:819
+#, c-format
+msgid "internal error: bad insn unit"
+msgstr ""
+
+#: h8300-dis.c:309
+#, c-format
+msgid "Hmmmm 0x%x"
+msgstr ""
+
+#: h8300-dis.c:617
+#, c-format
+msgid "Don't understand 0x%x \n"
+msgstr ""
+
+#: i386-dis.c:11091
+msgid "<internal disassembler error>"
+msgstr ""
+
+#: i386-dis.c:11389
+#, c-format
+msgid ""
+"\n"
+"The following i386/x86-64 specific disassembler options are supported for "
+"use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
+msgstr ""
+
+#: i386-dis.c:11393
+#, c-format
+msgid "  x86-64      Disassemble in 64bit mode\n"
+msgstr ""
+
+#: i386-dis.c:11394
+#, c-format
+msgid "  i386        Disassemble in 32bit mode\n"
+msgstr ""
+
+#: i386-dis.c:11395
+#, c-format
+msgid "  i8086       Disassemble in 16bit mode\n"
+msgstr ""
+
+#: i386-dis.c:11396
+#, c-format
+msgid "  att         Display instruction in AT&T syntax\n"
+msgstr ""
+
+#: i386-dis.c:11397
+#, c-format
+msgid "  intel       Display instruction in Intel syntax\n"
+msgstr ""
+
+#: i386-dis.c:11398
+#, c-format
+msgid ""
+"  att-mnemonic\n"
+"              Display instruction in AT&T mnemonic\n"
+msgstr ""
+
+#: i386-dis.c:11400
+#, c-format
+msgid ""
+"  intel-mnemonic\n"
+"              Display instruction in Intel mnemonic\n"
+msgstr ""
+
+#: i386-dis.c:11402
+#, c-format
+msgid "  addr64      Assume 64bit address size\n"
+msgstr ""
+
+#: i386-dis.c:11403
+#, c-format
+msgid "  addr32      Assume 32bit address size\n"
+msgstr ""
+
+#: i386-dis.c:11404
+#, c-format
+msgid "  addr16      Assume 16bit address size\n"
+msgstr ""
+
+#: i386-dis.c:11405
+#, c-format
+msgid "  data32      Assume 32bit data size\n"
+msgstr ""
+
+#: i386-dis.c:11406
+#, c-format
+msgid "  data16      Assume 16bit data size\n"
+msgstr ""
+
+#: i386-dis.c:11407
+#, c-format
+msgid "  suffix      Always display instruction suffix in AT&T syntax\n"
+msgstr ""
+
+#: i386-dis.c:11408
+#, c-format
+msgid "  amd64       Display instruction in AMD64 ISA\n"
+msgstr ""
+
+#: i386-dis.c:11409
+#, c-format
+msgid "  intel64     Display instruction in Intel64 ISA\n"
+msgstr ""
+
+#: i386-dis.c:11972
+msgid "64-bit address is disabled"
+msgstr ""
+
+#: i386-gen.c:792
+#, c-format
+msgid "%s: error: "
+msgstr ""
+
+#: i386-gen.c:959
+#, c-format
+msgid "%s: %d: unknown bitfield: %s\n"
+msgstr ""
+
+#: i386-gen.c:961
+#, c-format
+msgid "unknown bitfield: %s\n"
+msgstr ""
+
+#: i386-gen.c:1024
+#, c-format
+msgid "%s: %d: missing `)' in bitfield: %s\n"
+msgstr ""
+
+#: i386-gen.c:1125
+#, c-format
+msgid "unknown broadcast operand: %s\n"
+msgstr ""
+
+#: i386-gen.c:1776
+#, c-format
+msgid "can't find i386-reg.tbl for reading, errno = %s\n"
+msgstr ""
+
+#: i386-gen.c:1854
+#, c-format
+msgid "can't create i386-init.h, errno = %s\n"
+msgstr ""
+
+#: i386-gen.c:1944 ia64-gen.c:2829
+#, c-format
+msgid "unable to change directory to \"%s\", errno = %s\n"
+msgstr ""
+
+#: i386-gen.c:1958 i386-gen.c:1963
+#, c-format
+msgid "CpuMax != %d!\n"
+msgstr ""
+
+#: i386-gen.c:1967
+#, c-format
+msgid "%d unused bits in i386_cpu_flags.\n"
+msgstr ""
+
+#: i386-gen.c:1982
+#, c-format
+msgid "%d unused bits in i386_operand_type.\n"
+msgstr ""
+
+#: i386-gen.c:1996
+#, c-format
+msgid "can't create i386-tbl.h, errno = %s\n"
+msgstr ""
+
+#: ia64-gen.c:306
+#, c-format
+msgid "%s: Error: "
+msgstr ""
+
+#: ia64-gen.c:319
+#, c-format
+msgid "%s: Warning: "
+msgstr ""
+
+#: ia64-gen.c:505 ia64-gen.c:736
+#, c-format
+msgid "multiple note %s not handled\n"
+msgstr ""
+
+#: ia64-gen.c:616
+msgid "can't find ia64-ic.tbl for reading\n"
+msgstr ""
+
+#: ia64-gen.c:818
+#, c-format
+msgid "can't find %s for reading\n"
+msgstr ""
+
+#: ia64-gen.c:1050
+#, c-format
+msgid ""
+"most recent format '%s'\n"
+"appears more restrictive than '%s'\n"
+msgstr ""
+
+#: ia64-gen.c:1061
+#, c-format
+msgid "overlapping field %s->%s\n"
+msgstr ""
+
+#: ia64-gen.c:1258
+#, c-format
+msgid "overwriting note %d with note %d (IC:%s)\n"
+msgstr ""
+
+#: ia64-gen.c:1465
+#, c-format
+msgid "don't know how to specify %% dependency %s\n"
+msgstr ""
+
+#: ia64-gen.c:1487
+#, c-format
+msgid "Don't know how to specify # dependency %s\n"
+msgstr ""
+
+#: ia64-gen.c:1526
+#, c-format
+msgid "IC:%s [%s] has no terminals or sub-classes\n"
+msgstr ""
+
+#: ia64-gen.c:1529
+#, c-format
+msgid "IC:%s has no terminals or sub-classes\n"
+msgstr ""
+
+#: ia64-gen.c:1538
+#, c-format
+msgid "no insns mapped directly to terminal IC %s [%s]"
+msgstr ""
+
+#: ia64-gen.c:1541
+#, c-format
+msgid "no insns mapped directly to terminal IC %s\n"
+msgstr ""
+
+#: ia64-gen.c:1552
+#, c-format
+msgid "class %s is defined but not used\n"
+msgstr ""
+
+#: ia64-gen.c:1565
+#, c-format
+msgid "Warning: rsrc %s (%s) has no chks\n"
+msgstr ""
+
+#: ia64-gen.c:1568
+#, c-format
+msgid "Warning: rsrc %s (%s) has no chks or regs\n"
+msgstr ""
+
+#: ia64-gen.c:1572
+#, c-format
+msgid "rsrc %s (%s) has no regs\n"
+msgstr ""
+
+#: ia64-gen.c:2464
+#, c-format
+msgid "IC note %d in opcode %s (IC:%s) conflicts with resource %s note %d\n"
+msgstr ""
+
+#: ia64-gen.c:2492
+#, c-format
+msgid "IC note %d for opcode %s (IC:%s) conflicts with resource %s note %d\n"
+msgstr ""
+
+#: ia64-gen.c:2506
+#, c-format
+msgid "opcode %s has no class (ops %d %d %d)\n"
+msgstr ""
+
+#. We've been passed a w.  Return with an error message so that
+#. cgen will try the next parsing option.
+#: ip2k-asm.c:81
+msgid "W keyword invalid in FR operand slot."
+msgstr ""
+
+#. Invalid offset present.
+#: ip2k-asm.c:106
+msgid "offset(IP) is not a valid form"
+msgstr ""
+
+#. Found something there in front of (DP) but it's out
+#. of range.
+#: ip2k-asm.c:154
+msgid "(DP) offset out of range."
+msgstr ""
+
+#. Found something there in front of (SP) but it's out
+#. of range.
+#: ip2k-asm.c:195
+msgid "(SP) offset out of range."
+msgstr ""
+
+#: ip2k-asm.c:211
+msgid "illegal use of parentheses"
+msgstr ""
+
+#: ip2k-asm.c:218
+msgid "operand out of range (not between 1 and 255)"
+msgstr ""
+
+#. Something is very wrong. opindex has to be one of the above.
+#: ip2k-asm.c:242
+msgid "parse_addr16: invalid opindex."
+msgstr ""
+
+#: ip2k-asm.c:296
+msgid "Byte address required. - must be even."
+msgstr ""
+
+#: ip2k-asm.c:305
+msgid "cgen_parse_address returned a symbol. Literal required."
+msgstr ""
+
+#: ip2k-asm.c:360
+msgid "percent-operator operand is not a symbol"
+msgstr ""
+
+#: ip2k-asm.c:413
+msgid "Attempt to find bit index of 0"
+msgstr ""
+
+#: ip2k-desc.c:1015
+#, c-format
+msgid ""
+"internal error: ip2k_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: ip2k-desc.c:1098
+#, c-format
+msgid "internal error: ip2k_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: ip2k-desc.c:1117
+#, c-format
+msgid "internal error: ip2k_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: iq2000-asm.c:112 iq2000-asm.c:142
+msgid "immediate value cannot be register"
+msgstr ""
+
+#: iq2000-asm.c:123 iq2000-asm.c:153 lm32-asm.c:70
+msgid "immediate value out of range"
+msgstr ""
+
+#: iq2000-asm.c:182
+msgid "21-bit offset out of range"
+msgstr ""
+
+#: iq2000-desc.c:2020
+#, c-format
+msgid ""
+"internal error: iq2000_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: iq2000-desc.c:2103
+#, c-format
+msgid "internal error: iq2000_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: iq2000-desc.c:2122
+#, c-format
+msgid "internal error: iq2000_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: lm32-asm.c:166
+msgid "expecting gp relative address: gp(symbol)"
+msgstr ""
+
+#: lm32-asm.c:196
+msgid "expecting got relative address: got(symbol)"
+msgstr ""
+
+#: lm32-asm.c:226
+msgid "expecting got relative address: gotoffhi16(symbol)"
+msgstr ""
+
+#: lm32-asm.c:256
+msgid "expecting got relative address: gotofflo16(symbol)"
+msgstr ""
+
+#: lm32-desc.c:1002
+#, c-format
+msgid ""
+"internal error: lm32_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: lm32-desc.c:1085
+#, c-format
+msgid "internal error: lm32_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: lm32-desc.c:1104
+#, c-format
+msgid "internal error: lm32_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: m10200-dis.c:151 m10300-dis.c:574
+#, c-format
+msgid "unknown\t0x%04lx"
+msgstr ""
+
+#: m10200-dis.c:321
+#, c-format
+msgid "unknown\t0x%02lx"
+msgstr ""
+
+#: m32c-asm.c:117
+msgid "imm:6 immediate is out of range"
+msgstr ""
+
+#: m32c-asm.c:145
+#, c-format
+msgid "%dsp8() takes a symbolic address, not a number"
+msgstr ""
+
+#: m32c-asm.c:159 m32c-asm.c:163 m32c-asm.c:253
+msgid "dsp:8 immediate is out of range"
+msgstr ""
+
+#: m32c-asm.c:184 m32c-asm.c:188
+msgid "Immediate is out of range -8 to 7"
+msgstr ""
+
+#: m32c-asm.c:209 m32c-asm.c:213
+msgid "Immediate is out of range -7 to 8"
+msgstr ""
+
+#: m32c-asm.c:281
+#, c-format
+msgid "%dsp16() takes a symbolic address, not a number"
+msgstr ""
+
+#: m32c-asm.c:305 m32c-asm.c:312 m32c-asm.c:373
+msgid "dsp:16 immediate is out of range"
+msgstr ""
+
+#: m32c-asm.c:399
+msgid "dsp:20 immediate is out of range"
+msgstr ""
+
+#: m32c-asm.c:425 m32c-asm.c:445
+msgid "dsp:24 immediate is out of range"
+msgstr ""
+
+#: m32c-asm.c:478
+msgid "immediate is out of range 1-2"
+msgstr ""
+
+#: m32c-asm.c:496
+msgid "immediate is out of range 1-8"
+msgstr ""
+
+#: m32c-asm.c:514
+msgid "immediate is out of range 0-7"
+msgstr ""
+
+#: m32c-asm.c:550
+msgid "immediate is out of range 2-9"
+msgstr ""
+
+#: m32c-asm.c:568
+msgid "Bit number for indexing general register is out of range 0-15"
+msgstr ""
+
+#: m32c-asm.c:606 m32c-asm.c:662
+msgid "bit,base is out of range"
+msgstr ""
+
+#: m32c-asm.c:613 m32c-asm.c:618 m32c-asm.c:666
+msgid "bit,base out of range for symbol"
+msgstr ""
+
+#: m32c-asm.c:802
+msgid "not a valid r0l/r0h pair"
+msgstr ""
+
+#: m32c-asm.c:832
+msgid "Invalid size specifier"
+msgstr ""
+
+#: m32c-desc.c:63033
+#, c-format
+msgid ""
+"internal error: m32c_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: m32c-desc.c:63116
+#, c-format
+msgid "internal error: m32c_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: m32c-desc.c:63135
+#, c-format
+msgid "internal error: m32c_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: m32r-desc.c:1365
+#, c-format
+msgid ""
+"internal error: m32r_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: m32r-desc.c:1448
+#, c-format
+msgid "internal error: m32r_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: m32r-desc.c:1467
+#, c-format
+msgid "internal error: m32r_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: m68k-dis.c:1294
+#, c-format
+msgid "<function code %d>"
+msgstr ""
+
+#: m68k-dis.c:1457
+#, c-format
+msgid "<internal error in opcode table: %s %s>\n"
+msgstr ""
+
+#: mep-asm.c:129
+msgid "Only $tp or $13 allowed for this opcode"
+msgstr ""
+
+#: mep-asm.c:143
+msgid "Only $sp or $15 allowed for this opcode"
+msgstr ""
+
+#: mep-asm.c:308 mep-asm.c:504
+#, c-format
+msgid "invalid %function() here"
+msgstr ""
+
+#: mep-asm.c:336
+msgid "Immediate is out of range -32768 to 32767"
+msgstr ""
+
+#: mep-asm.c:356
+msgid "Immediate is out of range 0 to 65535"
+msgstr ""
+
+#: mep-asm.c:549 mep-asm.c:562
+msgid "Immediate is out of range -512 to 511"
+msgstr ""
+
+#: mep-asm.c:554 mep-asm.c:563
+msgid "Immediate is out of range -128 to 127"
+msgstr ""
+
+#: mep-asm.c:558
+msgid "Value is not aligned enough"
+msgstr ""
+
+#: mep-desc.c:6226
+#, c-format
+msgid ""
+"internal error: mep_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: mep-desc.c:6309
+#, c-format
+msgid "internal error: mep_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: mep-desc.c:6328
+#, c-format
+msgid "internal error: mep_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: mips-dis.c:1805 mips-dis.c:2031
+#, c-format
+msgid "# internal error, undefined operand in `%s %s'"
+msgstr ""
+
+#: mips-dis.c:2620
+msgid "Use canonical instruction forms.\n"
+msgstr ""
+
+#: mips-dis.c:2622
+msgid "Recognize MSA instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2624
+msgid "Recognize the virtualization ASE instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2626
+msgid ""
+"Recognize the eXtended Physical Address (XPA) ASE\n"
+"                  instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2629
+msgid "Recognize the Global INValidate (GINV) ASE instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2633
+msgid ""
+"Recognize the Loongson MultiMedia extensions Instructions (MMI) ASE "
+"instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2637
+msgid "Recognize the Loongson Content Address Memory (CAM)  instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2641
+msgid "Recognize the Loongson EXTensions (EXT)  instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2645
+msgid "Recognize the Loongson EXTensions R2 (EXT2)  instructions.\n"
+msgstr ""
+
+#: mips-dis.c:2648
+msgid ""
+"Print GPR names according to specified ABI.\n"
+"                  Default: based on binary being disassembled.\n"
+msgstr ""
+
+#: mips-dis.c:2651
+msgid ""
+"Print FPR names according to specified ABI.\n"
+"                  Default: numeric.\n"
+msgstr ""
+
+#: mips-dis.c:2654
+msgid ""
+"Print CP0 register names according to specified architecture.\n"
+"                  Default: based on binary being disassembled.\n"
+msgstr ""
+
+#: mips-dis.c:2658
+msgid ""
+"Print HWR names according to specified architecture.\n"
+"                  Default: based on binary being disassembled.\n"
+msgstr ""
+
+#: mips-dis.c:2661
+msgid "Print GPR and FPR names according to specified ABI.\n"
 msgstr ""
 
-#. Default text to print if an instruction isn't recognized.
-#: arc-dis.c:232 fr30-dis.c:39 m32r-dis.c:39
-msgid "*unknown*"
+#: mips-dis.c:2663
+msgid ""
+"Print CP0 register and HWR names according to specified\n"
+"                  architecture."
 msgstr ""
 
-#: arc-opc.c:629
-msgid "unable to fit different valued constants into instruction"
+#: mips-dis.c:2749
+#, c-format
+msgid ""
+"\n"
+"The following MIPS specific disassembler options are supported for use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
+"\n"
 msgstr ""
 
-#: arc-opc.c:639
-msgid "auxiliary register not allowed here"
+#: mips-dis.c:2783
+#, c-format
+msgid ""
+"\n"
+"  For the options above, the following values are supported for \"%s\":\n"
+"   "
 msgstr ""
 
-#: arc-opc.c:652
+#: mmix-dis.c:33
 #, c-format
-msgid "invalid register number `%d'"
+msgid "bad case %d (%s) in %s:%d"
 msgstr ""
 
-#: arc-opc.c:775
+#: mmix-dis.c:42
 #, c-format
-msgid "value won't fit in range %ld - %ld"
+msgid "internal: non-debugged code (test-case missing): %s:%d"
 msgstr ""
 
-#: arc-opc.c:871
-msgid "branch address not on 4 byte boundary"
+#: mmix-dis.c:52
+msgid "(unknown)"
 msgstr ""
 
-#: arm-dis.c:489
-msgid "<illegal precision>"
+#: mmix-dis.c:247 mmix-dis.c:255
+msgid "*illegal*"
 msgstr ""
 
-#: arm-dis.c:904
+#: mmix-dis.c:529
 #, c-format
-msgid "Unrecognised register name set: %s\n"
+msgid "*unknown operands type: %d*"
 msgstr ""
 
-#: arm-dis.c:911
+#: msp430-decode.opc:145 rl78-decode.opc:106
 #, c-format
-msgid "Unrecognised disassembler option: %s\n"
+msgid "internal error: immediate() called with invalid byte count %d"
 msgstr ""
 
-#: arm-dis.c:1083
-msgid ""
-"\n"
-"The following ARM specific disassembler options are supported for use with\n"
-"the -M switch:\n"
+#: msp430-dis.c:59
+#, c-format
+msgid "Warning: disassembly unreliable - not enough bytes available"
 msgstr ""
 
-#: avr-dis.c:118 avr-dis.c:128
-msgid "undefined"
+#: msp430-dis.c:65
+#, c-format
+msgid "Error: read from memory failed"
+msgstr ""
+
+#: msp430-dis.c:499
+msgid "Warning: illegal as emulation instr"
+msgstr ""
+
+#. R2/R3 are illegal as dest: may be data section.
+#: msp430-dis.c:591
+msgid "Warning: illegal as 2-op instr"
 msgstr ""
 
-#: avr-dis.c:180
-msgid "Internal disassembler error"
+#: msp430-dis.c:1002
+msgid "Warning: unrecognised CALLA addressing mode"
 msgstr ""
 
-#: avr-dis.c:228
+#: msp430-dis.c:1303 msp430-dis.c:1324 msp430-dis.c:1345
 #, c-format
-msgid "unknown constraint `%c'"
+msgid "Warning: reserved use of A/L and B/W bits detected"
+msgstr ""
+
+#: mt-asm.c:110 mt-asm.c:190
+msgid "Operand out of range. Must be between -32768 and 32767."
+msgstr ""
+
+#: mt-asm.c:149
+msgid "Biiiig Trouble in parse_imm16!"
+msgstr ""
+
+#: mt-asm.c:157
+msgid "The percent-operator's operand is not a symbol"
 msgstr ""
 
-#: cgen-asm.c:224
-msgid "unrecognized keyword/register name"
+#: mt-asm.c:395
+msgid "invalid operand.  type may have values 0,1,2 only."
 msgstr ""
 
-#: cgen-asm.c:332 fr30-ibld.c:232 m32r-ibld.c:232
+#: mt-desc.c:1146
 #, c-format
-msgid "operand out of range (%ld not between %ld and %ld)"
+msgid ""
+"internal error: mt_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
 msgstr ""
 
-#: cgen-asm.c:353
+#: mt-desc.c:1229
 #, c-format
-msgid "operand out of range (%lu not between %lu and %lu)"
+msgid "internal error: mt_cgen_cpu_open: unsupported argument `%d'"
 msgstr ""
 
-#: d30v-dis.c:306
+#: mt-desc.c:1248
 #, c-format
-msgid "<unknown register %d>"
+msgid "internal error: mt_cgen_cpu_open: no endianness specified"
 msgstr ""
 
-#. Can't happen.
-#: dis-buf.c:56
+#: nds32-asm.c:1760
 #, c-format
-msgid "Unknown error %d\n"
+msgid "internal error: unknown operand, %s"
 msgstr ""
 
-#: dis-buf.c:61
+#: nds32-asm.c:2396
 #, c-format
-msgid "Address 0x%x is out of bounds.\n"
+msgid "internal error: don't know how to handle parsing results"
 msgstr ""
 
-#: fr30-asm.c:305 m32r-asm.c:313
+#: nds32-asm.c:2404
 #, c-format
-msgid "Unrecognized field %d while parsing.\n"
+msgid "internal error: unknown hardware resource"
 msgstr ""
 
-#. We couldn't parse it.
-#: fr30-asm.c:369 fr30-asm.c:373 fr30-asm.c:449 m32r-asm.c:377 m32r-asm.c:381
-#: m32r-asm.c:457
-msgid "unrecognized instruction"
+#: nds32-dis.c:1186
+msgid "insufficient data to decode instruction"
 msgstr ""
 
-#: fr30-asm.c:415 m32r-asm.c:423
-#, c-format
-msgid "syntax error (expected char `%c', found `%c')"
+#: nfp-dis.c:927
+msgid "<invalid_instruction>:"
 msgstr ""
 
-#: fr30-asm.c:443 m32r-asm.c:451
-msgid "junk at end of line"
+#: nfp-dis.c:1331
+msgid ", <invalid CRC operator>, "
 msgstr ""
 
-#: fr30-asm.c:551 m32r-asm.c:559
+#: nfp-dis.c:1683
+msgid "<invalid branch>["
+msgstr ""
+
+#: nfp-dis.c:2052 nfp-dis.c:2323
 #, c-format
-msgid "bad instruction `%.50s...'"
+msgid "<invalid cmd target %d:%d:%d>[]"
 msgstr ""
 
-#: fr30-asm.c:554 m32r-asm.c:562
+#: nfp-dis.c:2063 nfp-dis.c:2334
 #, c-format
-msgid "bad instruction `%.50s'"
+msgid "<invalid cmd action %d:%d:%d>[]"
 msgstr ""
 
-#: fr30-dis.c:300 m32r-dis.c:239
+#: nfp-dis.c:2555
+msgid "File has no ME-Config section."
+msgstr ""
+
+#: nfp-dis.c:2569
+msgid "File has invalid ME-Config section."
+msgstr ""
+
+#: nfp-dis.c:2711
 #, c-format
-msgid "Unrecognized field %d while printing insn.\n"
+msgid "Error processing section %u "
 msgstr ""
 
-#: fr30-ibld.c:216 m32r-ibld.c:216
+#: nfp-dis.c:2740
 #, c-format
-msgid "operand out of range (%lu not between 0 and %lu)"
+msgid "Invalid NFP option: %s"
 msgstr ""
 
-#: fr30-ibld.c:790 m32r-ibld.c:719
+#: nfp-dis.c:2972
 #, c-format
-msgid "Unrecognized field %d while building insn.\n"
+msgid ""
+"\n"
+"The following NFP specific disassembler options are supported for use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
 msgstr ""
 
-#: fr30-ibld.c:994 m32r-ibld.c:849
+#: nfp-dis.c:2976
 #, c-format
-msgid "Unrecognized field %d while decoding insn.\n"
+msgid ""
+"\n"
+"  no-pc\t\t    Don't print program counter prefix.\n"
+"  ctx4\t\t    Force disassembly using 4-context mode.\n"
+"  ctx8\t\t    Force 8-context mode, takes precedence."
 msgstr ""
 
-#: fr30-ibld.c:1138 m32r-ibld.c:954
+#: nios2-dis.c:135
 #, c-format
-msgid "Unrecognized field %d while getting int operand.\n"
+msgid "out of memory"
 msgstr ""
 
-#: fr30-ibld.c:1267 m32r-ibld.c:1044
+#: nios2-dis.c:263
 #, c-format
-msgid "Unrecognized field %d while getting vma operand.\n"
+msgid "internal error: broken opcode descriptor for `%s %s'"
 msgstr ""
 
-#: fr30-ibld.c:1396 m32r-ibld.c:1137
+#. I and Z are output operands and can`t be immediate
+#. A is an address and we can`t have the address of
+#. an immediate either. We don't know how much to increase
+#. aoffsetp by since whatever generated this is broken
+#. anyway!
+#: ns32k-dis.c:535
 #, c-format
-msgid "Unrecognized field %d while setting int operand.\n"
+msgid "$<undefined>"
+msgstr ""
+
+#: or1k-asm.c:55
+msgid "relocation invalid for store"
 msgstr ""
 
-#: fr30-ibld.c:1518 m32r-ibld.c:1223
+#: or1k-asm.c:56
+msgid "internal relocation type invalid"
+msgstr ""
+
+#: or1k-desc.c:2040
 #, c-format
-msgid "Unrecognized field %d while setting vma operand.\n"
+msgid ""
+"internal error: or1k_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
 msgstr ""
 
-#: h8300-dis.c:380
+#: or1k-desc.c:2123
 #, c-format
-msgid "Hmmmm %x"
+msgid "internal error: or1k_cgen_cpu_open: unsupported argument `%d'"
 msgstr ""
 
-#: h8300-dis.c:391
+#: or1k-desc.c:2142
 #, c-format
-msgid "Don't understand %x \n"
+msgid "internal error: or1k_cgen_cpu_open: no endianness specified"
 msgstr ""
 
-#: h8500-dis.c:141
+#: ppc-dis.c:381
 #, c-format
-msgid "can't cope with insert %d\n"
+msgid "warning: ignoring unknown -M%s option"
 msgstr ""
 
-#. Couldn't understand anything.
-#: h8500-dis.c:348
+#: ppc-dis.c:972
 #, c-format
-msgid "%02x\t\t*unknown*"
+msgid ""
+"\n"
+"The following PPC specific disassembler options are supported for use with\n"
+"the -M switch:\n"
 msgstr ""
 
-#: i386-dis.c:2624
-msgid "<internal disassembler error>"
+#: ppc-opc.c:51 ppc-opc.c:74 ppc-opc.c:100 ppc-opc.c:130
+msgid "invalid register"
+msgstr ""
+
+#: ppc-opc.c:396
+msgid "invalid conditional option"
+msgstr ""
+
+#: ppc-opc.c:399
+msgid "invalid counter access"
+msgstr ""
+
+#: ppc-opc.c:463
+msgid "BO value implies no branch hint, when using + or - modifier"
+msgstr ""
+
+#: ppc-opc.c:468
+msgid "attempt to set y bit when using + or - modifier"
+msgstr ""
+
+#: ppc-opc.c:470
+msgid "attempt to set 'at' bits when using + or - modifier"
+msgstr ""
+
+#: ppc-opc.c:677
+msgid "invalid R operand"
+msgstr ""
+
+#: ppc-opc.c:732
+msgid "invalid mask field"
+msgstr ""
+
+#: ppc-opc.c:755
+msgid "invalid mfcr mask"
+msgstr ""
+
+#: ppc-opc.c:873 ppc-opc.c:891
+msgid "illegal L operand value"
+msgstr ""
+
+#: ppc-opc.c:914
+msgid "illegal WC operand value"
+msgstr ""
+
+#: ppc-opc.c:1011
+msgid "incompatible L operand value"
+msgstr ""
+
+#: ppc-opc.c:1051 ppc-opc.c:1086
+msgid "illegal bitmask"
+msgstr ""
+
+#: ppc-opc.c:1173
+msgid "address register in load range"
+msgstr ""
+
+#: ppc-opc.c:1213
+msgid "illegal PL operand value"
+msgstr ""
+
+#: ppc-opc.c:1274
+msgid "index register in load range"
+msgstr ""
+
+#: ppc-opc.c:1303 ppc-opc.c:1389
+msgid "source and target register operands must be different"
+msgstr ""
+
+#: ppc-opc.c:1334
+msgid "invalid register operand when updating"
+msgstr ""
+
+#: ppc-opc.c:1452
+msgid "illegal immediate value"
+msgstr ""
+
+#: ppc-opc.c:1557
+msgid "invalid bat number"
+msgstr ""
+
+#: ppc-opc.c:1592
+msgid "invalid sprg number"
+msgstr ""
+
+#: ppc-opc.c:1629
+msgid "invalid tbr number"
+msgstr ""
+
+#: ppc-opc.c:1715 ppc-opc.c:1761
+msgid "VSR overlaps ACC operand"
+msgstr ""
+
+#: ppc-opc.c:1868
+msgid "invalid constant"
+msgstr ""
+
+#: ppc-opc.c:1970 ppc-opc.c:1993 ppc-opc.c:2016 ppc-opc.c:2039
+msgid "UIMM = 00000 is illegal"
+msgstr ""
+
+#: ppc-opc.c:2062
+msgid "UIMM values >7 are illegal"
+msgstr ""
+
+#: ppc-opc.c:2085
+msgid "UIMM values >15 are illegal"
+msgstr ""
+
+#: ppc-opc.c:2108
+msgid "GPR odd is illegal"
+msgstr ""
+
+#: ppc-opc.c:2131 ppc-opc.c:2154
+msgid "invalid offset"
 msgstr ""
 
-#: m10200-dis.c:199
+#: ppc-opc.c:2177
+msgid "invalid Ddd value"
+msgstr ""
+
+#. The option without '=' should be defined above.
+#: riscv-dis.c:84 riscv-dis.c:108
 #, c-format
-msgid "unknown\t0x%02x"
+msgid "unrecognized disassembler option: %s"
 msgstr ""
 
-#: m10200-dis.c:339
+#. Invalid options with '=', no option name before '=',
+#. and no value after '='.
+#: riscv-dis.c:92
 #, c-format
-msgid "unknown\t0x%04lx"
+msgid "unrecognized disassembler option with '=': %s"
 msgstr ""
 
-#: m10300-dis.c:685
+#: riscv-dis.c:102
 #, c-format
-msgid "unknown\t0x%04x"
+msgid "unknown privilege spec set by %s=%s"
 msgstr ""
 
-#: m68k-dis.c:412
+#: riscv-dis.c:402
 #, c-format
-msgid "<internal error in opcode table: %s %s>\n"
+msgid "# internal error, undefined modifier (%c)"
 msgstr ""
 
-#: m68k-dis.c:990
+#: riscv-dis.c:601
 #, c-format
-msgid "<function code %d>"
+msgid ""
+"\n"
+"The following RISC-V-specific disassembler options are supported for use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
 msgstr ""
 
-#: m88k-dis.c:274
+#: riscv-dis.c:605
 #, c-format
-msgid "# <dis error: %08x>"
+msgid ""
+"\n"
+"  numeric         Print numeric register names, rather than ABI names.\n"
 msgstr ""
 
-#: mips-dis.c:273
+#: riscv-dis.c:608
 #, c-format
-msgid "# internal error, undefined modifier(%c)"
+msgid ""
+"\n"
+"  no-aliases      Disassemble only into canonical instructions, rather\n"
+"                  than into pseudoinstructions.\n"
 msgstr ""
 
-#. I and Z are output operands and can`t be immediate
-#. * A is an address and we can`t have the address of
-#. * an immediate either. We don't know how much to increase
-#. * aoffsetp by since whatever generated this is broken
-#. * anyway!
-#.
-#: ns32k-dis.c:618
-msgid "$<undefined>"
+#: riscv-dis.c:612
+#, c-format
+msgid ""
+"\n"
+"  priv-spec=PRIV  Print the CSR according to the chosen privilege spec\n"
+"                  (1.9, 1.9.1, 1.10, 1.11).\n"
 msgstr ""
 
-#: ppc-opc.c:619 ppc-opc.c:650
-msgid "invalid conditional option"
+#: rx-dis.c:139 rx-dis.c:163 rx-dis.c:171 rx-dis.c:179 rx-dis.c:187
+msgid "<invalid register number>"
 msgstr ""
 
-#: ppc-opc.c:652
-msgid "attempt to set y bit when using + or - modifier"
+#: rx-dis.c:147 rx-dis.c:195
+msgid "<invalid condition code>"
 msgstr ""
 
-#: ppc-opc.c:707
-msgid "ignoring least significant bits in branch offset"
+#: rx-dis.c:155
+msgid "<invalid flag>"
 msgstr ""
 
-#: ppc-opc.c:742 ppc-opc.c:779
-msgid "illegal bitmask"
+#: rx-dis.c:203
+msgid "<invalid opsize>"
 msgstr ""
 
-#: ppc-opc.c:848
-msgid "value out of range"
+#: rx-dis.c:211
+msgid "<invalid size>"
 msgstr ""
 
-#: ppc-opc.c:922
-msgid "index register in load range"
+#: s12z-dis.c:251 s12z-dis.c:308 s12z-dis.c:319
+msgid "<illegal reg num>"
 msgstr ""
 
-#: ppc-opc.c:937
-msgid "invalid register operand when updating"
+#: s12z-dis.c:382
+msgid "<bad>"
 msgstr ""
 
-#. Mark as non-valid instruction
-#: sparc-dis.c:748
-msgid "unknown"
+#: s12z-dis.c:392
+msgid ".<bad>"
+msgstr ""
+
+#: s390-dis.c:42
+msgid "Disassemble in ESA architecture mode"
 msgstr ""
 
-#: sparc-dis.c:823
+#: s390-dis.c:43
+msgid "Disassemble in z/Architecture mode"
+msgstr ""
+
+#: s390-dis.c:44
+msgid "Print unknown instructions according to length from first two bits"
+msgstr ""
+
+#: s390-dis.c:76
 #, c-format
-msgid "Internal error:  bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
+msgid "unknown S/390 disassembler option: %s"
+msgstr ""
+
+#: s390-dis.c:416
+#, c-format
+msgid ""
+"\n"
+"The following S/390 specific disassembler options are supported for use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
+msgstr ""
+
+#: score-dis.c:661 score-dis.c:879 score-dis.c:1040 score-dis.c:1146
+#: score-dis.c:1154 score-dis.c:1161 score7-dis.c:695 score7-dis.c:858
+msgid "<illegal instruction>"
 msgstr ""
 
-#: sparc-dis.c:834
+#: sparc-dis.c:308 sparc-dis.c:318
 #, c-format
-msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
+msgid "internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
 msgstr ""
 
-#: sparc-dis.c:883
+#: sparc-dis.c:377
 #, c-format
-msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
+msgid "internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
+msgstr ""
+
+#. Mark as non-valid instruction.
+#: sparc-dis.c:1095
+msgid "unknown"
+msgstr ""
+
+#: v850-dis.c:190
+msgid "<invalid s-reg number>"
+msgstr ""
+
+#: v850-dis.c:206
+msgid "<invalid reg number>"
+msgstr ""
+
+#: v850-dis.c:222
+msgid "<invalid v-reg number>"
+msgstr ""
+
+#: v850-dis.c:236
+msgid "<invalid CC-reg number>"
+msgstr ""
+
+#: v850-dis.c:250
+msgid "<invalid float-CC-reg number>"
 msgstr ""
 
-#: v850-dis.c:221
+#: v850-dis.c:264
+msgid "<invalid cacheop number>"
+msgstr ""
+
+#: v850-dis.c:275
+msgid "<invalid prefop number>"
+msgstr ""
+
+#: v850-dis.c:510
 #, c-format
-msgid "unknown operand shift: %x\n"
+msgid "unknown operand shift: %x"
 msgstr ""
 
-#: v850-dis.c:233
+#: v850-dis.c:526
 #, c-format
-msgid "unknown pop reg: %d\n"
+msgid "unknown reg: %d"
 msgstr ""
 
 #. The functions used to insert and extract complicated operands.
@@ -316,46 +2205,180 @@ msgstr ""
 #. v850_insert_operand() in gas/config/tc-v850.c.  Error messages
 #. containing the string 'out of range' will be ignored unless a
 #. specific command line option is given to GAS.
-#: v850-opc.c:46
+#: v850-opc.c:53
 msgid "displacement value is not in range and is not aligned"
 msgstr ""
 
-#: v850-opc.c:47
+#: v850-opc.c:54
 msgid "displacement value is out of range"
 msgstr ""
 
-#: v850-opc.c:48
+#: v850-opc.c:55
 msgid "displacement value is not aligned"
 msgstr ""
 
-#: v850-opc.c:50
+#: v850-opc.c:57
 msgid "immediate value is out of range"
 msgstr ""
 
-#: v850-opc.c:61
-msgid "branch value not in range and to odd offset"
+#: v850-opc.c:58
+msgid "branch value out of range"
 msgstr ""
 
-#: v850-opc.c:63 v850-opc.c:95
-msgid "branch value out of range"
+#: v850-opc.c:59
+msgid "branch value not in range and to odd offset"
 msgstr ""
 
-#: v850-opc.c:66 v850-opc.c:98
+#: v850-opc.c:60
 msgid "branch to odd offset"
 msgstr ""
 
-#: v850-opc.c:93
-msgid "branch value not in range and to an odd offset"
+#: v850-opc.c:61
+msgid "position value is out of range"
+msgstr ""
+
+#: v850-opc.c:62
+msgid "width value is out of range"
+msgstr ""
+
+#: v850-opc.c:63
+msgid "SelID is out of range"
+msgstr ""
+
+#: v850-opc.c:64
+msgid "vector8 is out of range"
 msgstr ""
 
-#: v850-opc.c:321
+#: v850-opc.c:65
+msgid "vector5 is out of range"
+msgstr ""
+
+#: v850-opc.c:66
+msgid "imm10 is out of range"
+msgstr ""
+
+#: v850-opc.c:67
+msgid "SR/SelID is out of range"
+msgstr ""
+
+#: v850-opc.c:512
 msgid "invalid register for stack adjustment"
 msgstr ""
 
-#: v850-opc.c:343
-msgid "immediate value not in range and not even"
+#: v850-opc.c:532
+msgid "invalid register name"
+msgstr ""
+
+#: wasm32-dis.c:88
+msgid "Disassemble \"register\" names"
+msgstr ""
+
+#: wasm32-dis.c:89
+msgid "Name well-known globals"
+msgstr ""
+
+#: wasm32-dis.c:537
+#, c-format
+msgid ""
+"The following WebAssembly-specific disassembler options are supported for "
+"use\n"
+"with the -M switch:\n"
+msgstr ""
+
+#: xc16x-asm.c:66
+msgid "Missing '#' prefix"
+msgstr ""
+
+#: xc16x-asm.c:82
+msgid "Missing '.' prefix"
+msgstr ""
+
+#: xc16x-asm.c:98
+msgid "Missing 'pof:' prefix"
+msgstr ""
+
+#: xc16x-asm.c:114
+msgid "Missing 'pag:' prefix"
+msgstr ""
+
+#: xc16x-asm.c:130
+msgid "Missing 'sof:' prefix"
+msgstr ""
+
+#: xc16x-asm.c:146
+msgid "Missing 'seg:' prefix"
+msgstr ""
+
+#: xc16x-desc.c:3349
+#, c-format
+msgid ""
+"internal error: xc16x_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: xc16x-desc.c:3432
+#, c-format
+msgid "internal error: xc16x_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: xc16x-desc.c:3451
+#, c-format
+msgid "internal error: xc16x_cgen_cpu_open: no endianness specified"
+msgstr ""
+
+#: xstormy16-asm.c:71
+msgid "Bad register in preincrement"
+msgstr ""
+
+#: xstormy16-asm.c:76
+msgid "Bad register in postincrement"
+msgstr ""
+
+#: xstormy16-asm.c:78
+msgid "Bad register name"
+msgstr ""
+
+#: xstormy16-asm.c:82
+msgid "Label conflicts with register name"
+msgstr ""
+
+#: xstormy16-asm.c:86
+msgid "Label conflicts with `Rx'"
+msgstr ""
+
+#: xstormy16-asm.c:88
+msgid "Bad immediate expression"
 msgstr ""
 
-#: v850-opc.c:348
-msgid "immediate value must be even"
+#: xstormy16-asm.c:109
+msgid "No relocation for small immediate"
+msgstr ""
+
+#: xstormy16-asm.c:119
+msgid "Small operand was not an immediate number"
+msgstr ""
+
+#: xstormy16-asm.c:157
+msgid "Operand is not a symbol"
+msgstr ""
+
+#: xstormy16-asm.c:165
+msgid "Syntax error: No trailing ')'"
+msgstr ""
+
+#: xstormy16-desc.c:1317
+#, c-format
+msgid ""
+"internal error: xstormy16_cgen_rebuild_tables: conflicting insn-chunk-"
+"bitsize values: `%d' vs. `%d'"
+msgstr ""
+
+#: xstormy16-desc.c:1400
+#, c-format
+msgid "internal error: xstormy16_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: xstormy16-desc.c:1419
+#, c-format
+msgid "internal error: xstormy16_cgen_cpu_open: no endianness specified"
 msgstr ""