X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fppc-dis.c;h=7d4f9e1dc97c488b96e70ad8a74ef0e69c38a4a2;hb=e316cf6e3e9aded8e0c86d7dda88c55f5cf918dd;hp=19b16ef01e0f6c59a76b3bb14209bb89a9b04623;hpb=e98fe4f7b54cbdf29aef9287bbb1bea8801dd05a;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index 19b16ef01e..7d4f9e1dc9 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -1,25 +1,26 @@ /* ppc-dis.c -- Disassemble PowerPC instructions - Copyright 1994 Free Software Foundation, Inc. + Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, + 2008 Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support -This file is part of GDB, GAS, and the GNU binutils. + This file is part of the GNU opcodes library. -GDB, GAS, and the GNU binutils are free software; you can redistribute -them and/or modify them under the terms of the GNU General Public -License as published by the Free Software Foundation; either version -2, or (at your option) any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -GDB, GAS, and the GNU binutils are distributed in the hope that they -will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See -the GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with this file; see the file COPYING. If not, write to the Free -Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ + You should have received a copy of the GNU General Public License + along with this file; see the file COPYING. If not, write to the + Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ #include -#include "ansidecl.h" #include "sysdep.h" #include "dis-asm.h" #include "opcode/ppc.h" @@ -29,48 +30,188 @@ Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ are provided because this file handles disassembly for the PowerPC in both big and little endian mode and also for the POWER (RS/6000) chip. */ +static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, + ppc_cpu_t); -static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *, - int bigendian, int dialect)); +struct dis_private +{ + /* Stash the result of parsing disassembler_options here. */ + ppc_cpu_t dialect; +}; + +#define POWERPC_DIALECT(INFO) \ + (((struct dis_private *) ((INFO)->private_data))->dialect) + +/* Determine which set of machines to disassemble for. PPC403/601 or + BookE. For convenience, also disassemble instructions supported + by the AltiVec vector unit. */ + +static int +powerpc_init_dialect (struct disassemble_info *info) +{ + ppc_cpu_t dialect = PPC_OPCODE_PPC; + struct dis_private *priv = calloc (sizeof (*priv), 1); + + if (priv == NULL) + return FALSE; + + if (BFD_DEFAULT_TARGET_SIZE == 64) + dialect |= PPC_OPCODE_64; + + if (info->disassembler_options + && strstr (info->disassembler_options, "ppcps") != NULL) + dialect |= PPC_OPCODE_PPCPS; + else if (info->disassembler_options + && strstr (info->disassembler_options, "booke") != NULL) + dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64; + else if ((info->mach == bfd_mach_ppc_e500mc) + || (info->disassembler_options + && strstr (info->disassembler_options, "e500mc") != NULL)) + dialect |= (PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL + | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK + | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC); + else if ((info->mach == bfd_mach_ppc_e500) + || (info->disassembler_options + && strstr (info->disassembler_options, "e500") != NULL)) + dialect |= (PPC_OPCODE_BOOKE + | PPC_OPCODE_SPE | PPC_OPCODE_ISEL + | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK + | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK + | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC); + else if (info->disassembler_options + && strstr (info->disassembler_options, "efs") != NULL) + dialect |= PPC_OPCODE_EFS; + else if (info->disassembler_options + && strstr (info->disassembler_options, "e300") != NULL) + dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON; + else if (info->disassembler_options + && (strstr (info->disassembler_options, "440") != NULL + || strstr (info->disassembler_options, "464") != NULL)) + dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32 + | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI; + else + dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC + | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC); + + if (info->disassembler_options + && strstr (info->disassembler_options, "power4") != NULL) + dialect |= PPC_OPCODE_POWER4; + + if (info->disassembler_options + && strstr (info->disassembler_options, "power5") != NULL) + dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5; + + if (info->disassembler_options + && strstr (info->disassembler_options, "cell") != NULL) + dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC; + + if (info->disassembler_options + && strstr (info->disassembler_options, "power6") != NULL) + dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC; + + if (info->disassembler_options + && strstr (info->disassembler_options, "any") != NULL) + dialect |= PPC_OPCODE_ANY; + + if (info->disassembler_options) + { + if (strstr (info->disassembler_options, "32") != NULL) + dialect &= ~PPC_OPCODE_64; + else if (strstr (info->disassembler_options, "64") != NULL) + dialect |= PPC_OPCODE_64; + } + + info->private_data = priv; + POWERPC_DIALECT(info) = dialect; + + return TRUE; +} /* Print a big endian PowerPC instruction. */ int -print_insn_big_powerpc (memaddr, info) - bfd_vma memaddr; - struct disassemble_info *info; +print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info) { - return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_PPC); + if (info->private_data == NULL && !powerpc_init_dialect (info)) + return -1; + return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info)); } /* Print a little endian PowerPC instruction. */ int -print_insn_little_powerpc (memaddr, info) - bfd_vma memaddr; - struct disassemble_info *info; +print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info) { - return print_insn_powerpc (memaddr, info, 0, PPC_OPCODE_PPC); + if (info->private_data == NULL && !powerpc_init_dialect (info)) + return -1; + return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info)); } /* Print a POWER (RS/6000) instruction. */ int -print_insn_rs6000 (memaddr, info) - bfd_vma memaddr; - struct disassemble_info *info; +print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info) { return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER); } +/* Extract the operand value from the PowerPC or POWER instruction. */ + +static long +operand_value_powerpc (const struct powerpc_operand *operand, + unsigned long insn, ppc_cpu_t dialect) +{ + long value; + int invalid; + /* Extract the value from the instruction. */ + if (operand->extract) + value = (*operand->extract) (insn, dialect, &invalid); + else + { + value = (insn >> operand->shift) & operand->bitm; + if ((operand->flags & PPC_OPERAND_SIGNED) != 0) + { + /* BITM is always some number of zeros followed by some + number of ones, followed by some numer of zeros. */ + unsigned long top = operand->bitm; + /* top & -top gives the rightmost 1 bit, so this + fills in any trailing zeros. */ + top |= (top & -top) - 1; + top &= ~(top >> 1); + value = (value ^ top) - top; + } + } + + return value; +} + +/* Determine whether the optional operand(s) should be printed. */ + +static int +skip_optional_operands (const unsigned char *opindex, + unsigned long insn, ppc_cpu_t dialect) +{ + const struct powerpc_operand *operand; + + for (; *opindex != 0; opindex++) + { + operand = &powerpc_operands[*opindex]; + if ((operand->flags & PPC_OPERAND_NEXT) != 0 + || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 + && operand_value_powerpc (operand, insn, dialect) != 0)) + return 0; + } + + return 1; +} + /* Print a PowerPC or POWER instruction. */ static int -print_insn_powerpc (memaddr, info, bigendian, dialect) - bfd_vma memaddr; - struct disassemble_info *info; - int bigendian; - int dialect; +print_insn_powerpc (bfd_vma memaddr, + struct disassemble_info *info, + int bigendian, + ppc_cpu_t dialect) { bfd_byte buffer[4]; int status; @@ -97,6 +238,7 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) /* Find the first match in the opcode table. We could speed this up a bit by doing a binary search on the major opcode. */ opcode_end = powerpc_opcodes + powerpc_num_opcodes; + again: for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++) { unsigned long table_op; @@ -105,6 +247,7 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) int invalid; int need_comma; int need_paren; + int skip_optional; table_op = PPC_OP (opcode->opcode); if (op < table_op) @@ -124,19 +267,21 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) { operand = powerpc_operands + *opindex; if (operand->extract) - (*operand->extract) (insn, &invalid); + (*operand->extract) (insn, dialect, &invalid); } if (invalid) continue; /* The instruction is valid. */ - (*info->fprintf_func) (info->stream, "%s", opcode->name); if (opcode->operands[0] != 0) - (*info->fprintf_func) (info->stream, "\t"); + (*info->fprintf_func) (info->stream, "%-7s ", opcode->name); + else + (*info->fprintf_func) (info->stream, "%s", opcode->name); /* Now extract and print the operands. */ need_comma = 0; need_paren = 0; + skip_optional = -1; for (opindex = opcode->operands; *opindex != 0; opindex++) { long value; @@ -149,23 +294,18 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) if ((operand->flags & PPC_OPERAND_FAKE) != 0) continue; - /* Extract the value from the instruction. */ - if (operand->extract) - value = (*operand->extract) (insn, (int *) NULL); - else + /* If all of the optional operands have the value zero, + then don't print any of them. */ + if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) { - value = (insn >> operand->shift) & ((1 << operand->bits) - 1); - if (operand->signedp - && (value & (1 << (operand->bits - 1))) != 0) - value -= 1 << operand->bits; + if (skip_optional < 0) + skip_optional = skip_optional_operands (opindex, insn, + dialect); + if (skip_optional) + continue; } - /* If the operand is optional, and the value is zero, don't - print anything. */ - if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 - && (operand->flags & PPC_OPERAND_NEXT) == 0 - && value == 0) - continue; + value = operand_value_powerpc (operand, insn, dialect); if (need_comma) { @@ -174,10 +314,13 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) } /* Print the operand as directed by the flags. */ - if ((operand->flags & PPC_OPERAND_GPR) != 0) + if ((operand->flags & PPC_OPERAND_GPR) != 0 + || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0)) (*info->fprintf_func) (info->stream, "r%ld", value); else if ((operand->flags & PPC_OPERAND_FPR) != 0) (*info->fprintf_func) (info->stream, "f%ld", value); + else if ((operand->flags & PPC_OPERAND_VR) != 0) + (*info->fprintf_func) (info->stream, "v%ld", value); else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0) (*info->print_address_func) (memaddr + value, info); else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) @@ -185,10 +328,16 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) else if ((operand->flags & PPC_OPERAND_CR) == 0 || (dialect & PPC_OPCODE_PPC) == 0) (*info->fprintf_func) (info->stream, "%ld", value); + else if ((operand->flags & PPC_OPERAND_FSL) != 0) + (*info->fprintf_func) (info->stream, "fsl%ld", value); + else if ((operand->flags & PPC_OPERAND_FCR) != 0) + (*info->fprintf_func) (info->stream, "fcr%ld", value); + else if ((operand->flags & PPC_OPERAND_UDI) != 0) + (*info->fprintf_func) (info->stream, "%ld", value); else { - if (operand->bits == 3) - (*info->fprintf_func) (info->stream, "cr%d", value); + if (operand->bitm == 7) + (*info->fprintf_func) (info->stream, "cr%ld", value); else { static const char *cbnames[4] = { "lt", "gt", "eq", "so" }; @@ -197,14 +346,9 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) cr = value >> 2; if (cr != 0) - (*info->fprintf_func) (info->stream, "4*cr%d", cr); + (*info->fprintf_func) (info->stream, "4*cr%d+", cr); cc = value & 3; - if (cc != 0) - { - if (cr != 0) - (*info->fprintf_func) (info->stream, "+"); - (*info->fprintf_func) (info->stream, "%s", cbnames[cc]); - } + (*info->fprintf_func) (info->stream, "%s", cbnames[cc]); } } @@ -227,8 +371,36 @@ print_insn_powerpc (memaddr, info, bigendian, dialect) return 4; } + if ((dialect & PPC_OPCODE_ANY) != 0) + { + dialect = ~PPC_OPCODE_ANY; + goto again; + } + /* We could not find a match. */ - (*info->fprintf_func) (info->stream, "0x%lx", insn); + (*info->fprintf_func) (info->stream, ".long 0x%lx", insn); return 4; } + +void +print_ppc_disassembler_options (FILE *stream) +{ + fprintf (stream, "\n\ +The following PPC specific disassembler options are supported for use with\n\ +the -M switch:\n"); + + fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n"); + fprintf (stream, " e300 Disassemble the e300 instructions\n"); + fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n"); + fprintf (stream, " e500mc Disassemble the e500mc instructions\n"); + fprintf (stream, " 440 Disassemble the 440 instructions\n"); + fprintf (stream, " 464 Disassemble the 464 instructions\n"); + fprintf (stream, " efs Disassemble the EFS instructions\n"); + fprintf (stream, " ppcps Disassemble the PowerPC paired singles instructions\n"); + fprintf (stream, " power4 Disassemble the Power4 instructions\n"); + fprintf (stream, " power5 Disassemble the Power5 instructions\n"); + fprintf (stream, " power6 Disassemble the Power6 instructions\n"); + fprintf (stream, " 32 Do not disassemble 64-bit instructions\n"); + fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n"); +}