X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Frx-decode.opc;h=3fe542fd8fc6764a7e2ccefe9d44ffe7aadd9467;hb=defc8e2b3576c28fd5651763348ae23c18a94170;hp=2409f7f52062f7818c075116100cc928f062aac0;hpb=e292aa7a9529771c04e9578a2307b8c95bb5591c;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc
index 2409f7f520..3fe542fd8f 100644
--- a/opcodes/rx-decode.opc
+++ b/opcodes/rx-decode.opc
@@ -1,5 +1,5 @@
 /* -*- c -*- */
-/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
+/* Copyright (C) 2012-2017 Free Software Foundation, Inc.
    Contributed by Red Hat.
    Written by DJ Delorie.
 
@@ -26,6 +26,7 @@
 #include <string.h>
 #include "ansidecl.h"
 #include "opcode/rx.h"
+#include "libiberty.h"
 
 #define RX_OPCODE_BIG_ENDIAN 0
 
@@ -44,7 +45,7 @@ static int trace = 0;
 #define LSIZE 2
 
 /* These are for when the upper bits are "don't care" or "undefined".  */
-static int bwl[] =
+static int bwl[4] =
 {
   RX_Byte,
   RX_Word,
@@ -52,7 +53,7 @@ static int bwl[] =
   RX_Bad_Size /* Bogus instructions can have a size field set to 3.  */
 };
 
-static int sbwl[] =
+static int sbwl[4] =
 {
   RX_SByte,
   RX_SWord,
@@ -60,7 +61,7 @@ static int sbwl[] =
   RX_Bad_Size /* Bogus instructions can have a size field set to 3.  */
 };
 
-static int ubw[] =
+static int ubw[4] =
 {
   RX_UByte,
   RX_UWord,
@@ -68,7 +69,7 @@ static int ubw[] =
   RX_Bad_Size /* Bogus instructions can have a size field set to 3.  */
 };
 
-static int memex[] =
+static int memex[4] =
 {
   RX_SByte,
   RX_SWord,
@@ -88,6 +89,9 @@ static int SCALE[] = { 1, 2, 4, 0 };
 /* This is for the prefix size enum.  */
 static int PSCALE[] = { 4, 1, 1, 1, 2, 2, 2, 3, 4 };
 
+#define GET_SCALE(_indx)  ((unsigned)(_indx) < ARRAY_SIZE (SCALE) ? SCALE[(_indx)] : 0)
+#define GET_PSCALE(_indx) ((unsigned)(_indx) < ARRAY_SIZE (PSCALE) ? PSCALE[(_indx)] : 0)
+
 static int flagmap[] = {0, 1, 2, 3, 0, 0, 0, 0,
 		       16, 17, 0, 0, 0, 0, 0, 0 };
 
@@ -106,7 +110,7 @@ static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
 #define DC(c)       OP (0, RX_Operand_Immediate, 0, c)
 #define DR(r)       OP (0, RX_Operand_Register,  r, 0)
 #define DI(r,a)     OP (0, RX_Operand_Indirect,  r, a)
-#define DIs(r,a,s)  OP (0, RX_Operand_Indirect,  r, (a) * SCALE[s])
+#define DIs(r,a,s)  OP (0, RX_Operand_Indirect,  r, (a) * GET_SCALE (s))
 #define DD(t,r,s)   rx_disp (0, t, r, bwl[s], ld);
 #define DF(r)       OP (0, RX_Operand_Flag,  flagmap[r], 0)
 
@@ -114,7 +118,7 @@ static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
 #define SR(r)       OP (1, RX_Operand_Register,  r, 0)
 #define SRR(r)      OP (1, RX_Operand_TwoReg,  r, 0)
 #define SI(r,a)     OP (1, RX_Operand_Indirect,  r, a)
-#define SIs(r,a,s)  OP (1, RX_Operand_Indirect,  r, (a) * SCALE[s])
+#define SIs(r,a,s)  OP (1, RX_Operand_Indirect,  r, (a) * GET_SCALE (s))
 #define SD(t,r,s)   rx_disp (1, t, r, bwl[s], ld);
 #define SP(t,r)     rx_disp (1, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 1);
 #define SPm(t,r,m)  rx_disp (1, t, r, memex[m], ld); rx->op[1].size = memex[m];
@@ -123,7 +127,7 @@ static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
 #define S2C(i)      OP (2, RX_Operand_Immediate, 0, i)
 #define S2R(r)      OP (2, RX_Operand_Register,  r, 0)
 #define S2I(r,a)    OP (2, RX_Operand_Indirect,  r, a)
-#define S2Is(r,a,s) OP (2, RX_Operand_Indirect,  r, (a) * SCALE[s])
+#define S2Is(r,a,s) OP (2, RX_Operand_Indirect,  r, (a) * GET_SCALE (s))
 #define S2D(t,r,s)  rx_disp (2, t, r, bwl[s], ld);
 #define S2P(t,r)    rx_disp (2, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 2);
 #define S2Pm(t,r,m) rx_disp (2, t, r, memex[m], ld); rx->op[2].size = memex[m];
@@ -210,7 +214,7 @@ immediate (int sfield, int ex, LocalData * ld)
 }
 
 static void
-rx_disp (int n, int type, int reg, int size, LocalData * ld)
+rx_disp (int n, int type, int reg, unsigned int size, LocalData * ld)
 {
   int disp;
 
@@ -227,7 +231,7 @@ rx_disp (int n, int type, int reg, int size, LocalData * ld)
     case 1:
       ld->rx->op[n].type = RX_Operand_Indirect;
       disp = GETBYTE ();
-      ld->rx->op[n].addend = disp * PSCALE[size];
+      ld->rx->op[n].addend = disp * GET_PSCALE (size);
       break;
     case 2:
       ld->rx->op[n].type = RX_Operand_Indirect;
@@ -237,7 +241,7 @@ rx_disp (int n, int type, int reg, int size, LocalData * ld)
 #else
       disp = disp + GETBYTE () * 256;
 #endif
-      ld->rx->op[n].addend = disp * PSCALE[size];
+      ld->rx->op[n].addend = disp * GET_PSCALE (size);
       break;
     default:
       abort ();
@@ -310,7 +314,7 @@ rx_decode_opcode (unsigned long pc AU,
   if (sd == 3 && ss == 3 && sz == 2 && rsrc == 0 && rdst == 0)
     {
       ID(nop2);
-      rx->syntax = "nop";
+      SYNTAX ("nop\t; mov.l\tr0, r0");
     }
   else
     {
@@ -567,13 +571,23 @@ rx_decode_opcode (unsigned long pc AU,
 /* MAX									*/
 
 /** 1111 1101 0111 im00 0100rdst	max	#%1, %0 */
-  ID(max); DR(rdst); SC(IMMex(im));
+  int val = IMMex (im);
+  if (im == 0 && (unsigned) val == 0x80000000 && rdst == 0)
+    {
+      ID (nop7);
+      SYNTAX("nop\t; max\t#0x80000000, r0");
+    }
+  else
+    {
+      ID(max);
+    }
+  DR(rdst); SC(val);
 
 /** 1111 1100 0001 00ss rsrc rdst	max	%1%S1, %0 */
   if (ss == 3 && rsrc == 0 && rdst == 0)
     {
       ID(nop3);
-      rx->syntax = "nop";
+      SYNTAX("nop\t; max\tr0, r0");
     }
   else
     {
@@ -599,10 +613,38 @@ rx_decode_opcode (unsigned long pc AU,
 /* MUL									*/
 
 /** 0110 0011 immm rdst			mul	#%1, %0 */
-  ID(mul); DR(rdst); SC(immm); F_____;
+  if (immm == 1 && rdst == 0)
+    {
+      ID(nop2);
+      SYNTAX ("nop\t; mul\t#1, r0");
+    }
+  else
+    {
+      ID(mul);
+    }
+  DR(rdst); SC(immm); F_____;
 
 /** 0111 01im 0001rdst			mul	#%1, %0 */
-  ID(mul); DR(rdst); SC(IMMex(im)); F_____;
+  int val = IMMex(im);
+  if (val == 1 && rdst == 0)
+    {
+      SYNTAX("nop\t; mul\t#1, r0");
+      switch (im)
+	{
+	case 2: ID(nop4); break;
+	case 3: ID(nop5); break;
+	case 0: ID(nop6); break;
+	default:
+	  ID(mul);
+	  SYNTAX("mul	#%1, %0");
+	  break;
+	}
+    }
+  else
+    {
+      ID(mul);
+    }
+  DR(rdst); SC(val); F_____;
 
 /** 0100 11ss rsrc rdst			mul	%1%S1, %0 */
   ID(mul); SP(ss, rsrc); DR(rdst); F_____;
@@ -806,35 +848,35 @@ rx_decode_opcode (unsigned long pc AU,
 /*----------------------------------------------------------------------*/
 /* HI/LO stuff								*/
 
-/** 1111 1101 0000 0000 srca srcb	mulhi	%1, %2 */
-  ID(mulhi); SR(srca); S2R(srcb); F_____;
+/** 1111 1101 0000 a000 srca srcb	mulhi	%1, %2, %0 */
+  ID(mulhi); DR(a+32); SR(srca); S2R(srcb); F_____;
 
-/** 1111 1101 0000 0001 srca srcb	mullo	%1, %2 */
-  ID(mullo); SR(srca); S2R(srcb); F_____;
+/** 1111 1101 0000 a001 srca srcb	mullo	%1, %2, %0 */
+  ID(mullo); DR(a+32); SR(srca); S2R(srcb); F_____;
 
-/** 1111 1101 0000 0100 srca srcb	machi	%1, %2 */
-  ID(machi); SR(srca); S2R(srcb); F_____;
+/** 1111 1101 0000 a100 srca srcb	machi	%1, %2, %0 */
+  ID(machi); DR(a+32); SR(srca); S2R(srcb); F_____;
 
-/** 1111 1101 0000 0101 srca srcb	maclo	%1, %2 */
-  ID(maclo); SR(srca); S2R(srcb); F_____;
+/** 1111 1101 0000 a101 srca srcb	maclo	%1, %2, %0 */
+  ID(maclo); DR(a+32); SR(srca); S2R(srcb); F_____;
 
-/** 1111 1101 0001 0111 0000 rsrc	mvtachi	%1 */
-  ID(mvtachi); SR(rsrc); F_____;
+/** 1111 1101 0001 0111 a000 rsrc	mvtachi	%1, %0 */
+  ID(mvtachi); DR(a+32); SR(rsrc); F_____;
 
-/** 1111 1101 0001 0111 0001 rsrc	mvtaclo	%1 */
-  ID(mvtaclo); SR(rsrc); F_____;
+/** 1111 1101 0001 0111 a001 rsrc	mvtaclo	%1, %0 */
+  ID(mvtaclo); DR(a+32); SR(rsrc); F_____;
 
-/** 1111 1101 0001 1111 0000 rdst	mvfachi	%0 */
-  ID(mvfachi); DR(rdst); F_____;
+/** 1111 1101 0001 111i a m00 rdst	mvfachi	#%2, %1, %0 */
+  ID(mvfachi); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
 
-/** 1111 1101 0001 1111 0010 rdst	mvfacmi	%0 */
-  ID(mvfacmi); DR(rdst); F_____;
+/** 1111 1101 0001 111i a m10 rdst	mvfacmi	#%2, %1, %0 */
+  ID(mvfacmi); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
 
-/** 1111 1101 0001 1111 0001 rdst	mvfaclo	%0 */
-  ID(mvfaclo); DR(rdst); F_____;
+/** 1111 1101 0001 111i a m01 rdst	mvfaclo	#%2, %1, %0 */
+  ID(mvfaclo); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
 
-/** 1111 1101 0001 1000 000i 0000	racw	#%1 */
-  ID(racw); SC(i+1); F_____;
+/** 1111 1101 0001 1000 a00i 0000	racw	#%1, %0 */
+  ID(racw); SC(i+1); DR(a+32); F_____;
 
 /*----------------------------------------------------------------------*/
 /* SAT									*/
@@ -1001,6 +1043,81 @@ rx_decode_opcode (unsigned long pc AU,
 /** 1111 1100 1101 sz sd rdst cond	sc%1%s	%0 */
   ID(sccnd); BWL(sz); DD (sd, rdst, sz); Scc(cond);
 
+/*----------------------------------------------------------------------*/
+/* RXv2 enhanced								*/
+
+/** 1111 1101 0010 0111 rdst rsrc	movco	%1, [%0] */
+   ID(movco); SR(rsrc); DR(rdst); F_____;
+
+/** 1111 1101 0010 1111 rsrc rdst	movli	[%1], %0 */
+   ID(movli); SR(rsrc); DR(rdst); F_____;
+
+/** 1111 1100 0100 1011 rsrc rdst	stz	%1, %0 */
+  ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_z);
+
+/** 1111 1100 0100 1111 rsrc rdst	stnz	%1, %0 */
+  ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_nz);
+
+/** 1111 1101 0000 a111 srca srcb 	emaca	%1, %2, %0 */
+  ID(emaca); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0100 a111 srca srcb 	emsba	%1, %2, %0 */
+  ID(emsba); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0000 a011 srca srcb 	emula	%1, %2, %0 */
+  ID(emula); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0000 a110 srca srcb	maclh	%1, %2, %0 */
+  ID(maclh); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0100 a100 srca srcb	msbhi	%1, %2, %0 */
+  ID(msbhi); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0100 a110 srca srcb	msblh	%1, %2, %0 */
+  ID(msblh); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0100 a101 srca srcb	msblo	%1, %2, %0 */
+  ID(msblo); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0000 a010 srca srcb	mullh	%1, %2, %0 */
+  ID(mullh); DR(a+32); SR(srca); S2R(srcb); F_____;
+
+/** 1111 1101 0001 111i a m11 rdst	mvfacgu	#%2, %1, %0 */
+  ID(mvfacgu); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
+
+/** 1111 1101 0001 0111 a011 rdst	mvtacgu	%0, %1 */
+  ID(mvtacgu); DR(a+32); SR(rdst); F_____;
+
+/** 1111 1101 0001 1001 a00i 0000	racl	#%1, %0 */
+  ID(racl); SC(i+1); DR(a+32); F_____;
+
+/** 1111 1101 0001 1001 a10i 0000	rdacl	#%1, %0 */
+  ID(rdacl); SC(i+1); DR(a+32); F_____;
+
+/** 1111 1101 0001 1000 a10i 0000	rdacw	#%1, %0 */
+  ID(rdacw); SC(i+1); DR(a+32); F_____;
+
+/** 1111 1111 1010 rdst srca srcb	fadd	%2, %1, %0 */
+  ID(fadd); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
+
+/** 1111 1111 1000 rdst srca srcb	fsub	%2, %1, %0 */
+  ID(fsub); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
+
+/** 1111 1111 1011 rdst srca srcb	fmul	%2, %1, %0 */
+  ID(fmul); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
+
+/** 1111 1100 1010 00sd rsrc rdst	fsqrt	%1%S1, %0 */
+  ID(fsqrt); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
+
+/** 1111 1100 1010 01sd rsrc rdst	ftou	%1%S1, %0 */
+  ID(ftou); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
+
+/** 1111 1100 0101 01sd rsrc rdst	utof	%1%S1, %0 */
+  ID(utof); DR (rdst); SP(sd, rsrc); F__SZ_;
+
+/** 0000 0110 mx10 00sd 0001 0101 rsrc rdst	utof	%1%S1, %0 */
+  ID(utof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
+
 /** */
 
   return rx->n_bytes;