X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Ftic54x-dis.c;h=9811722d3bd0694a29959b5415d7fb4309b8aebe;hb=2f81ff928644e457e4edbff1257e663845857f6b;hp=5c099d93ae639b76c96506db4b2e51e04dd2150d;hpb=33822a8e759c9fab4599d5c942719296eef720cd;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/tic54x-dis.c b/opcodes/tic54x-dis.c index 5c099d93ae..9811722d3b 100644 --- a/opcodes/tic54x-dis.c +++ b/opcodes/tic54x-dis.c @@ -1,64 +1,58 @@ /* Disassembly routines for TMS320C54X architecture - Copyright 1999, 2000 Free Software Foundation, Inc. + Copyright 1999, 2000, 2001, 2005, 2007, 2009, 2012 + Free Software Foundation, Inc. Contributed by Timothy Wall (twall@cygnus.com) - This program is free software; you can redistribute it and/or modify + This file is part of the GNU opcodes library. + + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. + the Free Software Foundation; either version 3, or (at your option) + any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA - 02111-1307, USA. */ + along with this file; see the file COPYING. If not, write to the + Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ +#include "sysdep.h" #include #include #include -#include "sysdep.h" #include "dis-asm.h" #include "opcode/tic54x.h" #include "coff/tic54x.h" -typedef struct _instruction { - int parallel; - template *tm; - partemplate *ptm; -} instruction; - -static int get_insn_size PARAMS ((unsigned short, instruction *)); -static int get_instruction PARAMS ((disassemble_info *, bfd_vma, - unsigned short, instruction *)); -static int print_instruction PARAMS ((disassemble_info *, bfd_vma, - unsigned short, char *, - enum optype [], int, int)); -static int print_parallel_instruction PARAMS ((disassemble_info *, bfd_vma, - unsigned short, partemplate *, - int)); -static int sprint_dual_address (disassemble_info *,char [], +static int has_lkaddr (unsigned short, const insn_template *); +static int get_insn_size (unsigned short, const insn_template *); +static int print_instruction (disassemble_info *, bfd_vma, + unsigned short, const char *, + const enum optype [], int, int); +static int print_parallel_instruction (disassemble_info *, bfd_vma, + unsigned short, + const insn_template *, int); +static int sprint_dual_address (disassemble_info *,char [], unsigned short); -static int sprint_indirect_address (disassemble_info *,char [], +static int sprint_indirect_address (disassemble_info *,char [], unsigned short); -static int sprint_direct_address (disassemble_info *,char [], +static int sprint_direct_address (disassemble_info *,char [], unsigned short); static int sprint_mmr (disassemble_info *,char [],int); static int sprint_condition (disassemble_info *,char *,unsigned short); static int sprint_cc2 (disassemble_info *,char *,unsigned short); int -print_insn_tic54x (memaddr, info) - bfd_vma memaddr; - disassemble_info *info; +print_insn_tic54x (bfd_vma memaddr, disassemble_info *info) { - bfd_byte opbuf[2]; + bfd_byte opbuf[2]; unsigned short opcode; int status, size; - instruction insn; + const insn_template* tm; status = (*info->read_memory_func) (memaddr, opbuf, 2, info); if (status != 0) @@ -68,26 +62,24 @@ print_insn_tic54x (memaddr, info) } opcode = bfd_getl16 (opbuf); - if (!get_instruction (info, memaddr, opcode, &insn)) - return -1; + tm = tic54x_get_insn (info, memaddr, opcode, &size); - size = get_insn_size (opcode, &insn); info->bytes_per_line = 2; info->bytes_per_chunk = 2; info->octets_per_byte = 2; info->display_endian = BFD_ENDIAN_LITTLE; - if (insn.parallel) + if (tm->flags & FL_PAR) { - if (!print_parallel_instruction (info, memaddr, opcode, insn.ptm, size)) + if (!print_parallel_instruction (info, memaddr, opcode, tm, size)) return -1; } else { - if (!print_instruction (info, memaddr, opcode, - (char *) insn.tm->name, - insn.tm->operand_types, - size, (insn.tm->flags & FL_EXT))) + if (!print_instruction (info, memaddr, opcode, + (char *) tm->name, + tm->operand_types, + size, (tm->flags & FL_EXT))) return -1; } @@ -95,33 +87,28 @@ print_insn_tic54x (memaddr, info) } static int -has_lkaddr (opcode, tm) - unsigned short opcode; - template *tm; +has_lkaddr (unsigned short memdata, const insn_template *tm) { - return (IS_LKADDR (opcode) + return (IS_LKADDR (memdata) && (OPTYPE (tm->operand_types[0]) == OP_Smem || OPTYPE (tm->operand_types[1]) == OP_Smem || OPTYPE (tm->operand_types[2]) == OP_Smem - || OPTYPE (tm->operand_types[1]) == OP_Sind)); + || OPTYPE (tm->operand_types[1]) == OP_Sind + || OPTYPE (tm->operand_types[0]) == OP_Lmem + || OPTYPE (tm->operand_types[1]) == OP_Lmem)); } /* always returns 1 (whether an insn template was found) since we provide an "unknown instruction" template */ -static int -get_instruction (info, addr, opcode, insn) - disassemble_info *info; - bfd_vma addr; - unsigned short opcode; - instruction *insn; +const insn_template* +tic54x_get_insn (disassemble_info *info, bfd_vma addr, + unsigned short memdata, int *size) { - template * tm; - partemplate * ptm; + const insn_template *tm = NULL; - insn->parallel = 0; - for (tm = (template *) tic54x_optab; tm->name; tm++) + for (tm = tic54x_optab; tm->name; tm++) { - if (tm->opcode == (opcode & tm->mask)) + if (tm->opcode == (memdata & tm->mask)) { /* a few opcodes span two words */ if (tm->flags & FL_EXT) @@ -129,74 +116,72 @@ get_instruction (info, addr, opcode, insn) /* if lk addressing is used, the second half of the opcode gets pushed one word later */ bfd_byte opbuf[2]; - bfd_vma addr2 = addr + 1 + has_lkaddr (opcode, tm); + bfd_vma addr2 = addr + 1 + has_lkaddr (memdata, tm); int status = (*info->read_memory_func) (addr2, opbuf, 2, info); + // FIXME handle errors if (status == 0) { - unsigned short opcode2 = bfd_getl16 (opbuf); - if (tm->opcode2 == (opcode2 & tm->mask2)) + unsigned short data2 = bfd_getl16 (opbuf); + if (tm->opcode2 == (data2 & tm->mask2)) { - insn->tm = tm; - return 1; + if (size) *size = get_insn_size (memdata, tm); + return tm; } } } else { - insn->tm = tm; - return 1; + if (size) *size = get_insn_size (memdata, tm); + return tm; } } } - for (ptm = (partemplate *) tic54x_paroptab; ptm->name; ptm++) + for (tm = (insn_template *) tic54x_paroptab; tm->name; tm++) { - if (ptm->opcode == (opcode & ptm->mask)) + if (tm->opcode == (memdata & tm->mask)) { - insn->parallel = 1; - insn->ptm = ptm; - return 1; + if (size) *size = get_insn_size (memdata, tm); + return tm; } } - insn->tm = (template *) &tic54x_unknown_opcode; - return 1; + if (size) *size = 1; + return &tic54x_unknown_opcode; } -static int -get_insn_size (opcode, insn) - unsigned short opcode; - instruction *insn; +static int +get_insn_size (unsigned short memdata, const insn_template *insn) { int size; - if (insn->parallel) + if (insn->flags & FL_PAR) { /* only non-parallel instructions support lk addressing */ - size = insn->ptm->words; + size = insn->words; } else { - size = insn->tm->words + has_lkaddr (opcode, insn->tm); + size = insn->words + has_lkaddr (memdata, insn); } return size; } int -print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) - disassemble_info *info; - bfd_vma memaddr; - unsigned short opcode; - char *tm_name; - enum optype tm_operands[]; - int size; - int ext; +print_instruction (disassemble_info *info, + bfd_vma memaddr, + unsigned short opcode, + const char *tm_name, + const enum optype tm_operands[], + int size, + int ext) { static int n; /* string storage for multiple operands */ char operand[4][64] = { {0},{0},{0},{0}, }; bfd_byte buf[2]; - unsigned long opcode2, lkaddr; + unsigned long opcode2 = 0; + unsigned long lkaddr = 0; enum optype src = OP_None; enum optype dst = OP_None; int i, shift; @@ -248,11 +233,11 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) if (mod == 15) info->fprintf_func (info->stream, "*("); else - info->fprintf_func (info->stream, "*%sar%d(", + info->fprintf_func (info->stream, "*%sar%d(", (mod == 13 || mod == 14 ? "+" : ""), arf); (*(info->print_address_func)) ((bfd_vma) addr, info); - info->fprintf_func (info->stream, ")%s", + info->fprintf_func (info->stream, ")%s", mod == 14 ? "%" : ""); } else @@ -395,7 +380,10 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) case OP_CC3: { const char *code[] = { "eq", "lt", "gt", "neq" }; - sprintf (operand[i], code[CC3 (opcode)]); + + /* Do not use sprintf with only two parameters as a + compiler warning could be generated in such conditions. */ + sprintf (operand[i], "%s", code[CC3 (opcode)]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]); break; } @@ -407,7 +395,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) break; } case OP_k5: - sprintf (operand[i], "#%d", + sprintf (operand[i], "#%d", (int) (((signed char) opcode & 0x1F) << 3) >> 3); info->fprintf_func (info->stream, "%s%s", comma, operand[i]); break; @@ -431,15 +419,15 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) case OP_SBIT: { const char *status0[] = { - "0", "1", "2", "3", "4", "5", "6", "7", "8", + "0", "1", "2", "3", "4", "5", "6", "7", "8", "ovb", "ova", "c", "tc", "13", "14", "15" }; const char *status1[] = { - "0", "1", "2", "3", "4", + "0", "1", "2", "3", "4", "cmpt", "frct", "c16", "sxm", "ovm", "10", "intm", "hm", "xf", "cpl", "braf" }; - sprintf (operand[i], "%s", + sprintf (operand[i], "%s", n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]); break; @@ -480,25 +468,23 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) } static int -print_parallel_instruction (info, memaddr, opcode, ptm, size) - disassemble_info *info; - bfd_vma memaddr; - unsigned short opcode; - partemplate *ptm; - int size; +print_parallel_instruction (disassemble_info *info, + bfd_vma memaddr, + unsigned short opcode, + const insn_template *ptm, + int size) { - print_instruction (info, memaddr, opcode, + print_instruction (info, memaddr, opcode, ptm->name, ptm->operand_types, size, 0); info->fprintf_func (info->stream, " || "); - return print_instruction (info, memaddr, opcode, + return print_instruction (info, memaddr, opcode, ptm->parname, ptm->paroperand_types, size, 0); } static int -sprint_dual_address (info, buf, code) - disassemble_info *info; - char buf[]; - unsigned short code; +sprint_dual_address (disassemble_info *info ATTRIBUTE_UNUSED, + char buf[], + unsigned short code) { const char *formats[] = { "*ar%d", @@ -510,10 +496,9 @@ sprint_dual_address (info, buf, code) } static int -sprint_indirect_address (info, buf, opcode) - disassemble_info *info; - char buf[]; - unsigned short opcode; +sprint_indirect_address (disassemble_info *info ATTRIBUTE_UNUSED, + char buf[], + unsigned short opcode) { const char *formats[] = { "*ar%d", @@ -533,20 +518,18 @@ sprint_indirect_address (info, buf, opcode) } static int -sprint_direct_address (info, buf, opcode) - disassemble_info *info; - char buf[]; - unsigned short opcode; +sprint_direct_address (disassemble_info *info ATTRIBUTE_UNUSED, + char buf[], + unsigned short opcode) { /* FIXME -- look up relocation if available */ - return sprintf (buf, "0x??%02x", (int) (opcode & 0x7F)); + return sprintf (buf, "DP+0x%02x", (int) (opcode & 0x7F)); } static int -sprint_mmr (info, buf, mmr) - disassemble_info *info; - char buf[]; - int mmr; +sprint_mmr (disassemble_info *info ATTRIBUTE_UNUSED, + char buf[], + int mmr) { symbol *reg = (symbol *) mmregs; while (reg->name != NULL) @@ -563,10 +546,9 @@ sprint_mmr (info, buf, mmr) } static int -sprint_cc2 (info, buf, opcode) - disassemble_info *info; - char *buf; - unsigned short opcode; +sprint_cc2 (disassemble_info *info ATTRIBUTE_UNUSED, + char *buf, + unsigned short opcode) { const char *cc2[] = { "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq", @@ -576,10 +558,9 @@ sprint_cc2 (info, buf, opcode) } static int -sprint_condition (info, buf, opcode) - disassemble_info *info; - char *buf; - unsigned short opcode; +sprint_condition (disassemble_info *info ATTRIBUTE_UNUSED, + char *buf, + unsigned short opcode) { char *start = buf; const char *cmp[] = { @@ -597,15 +578,15 @@ sprint_condition (info, buf, opcode) else if (opcode & 0x3F) { if (opcode & 0x30) - buf += sprintf (buf, "%s%s", + buf += sprintf (buf, "%s%s", ((opcode & 0x30) == 0x30) ? "tc" : "ntc", (opcode & 0x0F) ? ", " : ""); if (opcode & 0x0C) - buf += sprintf (buf, "%s%s", + buf += sprintf (buf, "%s%s", ((opcode & 0x0C) == 0x0C) ? "c" : "nc", (opcode & 0x03) ? ", " : ""); if (opcode & 0x03) - buf += sprintf (buf, "%s", + buf += sprintf (buf, "%s", ((opcode & 0x03) == 0x03) ? "bio" : "nbio"); } else