X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fv850-dis.c;h=e72b1e8d2e1d1cdf918ba1c0bc54755a4359e811;hb=d7de8249f067d69d47f230d2d402b68f12f51205;hp=34e49e2923d5623e6bf2cf48ebe46a6bee89563d;hpb=404d6e4fd1f08fde01c7c5797ab3ee184731c02e;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/v850-dis.c b/opcodes/v850-dis.c index 34e49e2923..e72b1e8d2e 100644 --- a/opcodes/v850-dis.c +++ b/opcodes/v850-dis.c @@ -1,5 +1,5 @@ /* Disassemble V850 instructions. - Copyright (C) 1996 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -18,9 +18,10 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include -#include "ansidecl.h" +#include "sysdep.h" #include "opcode/v850.h" #include "dis-asm.h" +#include "opintl.h" static const char *const v850_reg_names[] = { "r0", "r1", "r2", "sp", "gp", "r5", "r6", "r7", @@ -30,7 +31,9 @@ static const char *const v850_reg_names[] = static const char *const v850_sreg_names[] = { "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", - "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", + "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", + "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23", + "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31", "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23", "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31" }; @@ -38,6 +41,9 @@ static const char *const v850_cc_names[] = { "v", "c/l", "z", "nh", "s/n", "t", "lt", "le", "nv", "nc/nl", "nz", "h", "ns/p", "sa", "ge", "gt" }; +static int disassemble + PARAMS ((bfd_vma, struct disassemble_info *, unsigned long)); + static int disassemble (memaddr, info, insn) bfd_vma memaddr; @@ -51,11 +57,9 @@ disassemble (memaddr, info, insn) int bytes_read; int target_processor; -/* start-sanitize-v850e */ /* Special case: 32 bit MOV */ if ((insn & 0xffe0) == 0x0620) short_op = true; -/* end-sanitize-v850e */ bytes_read = short_op ? 2 : 4; @@ -70,15 +74,13 @@ disassemble (memaddr, info, insn) target_processor = PROCESSOR_V850; break; -/* start-sanitize-v850e */ case bfd_mach_v850e: target_processor = PROCESSOR_V850E; break; - case bfd_mach_v850eq: - target_processor = PROCESSOR_V850EQ; + case bfd_mach_v850ea: + target_processor = PROCESSOR_V850EA; break; -/* end-sanitize-v850e */ } /* Find the opcode. */ @@ -93,7 +95,7 @@ disassemble (memaddr, info, insn) match = 1; (*info->fprintf_func) (info->stream, "%s\t", op->name); -//fprintf (stderr, "match: mask: %x insn: %x, opcode: %x, name: %s\n", op->mask, insn, op->opcode, op->name ); +/*fprintf (stderr, "match: mask: %x insn: %x, opcode: %x, name: %s\n", op->mask, insn, op->opcode, op->name );*/ memop = op->memop; /* Now print the operands. @@ -175,12 +177,34 @@ disassemble (memaddr, info, insn) case V850_OPERAND_SRG: info->fprintf_func (info->stream, "%s", v850_sreg_names[value]); break; case V850_OPERAND_CC: info->fprintf_func (info->stream, "%s", v850_cc_names[value]); break; case V850_OPERAND_EP: info->fprintf_func (info->stream, "ep"); break; - case V850_OPERAND_DISP: info->print_address_func (value + memaddr, info); break; default: info->fprintf_func (info->stream, "%d", value); break; -/* start-sanitize-v850e */ + case V850_OPERAND_DISP: + { + bfd_vma addr = value + memaddr; + + /* On the v850 the top 8 bits of an address are used by an overlay manager. + Thus it may happen that when we are looking for a symbol to match + against an address with some of its top bits set, the search fails to + turn up an exact match. In this case we try to find an exact match + against a symbol in the lower address space, and if we find one, we + use that address. We only do this for JARL instructions however, as + we do not want to misinterpret branch instructions. */ + if (operand->bits == 22) + { + if ( ! info->symbol_at_address_func (addr, info) + && ((addr & 0xFF000000) != 0) + && info->symbol_at_address_func (addr & 0x00FFFFFF, info)) + { + addr &= 0x00FFFFFF; + } + } + info->print_address_func (addr, info); + break; + } + case V850E_PUSH_POP: { - static int list12_regs[32] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 }; + static int list12_regs[32] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 }; static int list18_h_regs[32] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 }; static int list18_l_regs[32] = { 3, 2, 1, -2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 }; int * regs; @@ -196,7 +220,8 @@ disassemble (memaddr, info, insn) case 0xfff8000f: regs = list18_h_regs; break; case 0xfff8001f: regs = list18_l_regs; value &= ~0x10; break; /* Do not include magic bit */ default: - fprintf (stderr, "unknown operand shift: %x\n", operand->shift ); + /* xgettext:c-format */ + fprintf (stderr, _("unknown operand shift: %x\n"), operand->shift ); abort(); } @@ -207,7 +232,8 @@ disassemble (memaddr, info, insn) switch (regs[ i ]) { default: mask |= (1 << regs[ i ]); break; - case 0: fprintf (stderr, "unknown pop reg: %d\n", i ); abort(); + /* xgettext:c-format */ + case 0: fprintf (stderr, _("unknown pop reg: %d\n"), i ); abort(); case -1: pc = true; break; case -2: sr = true; break; } @@ -291,7 +317,6 @@ disassemble (memaddr, info, insn) info->memory_error_func (status, memaddr + bytes_read, info); } break; -/* end-sanitize-v850e */ } /* Handle jmp correctly. */ @@ -328,7 +353,7 @@ print_insn_v850 (memaddr, info) { int status; bfd_byte buffer[ 4 ]; - unsigned long insn; + unsigned long insn = 0; /* First figure out how big the opcode is. */ @@ -357,5 +382,3 @@ print_insn_v850 (memaddr, info) /* Make sure we tell our caller how many bytes we consumed. */ return disassemble (memaddr, info, insn); } - -