X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2Fv850-opc.c;h=24b07fca4d63ea859b8b825db8167d9560f44aa9;hb=50d036364fb2a71b3ac9a0b0cdbe58296832a1b2;hp=473a9ef51add08469fa3fbf77656d99b65d4d411;hpb=6f2750feaf2827ef8a1a0a5b2f90c1e9a6cabbd1;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 473a9ef51a..24b07fca4d 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -1,5 +1,5 @@
 /* Assemble V850 instructions.
-   Copyright (C) 1996-2016 Free Software Foundation, Inc.
+   Copyright (C) 1996-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -693,14 +693,10 @@ extract_WIDTH_L (unsigned long insn, int * invalid)
 static unsigned long
 insert_SELID (unsigned long insn, long selid, const char ** errmsg)
 {
-  unsigned long ret;
-
-  if (selid > 0x1f || selid < 0)
+  if ((unsigned long) selid > 0x1f)
     * errmsg = _(selid_out_of_range);
 
-  ret = (insn | ((selid & 0x1f) << 27));
-
-  return ret;
+  return insn | ((selid & 0x1fUL) << 27);
 }
 
 static unsigned long
@@ -1578,11 +1574,11 @@ const struct v850_opcode v850_opcodes[] =
 { "ldacc",	two (0x07e0, 0x0bc4),	two (0x07e0, 0xffff),	{R1, R2},		0, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_EXTENSION },
 
 { "ld.b",	two (0x0700, 0x0000),	two (0x07e0, 0x0000), 	{D16, R1, R2}, 		2, PROCESSOR_ALL },
-{ "ld.b",	two (0x0780, 0x0005),	two (0x07e0, 0x000f), 	{D23, R1, R3}, 		2, PROCESSOR_V850E2_UP },
+{ "ld.b",	two (0x0780, 0x0005),	two (0xffe0, 0x000f), 	{D23, R1, R3}, 		2, PROCESSOR_V850E2_UP },
 { "ld.b23",	two (0x0780, 0x0005),	two (0x07e0, 0x000f), 	{D23, R1, R3}, 		2, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_ALIAS },
 
 { "ld.bu",	two (0x0780, 0x0001),   two (0x07c0, 0x0001), 	{D16_16, R1, R2_NOTR0},	2, PROCESSOR_NOT_V850 },
-{ "ld.bu",	two (0x07a0, 0x0005),	two (0x07e0, 0x000f), 	{D23, R1, R3}, 		2, PROCESSOR_V850E2_UP },
+{ "ld.bu",	two (0x07a0, 0x0005),	two (0xffe0, 0x000f), 	{D23, R1, R3}, 		2, PROCESSOR_V850E2_UP },
 { "ld.bu23",	two (0x07a0, 0x0005),	two (0x07e0, 0x000f), 	{D23, R1, R3}, 		2, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_ALIAS },
 
 { "ld.dw",   	two (0x07a0, 0x0009), 	two (0xffe0, 0x001f), {D23_ALIGN1, R1, R3_EVEN}, 2, PROCESSOR_V850E3V5_UP },