X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Farm%2FChangeLog;h=bd4a05ffe20fcdce0680669ac5d2e686f805280a;hb=35695fd6e5451726c124a1048a7f260f02cbcd1e;hp=92ee660146dd9e5c020f7b582b2cdfeff4a9f8ca;hpb=d4f3574e777abfa65c9ba134e582228f3f32a8d6;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 92ee660146..bd4a05ffe2 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,7 +1,651 @@ -Thu Sep 2 18:15:53 1999 Andrew Cagney +2005-01-14 Andrew Cagney + + * configure.ac: Sinclude aclocal.m4 before common.m4. Add + explicit call to AC_CONFIG_HEADER. + * configure: Regenerate. + +2005-01-12 Andrew Cagney + + * configure.ac: Update to use ../common/common.m4. + * configure: Re-generate. + +2005-01-11 Andrew Cagney + + * configure: Regenerated to track ../common/aclocal.m4 changes. + +2005-01-07 Andrew Cagney + + * configure.ac: Rename configure.in, require autoconf 2.59. + * configure: Re-generate. + +2004-12-08 Hans-Peter Nilsson + + * configure: Regenerate for ../common/aclocal.m4 update. + +2004-06-28 Andrew Cagney + + * armemu.c: Rename ui_loop_hook to deprecated_ui_loop_hook. + +2003-12-29 Mark Mitchell + + * armos.c (fcntl.h): Do not include it. + (O_RDONLY): Do not define. + (O_WRONLY): Likewise. + (O_RDWR): Likewise. + (targ-vals.h): Include it. + (translate_open_mode): Use TARGET_O_* instead of O_*. + (SWIopen): Likewise. + * Makefile.in (armos.o): Depend on targ-vals.h. + +2003-04-13 Nick Clifton + + * armvirt.c (GetWord): Only call XScale_check_memacc if in XScale + mode. + (PutWord): Likewise. + +2003-03-30 Nick Clifton + + * configure.in (CON_FLAGS): Remove. + (COPRO): Unconditionally include iwmmxt.o. + * configure: Regenerate. + * Makefile.in (CON_FLAGS): Remove. + * armcopro.c: Remove use of __IWMMXT__ flag. + * wrapper.c: Likewise. + * armemu.c: Likewise. + Add explanatory comment for suppressed code. + +2003-03-27 Nick Clifton + + * armos.c (ARMul_OsHandleSWI): Catch SWIs for unhandled vectors. + +2003-03-27 Nick Clifton + + * configure.in: (CON_FLAGS): Define and intialise. + (COPRO): Add iwmmxt.o if configuring for XScale. + * configure: Regenerate. + * Makefile.in (iwmmxt.o): Add rule to build. + (COM_FLAGS): Define. + (ALL_FLAGS): Add CON_FLAGS. + * armcopro.c (ARMul_CoProInit): Initialise iWMMXt coprocessors. + * armdefs.h (struct ARMul_State): Add 'is_iWMMXt' field. + (ARM_iWMMXt_Prop): Define. + * armemu.c (ARMul_Emulate16): Intercept iWMMXt instructions and + pass to coprocessor. + * arminit.c (ARMul_NewState): Initialise 'is_iWMMXt'. + (ARMul_Abort): Catch branches through uninitialised vectors. + * armos.c (softevtorcode): Update comment. + (ARMul_OsInit): Use ARMUndefinedInstrV. + * wrapper.c (sim_create_inferior): Handle iWMMXt processor type. + (sim_store_register): Handle iWMMXt registers. + (sim_fetch_register): Handle iWMMXt registers. + * iwmmxt.h: New file. Exported iWMMXt coprocessor emulator + functions. + * iwmmxt.c: New file: iWMMXt emulator. + +2003-03-20 Nick Clifton + + * Contribute support for Cirrus Maverick ARM co-processor, + written by Aldy Hernandez and + Andrew Cagney : + + * maverick.c: New file: Support for Maverick floating point + co-processor. + * Makefile.in: Add maverick.o target. + * configure.in (COPRO): Add maverick.o. + * configure: Regenerate. + * armcopro.c (ARMul_CoProInit): Only initialise co-processors + available on target processor. Add code to initialse Maverick + co-processor support code. + * armdefs.h (ARMul_state): Add is_ep9312 field. + (ARM_ep9312_Prop): Define. + * armemu.h: Add prototypes for Maverick co-processor + functions. + * arminit.c (ARMul_SelectProcessor): Initialise the + co-processor support once the chip has been selected. + * wrapper.c: Add support for Maverick co-processor. + (init): Do not call ARMul_CoProInit. Delays this until the + chip has been selected. + +2003-03-02 Nick Clifton + + * armos.c (SWIWrite0): Catch big-endian bug when printing + characters. + +2003-02-27 Andrew Cagney + + * wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd. + +2003-01-10 Ben Elliston + + * README.Cygnus: Rename from this .. + * README: .. to this. + +2002-09-27 Andrew Cagney + + * wrapper.c (sim_open): Add support for -m. + (mem_size): Reduce to 2MB. + Fix PR gdb/433. + +2002-08-15 Nick Clifton + + * armos.c (ARMul_OSHandleSWI): Catch and ignore SWIs of -1, they + can be caused by an interrupted system call being resumed by GDB. + +2002-07-05 Nick Clifton + + * armemu.c (ARMul_Emulate32): Add more tests for valid MIA, MIAPH + and MIAxy instructions. + +2002-06-21 Nick Clifton + + * armos.h (ADP_Stopped_RunTimeError): Set correct value. + +2002-06-16 Andrew Cagney + + * configure: Regenerated to track ../common/aclocal.m4 changes. + +2002-06-12 Andrew Cagney + + * Makefile.in: Update copyright. + (wrapper.o): Specify dependencies. + * wrapper.c: Include "gdb/sim-arm.h". + (sim_store_register, sim_fetch_register): Rewrite using `enum + arm_sim_regs' and a switch. + +2002-06-09 Andrew Cagney + + * wrapper.c: Include "gdb/callback.h" and "gdb/remote-sim.h". + * armos.c: Include "gdb/callback.h". + +2002-05-29 Nick Clifton + + * armcopro.c (XScale_check_memacc): Set the FSR and FAR registers + if a Data Abort is detected. + +2002-05-27 Nick Clifton + + * armvirt.c (GetWord): Only perform access checks if 'check' + is set. + (PutWord): Likewise. + * wrapper.c (sim_create_inferior): Report unknown machine + numbers. + * thumbemu.c (ARMul_ThumbDecode, Case 31): Do not set LR to pc + + 2, it has already been advanced. + +2002-05-23 Nick Clifton + + * thumbemu.c (ARMul_ThumbDecode): When decoding a BLX(1) + instruction do not add in the second bit of the base address - + this has already been accounted for. + +2002-05-21 Nick Clifton + + * armcopro.c (check_cp13_access): Allow access to register 1 when + CRm is 1. + (write_cp13_reg): Allow bit 0 of reg 1 of CRm 1 to be written to. + +2002-05-17 Nick Clifton + + * Makefile.in (SIM_TARGET_SWITCHES): Define. + * armos.c (swi_mask): Define. Initialise to supporting all + SWI emulations. + (ARMul_OSInit): For XScale targets, only support the ANGEL + SWI interface. (This is at the request if Intel). + (ARMul_OSHandleSWI): Examine swi_mask to see if a particular + SWI call should be emulated. + Do not fall through from AngelSWI_Reason_WriteC. + Propagate exit code from RedBoot Exit SWI. + * rdi-dgb.h (swi_mask): Prototype. + (SWI_MASK_DEMON, SWI_MASK_ANGEL, SWI_MASK_REDBOOT): Define. + * wrapper.c (sim_target_parse_command_line): New function. + Look for and handle --swi-support switch. + (sim_target_parse_arg_array): New function. Process an argv + array for parsing by sim_target_parse_command_line. + (sim_target_display_usage): New function. Describe syntax of + --swi-suppoort switch. + (sim_open): Add call to sim_target_parse_arg_array). + +2002-05-09 Nick Clifton + + * armos.c (ARMul_OSHandleSWI): Support the RedBoot SWI in ARM + mode and some of its system calls. + +2002-03-17 Anthony Green + + * wrapper.c (mem_size): Increase the default target memory to 8MB. + +2002-02-21 Keith Seitz + + * armos.c (SWIWrite0): Use generic host_callback mechanism + for supported OS functions "open", "close", "write", etc. + (SWIopen): Likewise. + (SWIread): Likewise. + (SWIwrite): Likewise. + (SWIflen): Likewise. + (ARMul_OSHandleSWI): Likewise. + +2002-02-05 Nick Clifton + + * wrapper.c (sim_create_inferior): Modify previous patch so that + it is only triggered for COFF format executables. + +2002-02-04 Nick Clifton + + * wrapper.c (sin_create_inferior): If a v5 architecture is + detected, assume it might be an XScale binary, since there is no + way to distinguish between the two in the COFF file format. + +2002-01-10 Nick Clifton + + * arminit.c (ARMul_Abort): Fix parameters passed to CPRead[13]. + * armemu.c (ARMul_Emulate32): Fix parameters passed to CPRead[13] + and CPRead[14]. + Fix formatting. Improve layout. + * armemu.h: Fix formatting. Improve layout. + +2002-01-09 Nick Clifton + + * wrapper.c (sim_fetch_register): If fetching more than 4 bytes + return zeroes in the other words. + General formatting tidy ups. + +2001-11-16 Ben Harris + + * Makefile.in (armemu32.o): Replace $< with autoconf recommended + $(srcdir)/.... + (armemu26.o): Ditto. + +2001-10-18 Nick Clifton + + * armemu.h (CP_ACCESS_ALLOWED): New macro. + Fix formatting. + * armcopro.c (read_cp14_reg): Make static. + (write_cp14_reg): Make static. + (check_cp13_access): Use CP_ACCESS_ALLOWED macro. + Fix formatting. + * armsupp.c (ARMul_LDC): Check CP_ACCESS_ALLOWED. + (ARMul_STC): Check CP_ACCESS_ALLOWED. + (ARMul_MCR): Check CP_ACCESS_ALLOWED. + (ARMul_MRC): Check CP_ACCESS_ALLOWED. + (ARMul_CDP): Check CP_ACCESS_ALLOWED. + Fix formatting. + * armemu.c (MCRR): Check CP_ACCESS_ALLOWED. Test Rd and Rn not + equal to 15. + (MRRC): Check CP_ACCESS_ALLOWED. Test Rd and Rn not equal to 15. + Fix formatting. + +2001-05-11 Nick Clifton + + * armemu.c (ARMul_Emulate32): Fix handling of XScale LDRD and STRD + instructions with post indexed addressing modes. + +2001-05-08 Jens-Christian Lache + + * armsupp.c (ARMul_FixCPSR): Check Mode not Bank in order to + determine rocesor mode. + +2001-04-18 matthew green + + * armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes. + (read_cp15_reg): Make non-static. + (XScale_cp15_LDC): Update for write_cp15_reg() change. + (XScale_cp15_MCR): Likewise. + (XScale_cp15_write_reg): Likewise. + (XScale_check_memacc): New function. Check for breakpoints being + activated by memory accesses. Does not support the Branch Target + Buffer. + (XScale_set_fsr_far): New function. Set FSR and FAR for XScale. + (XScale_debug_moe): New function. Set the debug Method Of Entry, + if configured. + (write_cp14_reg): Reset count counter if requested. + * armdefs.h (struct ARMul_State): New members `LastTime' and + `CP14R0_CCD' used for the timer/counters. + (ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS, + ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD, + ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2, + ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2, + ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT, + ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X, + ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT, + ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New + defines for XScale registers. + (XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype. + (ARMul_Emulate32, ARMul_Emulate26): Clean up function definition. + (ARMul_Emulate32): Handle the clock counter and hardware instruction + breakpoints. Call XScale_set_fsr_far() for software breakpoints and + software interrupts. + (LoadMult): Call XScale_set_fsr_far() for data aborts. + (LoadSMult): Likewise. + (StoreMult): Likewise. + (StoreSMult): Likewise. + * armemu.h (write_cp15_reg): Update prototype. + * arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime. + (ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13 + register 0. + * armvirt.c (GetWord): Call XScale_check_memacc(). + (PutWord): Likewise. + +2001-03-20 Nick Clifton + + * armvirt.c (ARMul_ReLoadInstr): Do not enable alignment checking + when loading unaligned thumb instructions. + +2001-03-06 Nick Clifton + + * thumbemu.c (ARMul_ThumbDecode): Delete label bo_blx2. + Compute destination address of BLX(1) instruction by + taking bit 1 from PC and not from bit 0 of the offset. + +2001-02-27 Nick Clifton + + * armvirt.c (GetWord): Add new parameter - check - to enable or + disable the alignment checking. + (PutWord): Add new parameter - check - to enable or disable the + alignment checking. + (ARMul_ReLoadInstr): Pass extra parameter to GetWord. + (ARMul_ReadWord): Pass extra parameter to GetWord. + (ARMul_WriteWord): Pass extra parameter to PutWord. + (ARMul_StoreHalfWord): Pass extra parameter to PutWord. + (ARMul_WriteByte): Pass extra parameter to GetWord. + (ARMul_SwapWord): Pass extra parameter to PutWord. + (ARMul_SafeReadByte): New Function: Read a byte but do not abort. + (ARMul_SafeWriteByte): New Function: Write a byte but do not abort. + + * armdefs.h: Add prototypes for ARMul_SafeReadByte and + ARMul_SafeWriteByte. + + * wrapper.c (sim_write): Use ARMul_SafeWriteByte. + (sim_read): Use ARMul_SafeReadByte. + + * armos.c (in_SWI_handler): Remove. + (SWIWrite0): Use ARMul_SafeReadByte. + (WriteCommandLineTo): Use ARMul_SafeWriteByte. + (SWIopen): Use ARMul_SafeReadByte. + (SWIread): Use ARMul_SafeWriteByte. + (SWIwrite): Use ARMul_SafeReadByte. + (ARMul_OSHandleSWI): Remove use of is_SWI_handler. + (ARMul_OSException): Remove use of is_SWI_handler. + +2001-02-16 Nick Clifton + + * armemu.c: Remove Prefetch abort for breakpoints. Instead set + the state to RESUME. + +2001-02-14 Nick Clifton + + * armemu.c: Add code to preserve processor mode when a prefetch + abort is signalled after processing a breakpoint. + + * wrapper.c (sim_create_inferior): Reset processor into ARM mode + for any machine type except the early ARMs. + +2001-02-13 Nick Clifton + + * armos.c (in_SWI_handler): New static variable. + (ARMul_OSHandleSWI): Set in_SWI_handler whilst emulating a SWI. + (ARMul_OSException): Ignore exceptions generated whilst emulating + a SWI. + +2001-02-12 Nick Clifton + + * armemu.h (NEGBRANCH): Fix defintion. + +2001-02-01 Nick Clifton + + * armemu.c (LoadSMult): Update base address register after + restoring register bank. + (StoreMult): Update base address register after restoring register + bank. + +2001-01-31 Nick Clifton + + * armvirt.c (PutWord): Detect installation of SWI vector. + (SWI_vector_installed): Define. + * armos.c (ARMul_OsInit): Reset SWI_vector_installed. + * armos.h (SWI_vector_installed): Declare. + * wrapper.c (SWI_vector_installed): Remove definition. + (sim_write): Remove check of SWI vector installation + +2000-12-18 Nick Clifton + + * armemu.c (ARMul_Emulate26): Fix test for StoreDouble + instruction. + +2000-12-10 Nick Clifton + + * armos.c (ARMul_OSHandleSWI): Add 0x91 as an FPE SWI. + +2000-12-07 Nick Clifton + + * armemu.c (ARMul_Emulate26): Detect double word load and + store instructions and call emulation routines. + (Handle_Load_Double): Emulate a double word load instruction. + (Handle_Store_Double): Emulate a double word store + instruction. + +2000-12-03 Nick Clifton + + * armos.c: Fix formatting. + (ARMul_OSHandleSWI): Suppress support of DEMON SWIs when in xscale + mode. + +2000-11-29 Nick Clifton + + * armdefs.h (State): Add 'v5e' and 'xscale' fields. + (ARM_v5e_Prop): Define. + (ARM_XScale_Prop): Define. + + * wrapper.c (sim_create_inferior): Select processor based on + machine number. + (SWI_vector_installed): New boolean. Set to true if the SWI + vector address is written to by the executable. + + * arminit.c (ARMul_NewState): Switch default to 32 bit mode. + (ARMul_SelectProcessor): Initialise v5e and xscale signals. + (ARMul_Abort): Fix calculation of LR address. + + * armos.c (ARMul_OSHandleSWI): If a SWI vector has been installed + and a SWI is not handled by the simulator, pass the SWI off to the + vector, otherwise issue a warning message and continue. + + * armsupp.c (ARMul_CPSRAltered): Set S bit aswell. + + * thumbemu.c: Add v5 instruction simulation. + * armemu.c: Add v5, XScale and El Segundo instruction simulation. + + * armcopro.c: Add XScale co-processor emulation. + * armemu.h: Add exported XScale co-processor functions. + +2000-09-15 Nick Clifton + + * armdefs.h: Rename StrongARM property to v4_ARM and add v5 ARM + property. Delete unnecessary processor names. + (ARM_Strong_Prop): Delete. + (STRONGARM): Delete. + (ARM_v4_Prop): Add. + (ARM_v5_Prop): Add + (State): Delete is_StrongARM boolean. Add is_v4 and is_v5 + booleans. + + * armemu.h (BUSUSEDINCPCS): Use is_v4 boolean. + (BUSUSEDINCPCN): Use is_v4 boolean. + + * arminit.c (ARMul_NewState): Initialise is_v4 and is_v5 fields. + (ARMul_SelectProcessor): Change second parameter from 'processor' + to 'properties'. Set is_v4 and is_v5 booleans in State. + + * armrdi.c: Remove use of ARM processor names. Replace with ARM + processor properties. + + * wrapper.c (sim_create_inferior): Choose properties passed to + ARMul_SelectProcessor based on machine number. + +2000-08-14 Nick Clifton + + * armemu.c (LHPOSTDOWN): Compute write back value before + performing load in case the offset register is overwritten. + (LHPOSTUP): Ditto. + +2000-07-14 Fernando Nasser + + * wrapper.c (sim_create_inferior): Fix typo in the previous patch. + +2000-07-14 Fernando Nasser + + * wrapper.c (sim_create_inferior): Reset mode to ARM when creating a + new inferior. + +2000-07-04 Alexandre Oliva + + * armvirt.c (ABORTS): Do not define. + + * armdefs.h (struct ARMul_State): Add is_StrongARM. + (ARM_Strong_Prop, STRONGARM): Define. + * arminit.c (ARMul_NewState): Reset is_StrongARM. + (ARMul_SelectProcessor): Set is_StrongARM. + * wrapper.c (sim_create_inferior): Use bfd machine type to + determine processor type to emulate. + * armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC + when emulating StrongARM. + + * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn. + + * armemu.h (INSN_SIZE): New macro. + (SET_ABORT): Save CPSR in SPSR and set LR. + * armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE. + (WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode. + * arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE. + + * armemu.c (LoadSMult): Use WriteR15() to discard the least + significant bits of PC. + + * armemu.h (WRITEDESTB): New macro. + * armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to + modify PC. Moved the existing logic... + (WriteR15Branch): ... here. New function. + (WriteR15, WriteSR15): Drop the two least significant bits. + (LoadSMult): Use WriteR15Branch() to modify PC. + (LoadMult): Use WRITEDESTB() instead of WRITEDEST(). + + * armemu.h (GETSPSR): Call ARMul_GetSPSR(). + * armsupp.c (ARMul_CPSRAltered): Zero out bits as they're + extracted from state->Cpsr, but preserve the unused bits. + (ARMul_GetCPSR): Get bits preserved in state->Cpsr. + (ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to + get the full CPSR word. + + * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New. + (SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros. + (SETPSR, SET_INTMODE, SETCC): Removed. + * armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit + mask. Use SETPSR_* to modify PSR. + (ARMul_SetCPSR): Load all bits from value. + * armemu.c (ARMul_Emulate, msr): Do not test bit mask. + + * armemu.c (ARMul_Emulate): Compute writeback value before + loading, since the offset register may be the destination + register. + + * armdefs.h (SYSTEMBANK): Define as USERBANK. + * armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases. + +2000-06-22 Alexandre Oliva + + * armemu.c (Multiply64): Fix computation of flag N. + + * armemu.c (MultiplyAdd64): Fix computation of flag N. + +2000-06-20 Alexandre Oliva + + * armemu.h (NEGBRANCH): Do not overwrite the two most significant + bits of the offset. + +2000-05-25 Nick Clifton + + * armcopro.c (MMUMCR): Only indicate mode change if a singal has + really changed. + (MMUWrite): Only indicate mode change if a singal has really + changed. + + * armdefs.h (SYSTEMMODE): Define. + (BANK_CAN_ACEESS_SPSR): Define. + + * armemu.c (ARM_Emulate26): If the mode has changed allow the PC + to advance before stopping the emulation. + + * arminit.c (ARMul_Reset): Ensure Mode field of State is set + correctly. + + * armos.c (ARMul_OSInit): Create a initial stack pointer for + System mode. + + * armsupp.c (ModeToBank): Remove unused first parameter. + Add support for System Mode. + (ARMul_GetSPSR): Use BANK_CAN_ACCESS_SPSR macro. + (ARMul_SetSPSR): Use BANK_CAN_ACCESS_SPSR macro. + (ARMul_FixSPSR): Use BANK_CAN_ACCESS_SPSR macro. + (ARMulSwitchMode): Add support for System Mode. + +Wed May 24 14:40:34 2000 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. +2000-05-23 Nick Clifton + + * wrapper.c (sim_store_register): Special handling for CPSR + register. + +2000-03-11 Philip Blundell + + * armemu.c (LoadSMult, LoadMult): Correct handling of aborts. + Patch from Allan Skillman . + +Wed Mar 22 15:24:21 2000 glen mccready + + * wrapper.c (sim_open,sim_close): Copy into myname, free myname. + +2000-02-08 Nick Clifton + + * wrapper.c: Fix compile time warning messages. + * armcopro.c: Fix compile time warning messages. + * armdefs.h: Fix compile time warning messages. + * armemu.c: Fix compile time warning messages. + * armemu.h: Fix compile time warning messages. + * armos.c: Fix compile time warning messages. + * armsupp.c: Fix compile time warning messages. + * armvirt.c: Fix compile time warning messages. + * bag.c: Fix compile time warning messages. + +2000-02-02 Bernd Schmidt + + * *.[ch]: Use indent to make readable. + +1999-11-22 Nick Clifton + + * armos.c (SWIread): Generate an error message if a huge read is + performed. + (SWIwrite): Generate an error message if a huge write is + performed. + +1999-10-27 Nick Clifton + + * thumbemu.c (ARMul_ThumbDecode): Accept 0xbebe as a thumb + breakpoint. + +1999-10-08 Ulrich Drepper + + * armos.c (SWIopen): Always pass third parameter with 0666 since + otherwise uninitialized memory gets access if the O_CREAT bit is + set and so we possibly cannot access the file afterwards. + +1999-09-29 Doug Evans + + * armos.c (SWIWrite0): Send output to stdout instead of stderr. + (ARMul_OSHandleSWI, case SWI_WriteC,AngelSWI_Reason_WriteC): Ditto. + +Thu Sep 2 18:15:53 1999 Andrew Cagney + + * configure: Regenerated to track ../common/aclocal.m4 changes. 1999-05-08 Felix Lee