X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fcommon%2Fcgen-accfp.c;h=b898de3935e61617ea93d61a93a34088f7d3c081;hb=1ce22eebea40573551c2db2e7c83951154d14c81;hp=9ce204f97a208ce74a5f21fd199407a0ee6b6bdc;hpb=dc9e099fc0eced486ae2b49455c9da113c11f4ff;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c index 9ce204f97a..b898de3935 100644 --- a/sim/common/cgen-accfp.c +++ b/sim/common/cgen-accfp.c @@ -42,10 +42,13 @@ subsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_sub (&ans, &op1, &op2); + status = sim_fpu_sub (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -58,10 +61,13 @@ mulsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_mul (&ans, &op1, &op2); + status = sim_fpu_mul (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -74,10 +80,32 @@ divsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; + + sim_fpu_32to (&op1, x); + sim_fpu_32to (&op2, y); + status = sim_fpu_div (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); + sim_fpu_to32 (&res, &ans); + + return res; +} + +static SF +remsf (CGEN_FPU* fpu, SF x, SF y) +{ + sim_fpu op1; + sim_fpu op2; + sim_fpu ans; + unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_div (&ans, &op1, &op2); + status = sim_fpu_rem (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -89,9 +117,12 @@ negsf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_neg (&ans, &op1); + status = sim_fpu_neg (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -103,9 +134,12 @@ abssf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_abs (&ans, &op1); + status = sim_fpu_abs (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -117,9 +151,12 @@ sqrtsf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_sqrt (&ans, &op1); + status = sim_fpu_sqrt (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -131,9 +168,12 @@ invsf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_inv (&ans, &op1); + status = sim_fpu_inv (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -146,10 +186,13 @@ minsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_min (&ans, &op1, &op2); + status = sim_fpu_min (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -162,10 +205,13 @@ maxsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_max (&ans, &op1, &op2); + status = sim_fpu_max (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -257,8 +303,44 @@ gesf (CGEN_FPU* fpu, SF x, SF y) return sim_fpu_is_ge (&op1, &op2); } +static int +unorderedsf (CGEN_FPU* fpu, SF x, SF y) +{ + sim_fpu op1; + sim_fpu op2; + + sim_fpu_32to (&op1, x); + sim_fpu_32to (&op2, y); + return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2); +} + + +static DF +fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x) +{ + sim_fpu op1; + unsigned64 res; + + sim_fpu_32to (&op1, x); + sim_fpu_to64 (&res, &op1); + + return res; +} + static SF -floatsisf (CGEN_FPU* fpu, SI x) +ftruncdfsf (CGEN_FPU* fpu, int how UNUSED, DF x) +{ + sim_fpu op1; + unsigned32 res; + + sim_fpu_64to (&op1, x); + sim_fpu_to32 (&res, &op1); + + return res; +} + +static SF +floatsisf (CGEN_FPU* fpu, int how UNUSED, SI x) { sim_fpu ans; unsigned32 res; @@ -269,7 +351,7 @@ floatsisf (CGEN_FPU* fpu, SI x) } static DF -floatsidf (CGEN_FPU* fpu, SI x) +floatsidf (CGEN_FPU* fpu, int how UNUSED, SI x) { sim_fpu ans; unsigned64 res; @@ -279,8 +361,19 @@ floatsidf (CGEN_FPU* fpu, SI x) return res; } +static DF +floatdidf (CGEN_FPU* fpu, int how UNUSED, DI x) +{ + sim_fpu ans; + unsigned64 res; + + sim_fpu_i64to (&ans, x, sim_fpu_round_near); + sim_fpu_to64 (&res, &ans); + return res; +} + static SF -ufloatsisf (CGEN_FPU* fpu, USI x) +ufloatsisf (CGEN_FPU* fpu, int how UNUSED, USI x) { sim_fpu ans; unsigned32 res; @@ -291,7 +384,7 @@ ufloatsisf (CGEN_FPU* fpu, USI x) } static SI -fixsfsi (CGEN_FPU* fpu, SF x) +fixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x) { sim_fpu op1; unsigned32 res; @@ -302,7 +395,7 @@ fixsfsi (CGEN_FPU* fpu, SF x) } static SI -fixdfsi (CGEN_FPU* fpu, DF x) +fixdfsi (CGEN_FPU* fpu, int how UNUSED, DF x) { sim_fpu op1; unsigned32 res; @@ -312,8 +405,19 @@ fixdfsi (CGEN_FPU* fpu, DF x) return res; } +static DI +fixdfdi (CGEN_FPU* fpu, int how UNUSED, DF x) +{ + sim_fpu op1; + unsigned64 res; + + sim_fpu_64to (&op1, x); + sim_fpu_to64i (&res, &op1, sim_fpu_round_near); + return res; +} + static USI -ufixsfsi (CGEN_FPU* fpu, SF x) +ufixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x) { sim_fpu op1; unsigned32 res; @@ -351,10 +455,13 @@ subdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_sub (&ans, &op1, &op2); + status = sim_fpu_sub (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -367,10 +474,13 @@ muldf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_mul (&ans, &op1, &op2); + status = sim_fpu_mul (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -383,24 +493,49 @@ divdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_div (&ans, &op1, &op2); + status = sim_fpu_div (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; } +static DF +remdf (CGEN_FPU* fpu, DF x, DF y) +{ + sim_fpu op1; + sim_fpu op2; + sim_fpu ans; + unsigned64 res; + sim_fpu_status status; + + sim_fpu_64to (&op1, x); + sim_fpu_64to (&op2, y); + status = sim_fpu_rem (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); + sim_fpu_to64(&res, &ans); + + return res; +} + static DF negdf (CGEN_FPU* fpu, DF x) { sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_neg (&ans, &op1); + status = sim_fpu_neg (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -412,9 +547,12 @@ absdf (CGEN_FPU* fpu, DF x) sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_abs (&ans, &op1); + status = sim_fpu_abs (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -426,9 +564,12 @@ sqrtdf (CGEN_FPU* fpu, DF x) sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_sqrt (&ans, &op1); + status = sim_fpu_sqrt (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -440,9 +581,12 @@ invdf (CGEN_FPU* fpu, DF x) sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_inv (&ans, &op1); + status = sim_fpu_inv (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -455,10 +599,13 @@ mindf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_min (&ans, &op1, &op2); + status = sim_fpu_min (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -471,10 +618,13 @@ maxdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_max (&ans, &op1, &op2); + status = sim_fpu_max (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -565,6 +715,17 @@ gedf (CGEN_FPU* fpu, DF x, DF y) sim_fpu_64to (&op2, y); return sim_fpu_is_ge (&op1, &op2); } + +static int +unordereddf (CGEN_FPU* fpu, DF x, DF y) +{ + sim_fpu op1; + sim_fpu op2; + + sim_fpu_64to (&op1, x); + sim_fpu_64to (&op2, y); + return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2); +} /* Initialize FP_OPS to use accurate library. */ @@ -586,6 +747,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error) o->subsf = subsf; o->mulsf = mulsf; o->divsf = divsf; + o->remsf = remsf; o->negsf = negsf; o->abssf = abssf; o->sqrtsf = sqrtsf; @@ -599,11 +761,13 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error) o->lesf = lesf; o->gtsf = gtsf; o->gesf = gesf; + o->unorderedsf = unorderedsf; o->adddf = adddf; o->subdf = subdf; o->muldf = muldf; o->divdf = divdf; + o->remdf = remdf; o->negdf = negdf; o->absdf = absdf; o->sqrtdf = sqrtdf; @@ -617,10 +781,15 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error) o->ledf = ledf; o->gtdf = gtdf; o->gedf = gedf; + o->unordereddf = unordereddf; + o->fextsfdf = fextsfdf; + o->ftruncdfsf = ftruncdfsf; o->floatsisf = floatsisf; o->floatsidf = floatsidf; + o->floatdidf = floatdidf; o->ufloatsisf = ufloatsisf; o->fixsfsi = fixsfsi; o->fixdfsi = fixdfsi; + o->fixdfdi = fixdfdi; o->ufixsfsi = ufixsfsi; }