X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fcommon%2Fsim-n-core.h;h=e105a2089cec87ac64313bdcd58b6801707d9d0f;hb=3061113bf336048d538241282c39baf684de31bf;hp=96910216abae73e08e94cda131eac8c50c072c67;hpb=fa803dc60f0bf01297674c41d001798e18ade4dc;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/common/sim-n-core.h b/sim/common/sim-n-core.h index 96910216ab..e105a2089c 100644 --- a/sim/common/sim-n-core.h +++ b/sim/common/sim-n-core.h @@ -1,22 +1,23 @@ -/* This file is part of the program psim. +/* The common simulator framework for GDB, the GNU Debugger. - Copyright (C) 1994-1997, Andrew Cagney + Copyright 2002-2020 Free Software Foundation, Inc. - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. + Contributed by Andrew Cagney and Red Hat. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - */ + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ #ifndef N @@ -71,13 +72,13 @@ sim_core_trace_M (sim_cpu *cpu, sim_cia cia, int line_nr, transfer_type type, - sim_core_maps map, + unsigned map, address_word addr, unsigned_M val, int nr_bytes) { - char *transfer = (type == read_transfer ? "read" : "write"); - char *direction = (type == read_transfer ? "->" : "<-"); + const char *transfer = (type == read_transfer ? "read" : "write"); + const char *direction = (type == read_transfer ? "->" : "<-"); if (TRACE_DEBUG_P (cpu)) trace_printf (CPU_STATE (cpu), cpu, "sim-n-core.h:%d: ", line_nr); @@ -86,7 +87,7 @@ sim_core_trace_M (sim_cpu *cpu, trace_printf (CPU_STATE (cpu), cpu, "%s-%d %s:0x%08lx %s 0x%08lx%08lx%08lx%08lx\n", transfer, nr_bytes, - sim_core_map_to_str (map), + map_to_str (map), (unsigned long) addr, direction, (unsigned long) V4_16 (val, 0), @@ -98,7 +99,7 @@ sim_core_trace_M (sim_cpu *cpu, trace_printf (CPU_STATE (cpu), cpu, "%s-%d %s:0x%08lx %s 0x%08lx%08lx\n", transfer, nr_bytes, - sim_core_map_to_str (map), + map_to_str (map), (unsigned long) addr, direction, (unsigned long) V4_8 (val, 0), @@ -109,7 +110,7 @@ sim_core_trace_M (sim_cpu *cpu, "%s-%d %s:0x%08lx %s 0x%08lx\n", transfer, nr_bytes, - sim_core_map_to_str (map), + map_to_str (map), (unsigned long) addr, direction, (unsigned long) val); @@ -119,7 +120,7 @@ sim_core_trace_M (sim_cpu *cpu, "%s-%d %s:0x%08lx %s 0x%04lx\n", transfer, nr_bytes, - sim_core_map_to_str (map), + map_to_str (map), (unsigned long) addr, direction, (unsigned long) val); @@ -129,7 +130,7 @@ sim_core_trace_M (sim_cpu *cpu, "%s-%d %s:0x%08lx %s 0x%02lx\n", transfer, nr_bytes, - sim_core_map_to_str (map), + map_to_str (map), (unsigned long) addr, direction, (unsigned long) val); @@ -137,7 +138,7 @@ sim_core_trace_M (sim_cpu *cpu, } #endif - + /* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */ /* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */ /* TAGS: sim_core_read_aligned_16 */ @@ -146,7 +147,7 @@ sim_core_trace_M (sim_cpu *cpu, INLINE_SIM_CORE(unsigned_M) sim_core_read_aligned_N(sim_cpu *cpu, sim_cia cia, - sim_core_maps map, + unsigned map, address_word xaddr) { sim_cpu_core *cpu_core = CPU_CORE (cpu); @@ -161,17 +162,20 @@ sim_core_read_aligned_N(sim_cpu *cpu, #endif addr = xaddr; mapping = sim_core_find_mapping (core, map, addr, N, read_transfer, 1 /*abort*/, cpu, cia); -#if (WITH_DEVICES) - if (WITH_CALLBACK_MEMORY && mapping->device != NULL) { - unsigned_M data; - if (device_io_read_buffer (mapping->device, &data, mapping->space, addr, N, cpu, cia) != N) - device_error (mapping->device, "internal error - %s - io_read_buffer should not fail", - XSTRING (sim_core_read_aligned_N)); - val = T2H_M (data); - } - else + do + { +#if (WITH_HW) + if (mapping->device != NULL) + { + unsigned_M data; + sim_cpu_hw_io_read_buffer (cpu, cia, mapping->device, &data, mapping->space, addr, N); + val = T2H_M (data); + break; + } #endif - val = T2H_M (*(unsigned_M*) sim_core_translate (mapping, addr)); + val = T2H_M (*(unsigned_M*) sim_core_translate (mapping, addr)); + } + while (0); PROFILE_COUNT_CORE (cpu, addr, N, map); if (TRACE_P (cpu, TRACE_CORE_IDX)) sim_core_trace_M (cpu, cia, __LINE__, read_transfer, map, addr, val, N); @@ -187,7 +191,7 @@ sim_core_read_aligned_N(sim_cpu *cpu, INLINE_SIM_CORE(unsigned_M) sim_core_read_unaligned_N(sim_cpu *cpu, sim_cia cia, - sim_core_maps map, + unsigned map, address_word addr) { int alignment = N - 1; @@ -237,16 +241,16 @@ sim_core_read_unaligned_N(sim_cpu *cpu, INLINE_SIM_CORE(unsigned_M) sim_core_read_misaligned_N(sim_cpu *cpu, sim_cia cia, - sim_core_maps map, + unsigned map, address_word addr) { unsigned_M val = 0; if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr, N) != N) SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr, read_transfer, sim_core_unaligned_signal); - if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER) + if (HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER) val = SWAP_M (val); - if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) + if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) val >>= (M - N) * 8; PROFILE_COUNT_CORE (cpu, addr, N, map); if (TRACE_P (cpu, TRACE_CORE_IDX)) @@ -263,7 +267,7 @@ sim_core_read_misaligned_N(sim_cpu *cpu, INLINE_SIM_CORE(void) sim_core_write_aligned_N(sim_cpu *cpu, sim_cia cia, - sim_core_maps map, + unsigned map, address_word xaddr, unsigned_M val) { @@ -278,16 +282,19 @@ sim_core_write_aligned_N(sim_cpu *cpu, #endif addr = xaddr; mapping = sim_core_find_mapping (core, map, addr, N, write_transfer, 1 /*abort*/, cpu, cia); -#if (WITH_DEVICES) - if (WITH_CALLBACK_MEMORY && mapping->device != NULL) { - unsigned_M data = H2T_M (val); - if (device_io_write_buffer (mapping->device, &data, mapping->space, addr, N, cpu, cia) != N) - device_error (mapping->device, "internal error - %s - io_write_buffer should not fail", - XSTRING (sim_core_write_aligned_N)); - } - else + do + { +#if (WITH_HW) + if (mapping->device != NULL) + { + unsigned_M data = H2T_M (val); + sim_cpu_hw_io_write_buffer (cpu, cia, mapping->device, &data, mapping->space, addr, N); + break; + } #endif - *(unsigned_M*) sim_core_translate (mapping, addr) = H2T_M (val); + *(unsigned_M*) sim_core_translate (mapping, addr) = H2T_M (val); + } + while (0); PROFILE_COUNT_CORE (cpu, addr, N, map); if (TRACE_P (cpu, TRACE_CORE_IDX)) sim_core_trace_M (cpu, cia, __LINE__, write_transfer, map, addr, val, N); @@ -302,7 +309,7 @@ sim_core_write_aligned_N(sim_cpu *cpu, INLINE_SIM_CORE(void) sim_core_write_unaligned_N(sim_cpu *cpu, sim_cia cia, - sim_core_maps map, + unsigned map, address_word addr, unsigned_M val) { @@ -354,14 +361,14 @@ sim_core_write_unaligned_N(sim_cpu *cpu, INLINE_SIM_CORE(void) sim_core_write_misaligned_N(sim_cpu *cpu, sim_cia cia, - sim_core_maps map, + unsigned map, address_word addr, unsigned_M val) { unsigned_M data = val; - if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) + if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) data <<= (M - N) * 8; - if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER) + if (HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER) data = SWAP_M (data); if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &data, addr, N) != N) SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr,