X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fcr16%2Fgencode.c;h=6d569086fa29711ba2ffb5caceb8446509cc5755;hb=761e171ad834a0d0adcd8712fde85ab1325afc3a;hp=67f95ab803baa1e829852c501e8eedecd4d06bc8;hpb=bdca5ee4bcd2fce04de6c9eabdbef8d960298e02;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/cr16/gencode.c b/sim/cr16/gencode.c
index 67f95ab803..6d569086fa 100644
--- a/sim/cr16/gencode.c
+++ b/sim/cr16/gencode.c
@@ -1,5 +1,5 @@
 /* Simulation code for the CR16 processor.
-   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Copyright (C) 2008-2015 Free Software Foundation, Inc.
    Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
 
    This file is part of GDB, the GNU debugger.
@@ -22,6 +22,7 @@
 #include <stdio.h>
 #include <ctype.h>
 #include <limits.h>
+#include <string.h>
 #include "ansidecl.h"
 #include "opcode/cr16.h"
 
@@ -43,7 +44,7 @@ main (int argc, char *argv[])
 
 
 static void
-write_header ()
+write_header (void)
 {
   int i = 0; 
 
@@ -52,9 +53,9 @@ write_header ()
 
   /* Loop over instruction table until a full match is found.  */
   for ( ; i < NUMOPCODES; i++)
-  {
-   printf("void OP_%X_%X (void);\t\t/* %s */\n",cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits), cr16_instruction[i].mnemonic);
-  }
+    printf("void OP_%lX_%X (SIM_DESC, SIM_CPU *);\t\t/* %s */\n",
+	   cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits),
+	   cr16_instruction[i].mnemonic);
 }
 
 
@@ -62,18 +63,20 @@ write_header ()
    ready to be filled out.  */
 
 static void
-write_template ()
+write_template (void)
 {
   int i = 0,j, k, flags;
 
-  printf ("#include \"cr16_sim.h\"\n");
+  printf ("#include \"sim-main.h\"\n");
   printf ("#include \"simops.h\"\n\n");
 
   for ( ; i < NUMOPCODES; i++)
     {
       if (cr16_instruction[i].size != 0)
 {
-  printf("/* %s */\nvoid\nOP_%X_%X ()\n{\n",cr16_instruction[i].mnemonic,cr16_instruction[i].match,(32 - cr16_instruction[i].match_bits));
+  printf ("/* %s */\nvoid\nOP_%lX_%X (SIM_DESC sd, SIM_CPU *cpu)\n{\n",
+	  cr16_instruction[i].mnemonic, cr16_instruction[i].match,
+	  (32 - cr16_instruction[i].match_bits));
   
   /* count operands.  */
   j = 0;
@@ -110,23 +113,25 @@ write_template ()
 long Opcodes[512];
 static int curop=0;
 
+#if 0
+static void
 check_opcodes( long op)
 {
   int i;
 
   for (i=0;i<curop;i++)
     if (Opcodes[i] == op)
-      fprintf(stderr,"DUPLICATE OPCODES: %x\n",op);
+      fprintf(stderr,"DUPLICATE OPCODES: %lx\n", op);
 }
-
+#endif
 
 static void
-write_opcodes ()
+write_opcodes (void)
 {
   int i = 0, j = 0, k;
   
   /* write out opcode table.  */
-  printf ("#include \"cr16_sim.h\"\n");
+  printf ("#include \"sim-main.h\"\n");
   printf ("#include \"simops.h\"\n\n");
   printf ("struct simops Simops[] = {\n");
   
@@ -134,7 +139,7 @@ write_opcodes ()
     {
       if (cr16_instruction[i].size != 0)
 {
-           printf ("  { \"%s\", %ld, %d, %d, %d, \"OP_%X_%X\", OP_%X_%X, ", 
+           printf ("  { \"%s\", %u, %d, %ld, %u, \"OP_%lX_%X\", OP_%lX_%X, ", 
                     cr16_instruction[i].mnemonic, cr16_instruction[i].size, 
                     cr16_instruction[i].match_bits, cr16_instruction[i].match,
                      cr16_instruction[i].flags, ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)),
@@ -170,5 +175,5 @@ write_opcodes ()
  printf ("},\n");
         }
     }
-  printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{0,0,0}},\n};\n");
+  printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{{0,0},{0,0},{0,0},{0,0}}},\n};\n");
 }