X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fcris%2FMakefile.in;h=4c7e17a95494f597c645b8dc118ff9632d73d9b2;hb=8194e927cc66e8cceb9890240ad75363b3ca6d53;hp=3bed36a03c0a27224349bbb8761c79d24cb56d68;hpb=6aba47ca06d9150c6196a374b745c2711b46e045;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index 3bed36a03c..4c7e17a954 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -1,12 +1,12 @@
 # Makefile template for Configure for the CRIS simulator, based on a mix
 # of the ones for m32r and i960.
 #
-# Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
+# Copyright (C) 2004-2016 Free Software Foundation, Inc.
 # Contributed by Axis Communications.
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
+# the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
 #
 # This program is distributed in the hope that it will be useful,
@@ -14,31 +14,22 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 #
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 ## COMMON_PRE_CONFIG_FRAG
 
 CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
 CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
 
-CONFIG_DEVICES =
-
 SIM_OBJS = \
 	$(SIM_NEW_COMMON_OBJS) \
-	sim-cpu.o \
-	sim-hload.o \
-	sim-hrw.o \
-	sim-model.o \
-	sim-reg.o \
 	cgen-utils.o cgen-trace.o cgen-scache.o \
-	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
+	cgen-run.o \
 	sim-if.o arch.o \
 	$(CRISV10F_OBJS) \
 	$(CRISV32F_OBJS) \
-	traps.o devices.o \
-	$(CONFIG_DEVICES) \
+	traps.o \
 	cris-desc.o
 
 # Extra headers included by sim-main.h.
@@ -47,7 +38,6 @@ SIM_EXTRA_DEPS = \
 	$(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
 	arch.h cpuall.h cris-sim.h cris-desc.h
 
-SIM_RUN_OBJS = nrun.o
 SIM_EXTRA_CLEAN = cris-clean
 
 # This selects the cris newlib/libgloss syscall definitions.
@@ -82,7 +72,7 @@ check: rvdummy$(EXEEXT)
 rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
 	$(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
 
-rvdummy.o: rvdummy.c config.h tconfig.h $(remote_sim_h) $(callback_h)
+rvdummy.o: rvdummy.c config.h $(remote_sim_h) $(callback_h)
 
 # CRISV10 objs
 
@@ -96,7 +86,7 @@ crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS)
 # than the apparent; some "mono" feature is work in progress)?
 mloopv10f.c engv10.h: stamp-v10fmloop
 stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh \
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -switch semcrisv10f-switch.c \
 		-cpu crisv10f -infile $(srcdir)/mloop.in
 	$(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
@@ -122,7 +112,7 @@ mloopv32f.c engv32.h: stamp-v32fmloop
 # We depend on stamp-v10fmloop to get serialization to avoid
 # racing with it for the same temporary file-names when "make -j".
 stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh \
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -switch semcrisv32f-switch.c \
 		-cpu crisv32f -infile $(srcdir)/mloop.in
 	$(SHELL) $(srcroot)/move-if-change eng.hin engv32.h