X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fcris%2FMakefile.in;h=4c7e17a95494f597c645b8dc118ff9632d73d9b2;hb=8194e927cc66e8cceb9890240ad75363b3ca6d53;hp=6f7811f8ffce1f845884740afd34f9808be1871e;hpb=086c6838fab1ebd605b03d14e4fbd7a31a86062d;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index 6f7811f8ff..4c7e17a954 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -1,7 +1,7 @@
 # Makefile template for Configure for the CRIS simulator, based on a mix
 # of the ones for m32r and i960.
 #
-# Copyright (C) 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+# Copyright (C) 2004-2016 Free Software Foundation, Inc.
 # Contributed by Axis Communications.
 #
 # This program is free software; you can redistribute it and/or modify
@@ -22,22 +22,14 @@
 CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
 CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
 
-CONFIG_DEVICES =
-
 SIM_OBJS = \
 	$(SIM_NEW_COMMON_OBJS) \
-	sim-cpu.o \
-	sim-hload.o \
-	sim-hrw.o \
-	sim-model.o \
-	sim-reg.o \
 	cgen-utils.o cgen-trace.o cgen-scache.o \
-	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
+	cgen-run.o \
 	sim-if.o arch.o \
 	$(CRISV10F_OBJS) \
 	$(CRISV32F_OBJS) \
-	traps.o devices.o \
-	$(CONFIG_DEVICES) \
+	traps.o \
 	cris-desc.o
 
 # Extra headers included by sim-main.h.
@@ -46,7 +38,6 @@ SIM_EXTRA_DEPS = \
 	$(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
 	arch.h cpuall.h cris-sim.h cris-desc.h
 
-SIM_RUN_OBJS = nrun.o
 SIM_EXTRA_CLEAN = cris-clean
 
 # This selects the cris newlib/libgloss syscall definitions.
@@ -81,7 +72,7 @@ check: rvdummy$(EXEEXT)
 rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
 	$(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
 
-rvdummy.o: rvdummy.c config.h tconfig.h $(remote_sim_h) $(callback_h)
+rvdummy.o: rvdummy.c config.h $(remote_sim_h) $(callback_h)
 
 # CRISV10 objs