X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fcris%2FMakefile.in;h=a6d9c61fb8091818ff3d87602d83ad9b5b75e773;hb=5fd104addfddb68844fb8df67be832ee98ad9888;hp=8b3b14a1f00bd1b69869f68f7449e6be34d821c5;hpb=c5a570810022466eaa5e077cd1b8aa00d74706f1;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index 8b3b14a1f0..a6d9c61fb8 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -1,7 +1,7 @@
 # Makefile template for Configure for the CRIS simulator, based on a mix
 # of the ones for m32r and i960.
 #
-# Copyright (C) 2004-2005, 2007-2012 Free Software Foundation, Inc.
+# Copyright (C) 2004-2020 Free Software Foundation, Inc.
 # Contributed by Axis Communications.
 #
 # This program is free software; you can redistribute it and/or modify
@@ -22,21 +22,14 @@
 CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
 CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
 
-CONFIG_DEVICES =
-
 SIM_OBJS = \
 	$(SIM_NEW_COMMON_OBJS) \
-	sim-cpu.o \
-	sim-hrw.o \
-	sim-model.o \
-	sim-reg.o \
 	cgen-utils.o cgen-trace.o cgen-scache.o \
-	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
+	cgen-run.o \
 	sim-if.o arch.o \
 	$(CRISV10F_OBJS) \
 	$(CRISV32F_OBJS) \
-	traps.o devices.o \
-	$(CONFIG_DEVICES) \
+	traps.o \
 	cris-desc.o
 
 # Extra headers included by sim-main.h.
@@ -45,7 +38,6 @@ SIM_EXTRA_DEPS = \
 	$(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
 	arch.h cpuall.h cris-sim.h cris-desc.h
 
-SIM_RUN_OBJS = nrun.o
 SIM_EXTRA_CLEAN = cris-clean
 
 # This selects the cris newlib/libgloss syscall definitions.
@@ -53,8 +45,6 @@ NL_TARGET = -DNL_TARGET_cris
 
 ## COMMON_POST_CONFIG_FRAG
 
-CGEN_CPU_DIR = $(CGENDIR)/../cpu
-
 arch = cris
 
 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h)
@@ -80,7 +70,7 @@ check: rvdummy$(EXEEXT)
 rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
 	$(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
 
-rvdummy.o: rvdummy.c config.h tconfig.h $(remote_sim_h) $(callback_h)
+rvdummy.o: rvdummy.c config.h $(remote_sim_h) $(callback_h)
 
 # CRISV10 objs
 
@@ -148,17 +138,17 @@ CGEN_MAINT = ; @true
 # Useful when making CGEN-generated files manually, without --enable-cgen-maint.
 stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc
 
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
 	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
-	  archfile=$(CGEN_CPU_DIR)/cris.cpu \
+	  archfile=$(CPU_DIR)/cris.cpu \
 	  FLAGS="with-scache with-profile=fn"
 	touch stamp-arch
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 
 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
-stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-	  archfile=$(CGEN_CPU_DIR)/cris.cpu \
+	  archfile=$(CPU_DIR)/cris.cpu \
 	  cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
 	sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
@@ -166,9 +156,9 @@ stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DI
 	touch stamp-v10fcpu
 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
 
-stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-	  archfile=$(CGEN_CPU_DIR)/cris.cpu \
+	  archfile=$(CPU_DIR)/cris.cpu \
 	  cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
 	sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
@@ -176,9 +166,9 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DI
 	touch stamp-v32fcpu
 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
 
-stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CPU_DIR)/cris.cpu Makefile
 	$(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
-		archfile=$(CGEN_CPU_DIR)/cris.cpu \
+		archfile=$(CPU_DIR)/cris.cpu \
 		cpu=cris mach=all
 	touch stamp-desc
 cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc