X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fcris%2Fdecodev32.c;h=ae1c3519c40b72b1ac86bdaa20c31f964e88d13c;hb=31e6ad7d640283af4c4f6b01fef9e6a4a17f1535;hp=f118915cf745e245e42bb6fa1f45d56aba4ab702;hpb=01f0fe5e0450edf168c1f612feb93cf588e4e7ea;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/cris/decodev32.c b/sim/cris/decodev32.c index f118915cf7..ae1c3519c4 100644 --- a/sim/cris/decodev32.c +++ b/sim/cris/decodev32.c @@ -2,23 +2,22 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2005 Free Software Foundation, Inc. +Copyright 1996-2013 Free Software Foundation, Inc. This file is part of the GNU simulators. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This file is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + You should have received a copy of the GNU General Public License along + with this program; if not, see . */ @@ -178,7 +177,7 @@ static const struct insn_sem crisv32f_insn_sem[] = { CRIS_INSN_DSTEP, CRISV32F_INSN_DSTEP, CRISV32F_SFMT_DSTEP }, { CRIS_INSN_ABS, CRISV32F_INSN_ABS, CRISV32F_SFMT_MOVS_B_R }, { CRIS_INSN_AND_B_R, CRISV32F_INSN_AND_B_R, CRISV32F_SFMT_AND_B_R }, - { CRIS_INSN_AND_W_R, CRISV32F_INSN_AND_W_R, CRISV32F_SFMT_AND_W_R }, + { CRIS_INSN_AND_W_R, CRISV32F_INSN_AND_W_R, CRISV32F_SFMT_AND_B_R }, { CRIS_INSN_AND_D_R, CRISV32F_INSN_AND_D_R, CRISV32F_SFMT_AND_D_R }, { CRIS_INSN_AND_M_B_M, CRISV32F_INSN_AND_M_B_M, CRISV32F_SFMT_AND_M_B_M }, { CRIS_INSN_AND_M_W_M, CRISV32F_INSN_AND_M_W_M, CRISV32F_SFMT_AND_M_W_M }, @@ -188,7 +187,7 @@ static const struct insn_sem crisv32f_insn_sem[] = { CRIS_INSN_ANDCDR, CRISV32F_INSN_ANDCDR, CRISV32F_SFMT_ANDCDR }, { CRIS_INSN_ANDQ, CRISV32F_INSN_ANDQ, CRISV32F_SFMT_ANDQ }, { CRIS_INSN_ORR_B_R, CRISV32F_INSN_ORR_B_R, CRISV32F_SFMT_AND_B_R }, - { CRIS_INSN_ORR_W_R, CRISV32F_INSN_ORR_W_R, CRISV32F_SFMT_AND_W_R }, + { CRIS_INSN_ORR_W_R, CRISV32F_INSN_ORR_W_R, CRISV32F_SFMT_AND_B_R }, { CRIS_INSN_ORR_D_R, CRISV32F_INSN_ORR_D_R, CRISV32F_SFMT_AND_D_R }, { CRIS_INSN_OR_M_B_M, CRISV32F_INSN_OR_M_B_M, CRISV32F_SFMT_AND_M_B_M }, { CRIS_INSN_OR_M_W_M, CRISV32F_INSN_OR_M_W_M, CRISV32F_SFMT_AND_M_W_M }, @@ -199,8 +198,8 @@ static const struct insn_sem crisv32f_insn_sem[] = { CRIS_INSN_ORQ, CRISV32F_INSN_ORQ, CRISV32F_SFMT_ANDQ }, { CRIS_INSN_XOR, CRISV32F_INSN_XOR, CRISV32F_SFMT_DSTEP }, { CRIS_INSN_SWAP, CRISV32F_INSN_SWAP, CRISV32F_SFMT_SWAP }, - { CRIS_INSN_ASRR_B_R, CRISV32F_INSN_ASRR_B_R, CRISV32F_SFMT_ASRR_B_R }, - { CRIS_INSN_ASRR_W_R, CRISV32F_INSN_ASRR_W_R, CRISV32F_SFMT_ASRR_B_R }, + { CRIS_INSN_ASRR_B_R, CRISV32F_INSN_ASRR_B_R, CRISV32F_SFMT_AND_B_R }, + { CRIS_INSN_ASRR_W_R, CRISV32F_INSN_ASRR_W_R, CRISV32F_SFMT_AND_B_R }, { CRIS_INSN_ASRR_D_R, CRISV32F_INSN_ASRR_D_R, CRISV32F_SFMT_AND_D_R }, { CRIS_INSN_ASRQ, CRISV32F_INSN_ASRQ, CRISV32F_SFMT_ASRQ }, { CRIS_INSN_LSRR_B_R, CRISV32F_INSN_LSRR_B_R, CRISV32F_SFMT_LSRR_B_R }, @@ -256,7 +255,8 @@ static const struct insn_sem crisv32f_insn_sem[] = { CRIS_INSN_FTAGD, CRISV32F_INSN_FTAGD, CRISV32F_SFMT_FIDXI }, }; -static const struct insn_sem crisv32f_insn_sem_invalid = { +static const struct insn_sem crisv32f_insn_sem_invalid = +{ VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY }; @@ -320,14 +320,14 @@ crisv32f_init_idesc_table (SIM_CPU *cpu) const IDESC * crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, + CGEN_INSN_WORD base_insn, ARGBUF *abuf) { /* Result of decoder. */ CRISV32F_INSN_TYPE itype; { - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; { unsigned int val = (((insn >> 4) & (255 << 0))); @@ -367,14 +367,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 15 : - if ((base_insn & 0xf00) == 0x0) - { itype = CRISV32F_INSN_BCC_B; goto extract_sfmt_bcc_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 14 : - if ((base_insn & 0xff00) == 0xe000) - { itype = CRISV32F_INSN_BA_B; goto extract_sfmt_ba_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : itype = CRISV32F_INSN_BCC_B; goto extract_sfmt_bcc_b; + case 14 : itype = CRISV32F_INSN_BA_B; goto extract_sfmt_ba_b; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -393,404 +387,122 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 28 : /* fall through */ case 29 : /* fall through */ case 30 : /* fall through */ - case 31 : - if ((base_insn & 0xf00) == 0x100) - { itype = CRISV32F_INSN_ADDOQ; goto extract_sfmt_addoq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 31 : itype = CRISV32F_INSN_ADDOQ; goto extract_sfmt_addoq; case 32 : /* fall through */ case 33 : /* fall through */ case 34 : /* fall through */ - case 35 : - if ((base_insn & 0xfc0) == 0x200) - { itype = CRISV32F_INSN_ADDQ; goto extract_sfmt_addq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 35 : itype = CRISV32F_INSN_ADDQ; goto extract_sfmt_addq; case 36 : /* fall through */ case 37 : /* fall through */ case 38 : /* fall through */ - case 39 : - if ((base_insn & 0xfc0) == 0x240) - { itype = CRISV32F_INSN_MOVEQ; goto extract_sfmt_moveq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 39 : itype = CRISV32F_INSN_MOVEQ; goto extract_sfmt_moveq; case 40 : /* fall through */ case 41 : /* fall through */ case 42 : /* fall through */ - case 43 : - if ((base_insn & 0xfc0) == 0x280) - { itype = CRISV32F_INSN_SUBQ; goto extract_sfmt_addq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 43 : itype = CRISV32F_INSN_SUBQ; goto extract_sfmt_addq; case 44 : /* fall through */ case 45 : /* fall through */ case 46 : /* fall through */ - case 47 : - if ((base_insn & 0xfc0) == 0x2c0) - { itype = CRISV32F_INSN_CMPQ; goto extract_sfmt_cmpq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 47 : itype = CRISV32F_INSN_CMPQ; goto extract_sfmt_cmpq; case 48 : /* fall through */ case 49 : /* fall through */ case 50 : /* fall through */ - case 51 : - if ((base_insn & 0xfc0) == 0x300) - { itype = CRISV32F_INSN_ANDQ; goto extract_sfmt_andq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 51 : itype = CRISV32F_INSN_ANDQ; goto extract_sfmt_andq; case 52 : /* fall through */ case 53 : /* fall through */ case 54 : /* fall through */ - case 55 : - if ((base_insn & 0xfc0) == 0x340) - { itype = CRISV32F_INSN_ORQ; goto extract_sfmt_andq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 55 : itype = CRISV32F_INSN_ORQ; goto extract_sfmt_andq; case 56 : /* fall through */ - case 57 : - if ((base_insn & 0xfe0) == 0x380) - { itype = CRISV32F_INSN_BTSTQ; goto extract_sfmt_btstq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 57 : itype = CRISV32F_INSN_BTSTQ; goto extract_sfmt_btstq; case 58 : /* fall through */ - case 59 : - if ((base_insn & 0xfe0) == 0x3a0) - { itype = CRISV32F_INSN_ASRQ; goto extract_sfmt_asrq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 59 : itype = CRISV32F_INSN_ASRQ; goto extract_sfmt_asrq; case 60 : /* fall through */ - case 61 : - if ((base_insn & 0xfe0) == 0x3c0) - { itype = CRISV32F_INSN_LSLQ; goto extract_sfmt_asrq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 61 : itype = CRISV32F_INSN_LSLQ; goto extract_sfmt_asrq; case 62 : /* fall through */ - case 63 : - if ((base_insn & 0xfe0) == 0x3e0) - { itype = CRISV32F_INSN_LSRQ; goto extract_sfmt_asrq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 64 : - if ((base_insn & 0xff0) == 0x400) - { itype = CRISV32F_INSN_ADDU_B_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 65 : - if ((base_insn & 0xff0) == 0x410) - { itype = CRISV32F_INSN_ADDU_W_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 66 : - if ((base_insn & 0xff0) == 0x420) - { itype = CRISV32F_INSN_ADDS_B_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 67 : - if ((base_insn & 0xff0) == 0x430) - { itype = CRISV32F_INSN_ADDS_W_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 68 : - if ((base_insn & 0xff0) == 0x440) - { itype = CRISV32F_INSN_MOVU_B_R; goto extract_sfmt_movs_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 69 : - if ((base_insn & 0xff0) == 0x450) - { itype = CRISV32F_INSN_MOVU_W_R; goto extract_sfmt_movs_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 70 : - if ((base_insn & 0xff0) == 0x460) - { itype = CRISV32F_INSN_MOVS_B_R; goto extract_sfmt_movs_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 71 : - if ((base_insn & 0xff0) == 0x470) - { itype = CRISV32F_INSN_MOVS_W_R; goto extract_sfmt_movs_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 72 : - if ((base_insn & 0xff0) == 0x480) - { itype = CRISV32F_INSN_SUBU_B_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 73 : - if ((base_insn & 0xff0) == 0x490) - { itype = CRISV32F_INSN_SUBU_W_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 74 : - if ((base_insn & 0xff0) == 0x4a0) - { itype = CRISV32F_INSN_SUBS_B_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 75 : - if ((base_insn & 0xff0) == 0x4b0) - { itype = CRISV32F_INSN_SUBS_W_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 76 : - if ((base_insn & 0xff0) == 0x4c0) - { itype = CRISV32F_INSN_LSLR_B_R; goto extract_sfmt_lsrr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 77 : - if ((base_insn & 0xff0) == 0x4d0) - { itype = CRISV32F_INSN_LSLR_W_R; goto extract_sfmt_lsrr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 78 : - if ((base_insn & 0xff0) == 0x4e0) - { itype = CRISV32F_INSN_LSLR_D_R; goto extract_sfmt_lsrr_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 79 : - if ((base_insn & 0xff0) == 0x4f0) - { itype = CRISV32F_INSN_BTST; goto extract_sfmt_btst; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 80 : - if ((base_insn & 0xff0) == 0x500) - { itype = CRISV32F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 81 : - if ((base_insn & 0xff0) == 0x510) - { itype = CRISV32F_INSN_ADDI_W_R; goto extract_sfmt_addi_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 82 : - if ((base_insn & 0xff0) == 0x520) - { itype = CRISV32F_INSN_ADDI_D_R; goto extract_sfmt_addi_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 83 : - if ((base_insn & 0xff0) == 0x530) - { itype = CRISV32F_INSN_SCC; goto extract_sfmt_scc; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 84 : - if ((base_insn & 0xff0) == 0x540) - { itype = CRISV32F_INSN_ADDI_ACR_B_R; goto extract_sfmt_addi_acr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 85 : - if ((base_insn & 0xff0) == 0x550) - { itype = CRISV32F_INSN_ADDI_ACR_W_R; goto extract_sfmt_addi_acr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 86 : - if ((base_insn & 0xff0) == 0x560) - { itype = CRISV32F_INSN_ADDI_ACR_D_R; goto extract_sfmt_addi_acr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 87 : - if ((base_insn & 0xff0) == 0x570) - { itype = CRISV32F_INSN_ADDC_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 88 : - if ((base_insn & 0xff0) == 0x580) - { itype = CRISV32F_INSN_NEG_B_R; goto extract_sfmt_neg_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 89 : - if ((base_insn & 0xff0) == 0x590) - { itype = CRISV32F_INSN_NEG_W_R; goto extract_sfmt_neg_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 90 : - if ((base_insn & 0xff0) == 0x5a0) - { itype = CRISV32F_INSN_NEG_D_R; goto extract_sfmt_neg_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 91 : - if ((base_insn & 0xff0) == 0x5b0) - { itype = CRISV32F_INSN_SETF; goto extract_sfmt_setf; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 92 : - if ((base_insn & 0xff0) == 0x5c0) - { itype = CRISV32F_INSN_BOUND_R_B_R; goto extract_sfmt_dstep; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 93 : - if ((base_insn & 0xff0) == 0x5d0) - { itype = CRISV32F_INSN_BOUND_R_W_R; goto extract_sfmt_dstep; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 94 : - if ((base_insn & 0xff0) == 0x5e0) - { itype = CRISV32F_INSN_BOUND_R_D_R; goto extract_sfmt_dstep; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 95 : - if ((base_insn & 0xff0) == 0x5f0) - { itype = CRISV32F_INSN_CLEARF; goto extract_sfmt_setf; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 96 : - if ((base_insn & 0xff0) == 0x600) - { itype = CRISV32F_INSN_ADD_B_R; goto extract_sfmt_add_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 97 : - if ((base_insn & 0xff0) == 0x610) - { itype = CRISV32F_INSN_ADD_W_R; goto extract_sfmt_add_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 98 : - if ((base_insn & 0xff0) == 0x620) - { itype = CRISV32F_INSN_ADD_D_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 99 : - if ((base_insn & 0xff0) == 0x630) - { itype = CRISV32F_INSN_MOVE_R_SPRV32; goto extract_sfmt_move_r_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 100 : - if ((base_insn & 0xff0) == 0x640) - { itype = CRISV32F_INSN_MOVE_B_R; goto extract_sfmt_move_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 101 : - if ((base_insn & 0xff0) == 0x650) - { itype = CRISV32F_INSN_MOVE_W_R; goto extract_sfmt_move_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 102 : - if ((base_insn & 0xff0) == 0x660) - { itype = CRISV32F_INSN_MOVE_D_R; goto extract_sfmt_move_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 103 : - if ((base_insn & 0xff0) == 0x670) - { itype = CRISV32F_INSN_MOVE_SPR_RV32; goto extract_sfmt_move_spr_rv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 104 : - if ((base_insn & 0xff0) == 0x680) - { itype = CRISV32F_INSN_SUB_B_R; goto extract_sfmt_add_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 105 : - if ((base_insn & 0xff0) == 0x690) - { itype = CRISV32F_INSN_SUB_W_R; goto extract_sfmt_add_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 106 : - if ((base_insn & 0xff0) == 0x6a0) - { itype = CRISV32F_INSN_SUB_D_R; goto extract_sfmt_add_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 107 : - if ((base_insn & 0xff0) == 0x6b0) - { itype = CRISV32F_INSN_ABS; goto extract_sfmt_movs_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 108 : - if ((base_insn & 0xff0) == 0x6c0) - { itype = CRISV32F_INSN_CMP_R_B_R; goto extract_sfmt_cmp_r_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 109 : - if ((base_insn & 0xff0) == 0x6d0) - { itype = CRISV32F_INSN_CMP_R_W_R; goto extract_sfmt_cmp_r_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 110 : - if ((base_insn & 0xff0) == 0x6e0) - { itype = CRISV32F_INSN_CMP_R_D_R; goto extract_sfmt_cmp_r_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 111 : - if ((base_insn & 0xff0) == 0x6f0) - { itype = CRISV32F_INSN_DSTEP; goto extract_sfmt_dstep; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 112 : - if ((base_insn & 0xff0) == 0x700) - { itype = CRISV32F_INSN_AND_B_R; goto extract_sfmt_and_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 113 : - if ((base_insn & 0xff0) == 0x710) - { itype = CRISV32F_INSN_AND_W_R; goto extract_sfmt_and_w_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 114 : - if ((base_insn & 0xff0) == 0x720) - { itype = CRISV32F_INSN_AND_D_R; goto extract_sfmt_and_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 115 : - if ((base_insn & 0xff0) == 0x730) - { itype = CRISV32F_INSN_LZ; goto extract_sfmt_movs_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 116 : - if ((base_insn & 0xff0) == 0x740) - { itype = CRISV32F_INSN_ORR_B_R; goto extract_sfmt_and_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 117 : - if ((base_insn & 0xff0) == 0x750) - { itype = CRISV32F_INSN_ORR_W_R; goto extract_sfmt_and_w_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 118 : - if ((base_insn & 0xff0) == 0x760) - { itype = CRISV32F_INSN_ORR_D_R; goto extract_sfmt_and_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 119 : - if ((base_insn & 0xff0) == 0x770) - { itype = CRISV32F_INSN_SWAP; goto extract_sfmt_swap; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 120 : - if ((base_insn & 0xff0) == 0x780) - { itype = CRISV32F_INSN_ASRR_B_R; goto extract_sfmt_asrr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 121 : - if ((base_insn & 0xff0) == 0x790) - { itype = CRISV32F_INSN_ASRR_W_R; goto extract_sfmt_asrr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 122 : - if ((base_insn & 0xff0) == 0x7a0) - { itype = CRISV32F_INSN_ASRR_D_R; goto extract_sfmt_and_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 123 : - if ((base_insn & 0xff0) == 0x7b0) - { itype = CRISV32F_INSN_XOR; goto extract_sfmt_dstep; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 124 : - if ((base_insn & 0xff0) == 0x7c0) - { itype = CRISV32F_INSN_LSRR_B_R; goto extract_sfmt_lsrr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 125 : - if ((base_insn & 0xff0) == 0x7d0) - { itype = CRISV32F_INSN_LSRR_W_R; goto extract_sfmt_lsrr_b_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 126 : - if ((base_insn & 0xff0) == 0x7e0) - { itype = CRISV32F_INSN_LSRR_D_R; goto extract_sfmt_lsrr_d_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 127 : - if ((base_insn & 0xff0) == 0x7f0) - { itype = CRISV32F_INSN_MCP; goto extract_sfmt_mcp; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 128 : - if ((base_insn & 0xbf0) == 0x800) - { itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 129 : - if ((base_insn & 0xbf0) == 0x810) - { itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 130 : - if ((base_insn & 0xbf0) == 0x820) - { itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 131 : - if ((base_insn & 0xbf0) == 0x830) - { itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 132 : - if ((base_insn & 0xbf0) == 0x840) - { itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 133 : - if ((base_insn & 0xbf0) == 0x850) - { itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 134 : - if ((base_insn & 0xbf0) == 0x860) - { itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 135 : - if ((base_insn & 0xbf0) == 0x870) - { itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 136 : - if ((base_insn & 0xbf0) == 0x880) - { itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 137 : - if ((base_insn & 0xbf0) == 0x890) - { itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 138 : - if ((base_insn & 0xbf0) == 0x8a0) - { itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 139 : - if ((base_insn & 0xbf0) == 0x8b0) - { itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 140 : - if ((base_insn & 0xbf0) == 0x8c0) - { itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 141 : - if ((base_insn & 0xbf0) == 0x8d0) - { itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 142 : - if ((base_insn & 0xbf0) == 0x8e0) - { itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 143 : - if ((base_insn & 0xbf0) == 0x8f0) - { itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 144 : - if ((base_insn & 0xff0) == 0x900) - { itype = CRISV32F_INSN_MULU_B; goto extract_sfmt_muls_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 145 : - if ((base_insn & 0xff0) == 0x910) - { itype = CRISV32F_INSN_MULU_W; goto extract_sfmt_muls_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 146 : - if ((base_insn & 0xff0) == 0x920) - { itype = CRISV32F_INSN_MULU_D; goto extract_sfmt_muls_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 63 : itype = CRISV32F_INSN_LSRQ; goto extract_sfmt_asrq; + case 64 : itype = CRISV32F_INSN_ADDU_B_R; goto extract_sfmt_add_d_r; + case 65 : itype = CRISV32F_INSN_ADDU_W_R; goto extract_sfmt_add_d_r; + case 66 : itype = CRISV32F_INSN_ADDS_B_R; goto extract_sfmt_add_d_r; + case 67 : itype = CRISV32F_INSN_ADDS_W_R; goto extract_sfmt_add_d_r; + case 68 : itype = CRISV32F_INSN_MOVU_B_R; goto extract_sfmt_movs_b_r; + case 69 : itype = CRISV32F_INSN_MOVU_W_R; goto extract_sfmt_movs_b_r; + case 70 : itype = CRISV32F_INSN_MOVS_B_R; goto extract_sfmt_movs_b_r; + case 71 : itype = CRISV32F_INSN_MOVS_W_R; goto extract_sfmt_movs_b_r; + case 72 : itype = CRISV32F_INSN_SUBU_B_R; goto extract_sfmt_add_d_r; + case 73 : itype = CRISV32F_INSN_SUBU_W_R; goto extract_sfmt_add_d_r; + case 74 : itype = CRISV32F_INSN_SUBS_B_R; goto extract_sfmt_add_d_r; + case 75 : itype = CRISV32F_INSN_SUBS_W_R; goto extract_sfmt_add_d_r; + case 76 : itype = CRISV32F_INSN_LSLR_B_R; goto extract_sfmt_lsrr_b_r; + case 77 : itype = CRISV32F_INSN_LSLR_W_R; goto extract_sfmt_lsrr_b_r; + case 78 : itype = CRISV32F_INSN_LSLR_D_R; goto extract_sfmt_lsrr_d_r; + case 79 : itype = CRISV32F_INSN_BTST; goto extract_sfmt_btst; + case 80 : itype = CRISV32F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r; + case 81 : itype = CRISV32F_INSN_ADDI_W_R; goto extract_sfmt_addi_b_r; + case 82 : itype = CRISV32F_INSN_ADDI_D_R; goto extract_sfmt_addi_b_r; + case 83 : itype = CRISV32F_INSN_SCC; goto extract_sfmt_scc; + case 84 : itype = CRISV32F_INSN_ADDI_ACR_B_R; goto extract_sfmt_addi_acr_b_r; + case 85 : itype = CRISV32F_INSN_ADDI_ACR_W_R; goto extract_sfmt_addi_acr_b_r; + case 86 : itype = CRISV32F_INSN_ADDI_ACR_D_R; goto extract_sfmt_addi_acr_b_r; + case 87 : itype = CRISV32F_INSN_ADDC_R; goto extract_sfmt_add_d_r; + case 88 : itype = CRISV32F_INSN_NEG_B_R; goto extract_sfmt_neg_b_r; + case 89 : itype = CRISV32F_INSN_NEG_W_R; goto extract_sfmt_neg_b_r; + case 90 : itype = CRISV32F_INSN_NEG_D_R; goto extract_sfmt_neg_d_r; + case 91 : itype = CRISV32F_INSN_SETF; goto extract_sfmt_setf; + case 92 : itype = CRISV32F_INSN_BOUND_R_B_R; goto extract_sfmt_dstep; + case 93 : itype = CRISV32F_INSN_BOUND_R_W_R; goto extract_sfmt_dstep; + case 94 : itype = CRISV32F_INSN_BOUND_R_D_R; goto extract_sfmt_dstep; + case 95 : itype = CRISV32F_INSN_CLEARF; goto extract_sfmt_setf; + case 96 : itype = CRISV32F_INSN_ADD_B_R; goto extract_sfmt_add_b_r; + case 97 : itype = CRISV32F_INSN_ADD_W_R; goto extract_sfmt_add_b_r; + case 98 : itype = CRISV32F_INSN_ADD_D_R; goto extract_sfmt_add_d_r; + case 99 : itype = CRISV32F_INSN_MOVE_R_SPRV32; goto extract_sfmt_move_r_sprv32; + case 100 : itype = CRISV32F_INSN_MOVE_B_R; goto extract_sfmt_move_b_r; + case 101 : itype = CRISV32F_INSN_MOVE_W_R; goto extract_sfmt_move_b_r; + case 102 : itype = CRISV32F_INSN_MOVE_D_R; goto extract_sfmt_move_d_r; + case 103 : itype = CRISV32F_INSN_MOVE_SPR_RV32; goto extract_sfmt_move_spr_rv32; + case 104 : itype = CRISV32F_INSN_SUB_B_R; goto extract_sfmt_add_b_r; + case 105 : itype = CRISV32F_INSN_SUB_W_R; goto extract_sfmt_add_b_r; + case 106 : itype = CRISV32F_INSN_SUB_D_R; goto extract_sfmt_add_d_r; + case 107 : itype = CRISV32F_INSN_ABS; goto extract_sfmt_movs_b_r; + case 108 : itype = CRISV32F_INSN_CMP_R_B_R; goto extract_sfmt_cmp_r_b_r; + case 109 : itype = CRISV32F_INSN_CMP_R_W_R; goto extract_sfmt_cmp_r_b_r; + case 110 : itype = CRISV32F_INSN_CMP_R_D_R; goto extract_sfmt_cmp_r_b_r; + case 111 : itype = CRISV32F_INSN_DSTEP; goto extract_sfmt_dstep; + case 112 : itype = CRISV32F_INSN_AND_B_R; goto extract_sfmt_and_b_r; + case 113 : itype = CRISV32F_INSN_AND_W_R; goto extract_sfmt_and_b_r; + case 114 : itype = CRISV32F_INSN_AND_D_R; goto extract_sfmt_and_d_r; + case 115 : itype = CRISV32F_INSN_LZ; goto extract_sfmt_movs_b_r; + case 116 : itype = CRISV32F_INSN_ORR_B_R; goto extract_sfmt_and_b_r; + case 117 : itype = CRISV32F_INSN_ORR_W_R; goto extract_sfmt_and_b_r; + case 118 : itype = CRISV32F_INSN_ORR_D_R; goto extract_sfmt_and_d_r; + case 119 : itype = CRISV32F_INSN_SWAP; goto extract_sfmt_swap; + case 120 : itype = CRISV32F_INSN_ASRR_B_R; goto extract_sfmt_and_b_r; + case 121 : itype = CRISV32F_INSN_ASRR_W_R; goto extract_sfmt_and_b_r; + case 122 : itype = CRISV32F_INSN_ASRR_D_R; goto extract_sfmt_and_d_r; + case 123 : itype = CRISV32F_INSN_XOR; goto extract_sfmt_dstep; + case 124 : itype = CRISV32F_INSN_LSRR_B_R; goto extract_sfmt_lsrr_b_r; + case 125 : itype = CRISV32F_INSN_LSRR_W_R; goto extract_sfmt_lsrr_b_r; + case 126 : itype = CRISV32F_INSN_LSRR_D_R; goto extract_sfmt_lsrr_d_r; + case 127 : itype = CRISV32F_INSN_MCP; goto extract_sfmt_mcp; + case 128 : itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; + case 129 : itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; + case 130 : itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; + case 131 : itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; + case 132 : itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; + case 133 : itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; + case 134 : itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; + case 135 : itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; + case 136 : itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; + case 137 : itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; + case 138 : itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; + case 139 : itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; + case 140 : itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; + case 141 : itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; + case 142 : itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; + case 143 : itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; + case 144 : itype = CRISV32F_INSN_MULU_B; goto extract_sfmt_muls_b; + case 145 : itype = CRISV32F_INSN_MULU_W; goto extract_sfmt_muls_b; + case 146 : itype = CRISV32F_INSN_MULU_D; goto extract_sfmt_muls_b; case 147 : { unsigned int val = (((insn >> 12) & (15 << 0))); @@ -812,10 +524,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if ((base_insn & 0xffff) == 0x5930) { itype = CRISV32F_INSN_RFN; goto extract_sfmt_rfn; } itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 14 : - if ((base_insn & 0xfff0) == 0xe930) - { itype = CRISV32F_INSN_BREAK; goto extract_sfmt_break; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_BREAK; goto extract_sfmt_break; case 15 : if ((base_insn & 0xffff) == 0xf930) { itype = CRISV32F_INSN_HALT; goto extract_sfmt_halt; } @@ -823,79 +532,28 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 148 : - if ((base_insn & 0xbf0) == 0x940) - { itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 149 : - if ((base_insn & 0xbf0) == 0x950) - { itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 150 : - if ((base_insn & 0xbf0) == 0x960) - { itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 151 : - if ((base_insn & 0xff0) == 0x970) - { itype = CRISV32F_INSN_LAPCQ; goto extract_sfmt_lapcq; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 154 : - if ((base_insn & 0xbf0) == 0x9a0) - { itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 155 : - if ((base_insn & 0xff0) == 0x9b0) - { itype = CRISV32F_INSN_JAS_R; goto extract_sfmt_jas_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 148 : itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; + case 149 : itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; + case 150 : itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; + case 151 : itype = CRISV32F_INSN_LAPCQ; goto extract_sfmt_lapcq; + case 154 : itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m; + case 155 : itype = CRISV32F_INSN_JAS_R; goto extract_sfmt_jas_r; case 159 : if ((base_insn & 0xfff) == 0x9f0) { itype = CRISV32F_INSN_JUMP_P; goto extract_sfmt_jump_p; } itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 160 : - if ((base_insn & 0xbf0) == 0xa00) - { itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 161 : - if ((base_insn & 0xbf0) == 0xa10) - { itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 162 : - if ((base_insn & 0xbf0) == 0xa20) - { itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 163 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 164 : - if ((base_insn & 0xbf0) == 0xa40) - { itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 165 : - if ((base_insn & 0xbf0) == 0xa50) - { itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 166 : - if ((base_insn & 0xbf0) == 0xa60) - { itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 160 : itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; + case 161 : itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; + case 162 : itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; + case 163 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 164 : itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; + case 165 : itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; + case 166 : itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; case 167 : /* fall through */ - case 231 : - if ((base_insn & 0xbf0) == 0xa70) - { itype = CRISV32F_INSN_MOVE_SPR_MV32; goto extract_sfmt_move_spr_mv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 168 : - if ((base_insn & 0xbf0) == 0xa80) - { itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 169 : - if ((base_insn & 0xbf0) == 0xa90) - { itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 170 : - if ((base_insn & 0xbf0) == 0xaa0) - { itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 231 : itype = CRISV32F_INSN_MOVE_SPR_MV32; goto extract_sfmt_move_spr_mv32; + case 168 : itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; + case 169 : itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; + case 170 : itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; case 171 : { unsigned int val = (((insn >> 12) & (1 << 0))); @@ -912,50 +570,17 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 172 : - if ((base_insn & 0xbf0) == 0xac0) - { itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 173 : - if ((base_insn & 0xbf0) == 0xad0) - { itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 174 : - if ((base_insn & 0xbf0) == 0xae0) - { itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 176 : - if ((base_insn & 0xbf0) == 0xb00) - { itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 177 : - if ((base_insn & 0xbf0) == 0xb10) - { itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 178 : - if ((base_insn & 0xbf0) == 0xb20) - { itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 179 : - if ((base_insn & 0xff0) == 0xb30) - { itype = CRISV32F_INSN_JASC_R; goto extract_sfmt_jasc_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 180 : - if ((base_insn & 0xbf0) == 0xb40) - { itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 181 : - if ((base_insn & 0xbf0) == 0xb50) - { itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 182 : - if ((base_insn & 0xbf0) == 0xb60) - { itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 183 : - if ((base_insn & 0xff0) == 0xb70) - { itype = CRISV32F_INSN_MOVE_R_SS; goto extract_sfmt_move_r_ss; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 172 : itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; + case 173 : itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; + case 174 : itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; + case 176 : itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; + case 177 : itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; + case 178 : itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; + case 179 : itype = CRISV32F_INSN_JASC_R; goto extract_sfmt_jasc_r; + case 180 : itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; + case 181 : itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; + case 182 : itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; + case 183 : itype = CRISV32F_INSN_MOVE_R_SS; goto extract_sfmt_move_r_ss; case 184 : /* fall through */ case 248 : if ((base_insn & 0xfbf0) == 0xb80) @@ -972,30 +597,15 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { itype = CRISV32F_INSN_TEST_M_D_M; goto extract_sfmt_test_m_d_m; } itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; case 187 : /* fall through */ - case 251 : - if ((base_insn & 0xbf0) == 0xbb0) - { itype = CRISV32F_INSN_MOVEM_M_R_V32; goto extract_sfmt_movem_m_r_v32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 251 : itype = CRISV32F_INSN_MOVEM_M_R_V32; goto extract_sfmt_movem_m_r_v32; case 188 : /* fall through */ - case 252 : - if ((base_insn & 0xbf0) == 0xbc0) - { itype = CRISV32F_INSN_MOVE_R_M_B_M; goto extract_sfmt_move_r_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 252 : itype = CRISV32F_INSN_MOVE_R_M_B_M; goto extract_sfmt_move_r_m_b_m; case 189 : /* fall through */ - case 253 : - if ((base_insn & 0xbf0) == 0xbd0) - { itype = CRISV32F_INSN_MOVE_R_M_W_M; goto extract_sfmt_move_r_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 253 : itype = CRISV32F_INSN_MOVE_R_M_W_M; goto extract_sfmt_move_r_m_w_m; case 190 : /* fall through */ - case 254 : - if ((base_insn & 0xbf0) == 0xbe0) - { itype = CRISV32F_INSN_MOVE_R_M_D_M; goto extract_sfmt_move_r_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 254 : itype = CRISV32F_INSN_MOVE_R_M_D_M; goto extract_sfmt_move_r_m_d_m; case 191 : /* fall through */ - case 255 : - if ((base_insn & 0xbf0) == 0xbf0) - { itype = CRISV32F_INSN_MOVEM_R_M_V32; goto extract_sfmt_movem_r_m_v32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 255 : itype = CRISV32F_INSN_MOVEM_R_M_V32; goto extract_sfmt_movem_r_m_v32; case 192 : { unsigned int val = (((insn >> 0) & (15 << 0))); @@ -1015,14 +625,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x800) - { itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc0f) - { itype = CRISV32F_INSN_ADDUCBR; goto extract_sfmt_addscbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; + case 15 : itype = CRISV32F_INSN_ADDUCBR; goto extract_sfmt_addscbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1045,14 +649,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x810) - { itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc1f) - { itype = CRISV32F_INSN_ADDUCWR; goto extract_sfmt_addscwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; + case 15 : itype = CRISV32F_INSN_ADDUCWR; goto extract_sfmt_addscwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1075,14 +673,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x820) - { itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc2f) - { itype = CRISV32F_INSN_ADDSCBR; goto extract_sfmt_addscbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; + case 15 : itype = CRISV32F_INSN_ADDSCBR; goto extract_sfmt_addscbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1105,14 +697,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x830) - { itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc3f) - { itype = CRISV32F_INSN_ADDSCWR; goto extract_sfmt_addscwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; + case 15 : itype = CRISV32F_INSN_ADDSCWR; goto extract_sfmt_addscwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1135,14 +721,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x840) - { itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc4f) - { itype = CRISV32F_INSN_MOVUCBR; goto extract_sfmt_movucbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; + case 15 : itype = CRISV32F_INSN_MOVUCBR; goto extract_sfmt_movucbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1165,14 +745,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x850) - { itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc5f) - { itype = CRISV32F_INSN_MOVUCWR; goto extract_sfmt_movucwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; + case 15 : itype = CRISV32F_INSN_MOVUCWR; goto extract_sfmt_movucwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1195,14 +769,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x860) - { itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc6f) - { itype = CRISV32F_INSN_MOVSCBR; goto extract_sfmt_movscbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; + case 15 : itype = CRISV32F_INSN_MOVSCBR; goto extract_sfmt_movscbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1225,14 +793,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x870) - { itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc7f) - { itype = CRISV32F_INSN_MOVSCWR; goto extract_sfmt_movscwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; + case 15 : itype = CRISV32F_INSN_MOVSCWR; goto extract_sfmt_movscwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1255,14 +817,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x880) - { itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc8f) - { itype = CRISV32F_INSN_SUBUCBR; goto extract_sfmt_addscbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; + case 15 : itype = CRISV32F_INSN_SUBUCBR; goto extract_sfmt_addscbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1285,14 +841,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x890) - { itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xc9f) - { itype = CRISV32F_INSN_SUBUCWR; goto extract_sfmt_addscwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; + case 15 : itype = CRISV32F_INSN_SUBUCWR; goto extract_sfmt_addscwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1315,14 +865,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x8a0) - { itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xcaf) - { itype = CRISV32F_INSN_SUBSCBR; goto extract_sfmt_addscbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; + case 15 : itype = CRISV32F_INSN_SUBSCBR; goto extract_sfmt_addscbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1345,14 +889,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x8b0) - { itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xcbf) - { itype = CRISV32F_INSN_SUBSCWR; goto extract_sfmt_addscwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; + case 15 : itype = CRISV32F_INSN_SUBSCWR; goto extract_sfmt_addscwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1375,14 +913,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x8c0) - { itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xccf) - { itype = CRISV32F_INSN_CMPUCBR; goto extract_sfmt_cmpucbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; + case 15 : itype = CRISV32F_INSN_CMPUCBR; goto extract_sfmt_cmpucbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1405,14 +937,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x8d0) - { itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xcdf) - { itype = CRISV32F_INSN_CMPUCWR; goto extract_sfmt_cmpucwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; + case 15 : itype = CRISV32F_INSN_CMPUCWR; goto extract_sfmt_cmpucwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1435,14 +961,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x8e0) - { itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xcef) - { itype = CRISV32F_INSN_CMPSCBR; goto extract_sfmt_cmpcbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; + case 15 : itype = CRISV32F_INSN_CMPSCBR; goto extract_sfmt_cmpcbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1465,29 +985,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x8f0) - { itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xcff) - { itype = CRISV32F_INSN_CMPSCWR; goto extract_sfmt_cmpcwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; + case 15 : itype = CRISV32F_INSN_CMPSCWR; goto extract_sfmt_cmpcwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 208 : - if ((base_insn & 0xff0) == 0xd00) - { itype = CRISV32F_INSN_MULS_B; goto extract_sfmt_muls_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 209 : - if ((base_insn & 0xff0) == 0xd10) - { itype = CRISV32F_INSN_MULS_W; goto extract_sfmt_muls_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 210 : - if ((base_insn & 0xff0) == 0xd20) - { itype = CRISV32F_INSN_MULS_D; goto extract_sfmt_muls_b; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 208 : itype = CRISV32F_INSN_MULS_B; goto extract_sfmt_muls_b; + case 209 : itype = CRISV32F_INSN_MULS_W; goto extract_sfmt_muls_b; + case 210 : itype = CRISV32F_INSN_MULS_D; goto extract_sfmt_muls_b; case 211 : { unsigned int val = (((insn >> 12) & (1 << 0))); @@ -1523,14 +1028,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x940) - { itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xd4f) - { itype = CRISV32F_INSN_ADDO_CB; goto extract_sfmt_addo_cb; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; + case 15 : itype = CRISV32F_INSN_ADDO_CB; goto extract_sfmt_addo_cb; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1553,14 +1052,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x950) - { itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xd5f) - { itype = CRISV32F_INSN_ADDO_CW; goto extract_sfmt_addo_cw; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; + case 15 : itype = CRISV32F_INSN_ADDO_CW; goto extract_sfmt_addo_cw; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1583,14 +1076,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x960) - { itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xd6f) - { itype = CRISV32F_INSN_ADDO_CD; goto extract_sfmt_addo_cd; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; + case 15 : itype = CRISV32F_INSN_ADDO_CD; goto extract_sfmt_addo_cd; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1617,14 +1104,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0x9a0) - { itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xdaf) - { itype = CRISV32F_INSN_ADDC_C; goto extract_sfmt_addcdr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m; + case 15 : itype = CRISV32F_INSN_ADDC_C; goto extract_sfmt_addcdr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1693,14 +1174,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa00) - { itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe0f) - { itype = CRISV32F_INSN_ADDCBR; goto extract_sfmt_addcbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; + case 15 : itype = CRISV32F_INSN_ADDCBR; goto extract_sfmt_addcbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1723,14 +1198,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa10) - { itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe1f) - { itype = CRISV32F_INSN_ADDCWR; goto extract_sfmt_addcwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; + case 15 : itype = CRISV32F_INSN_ADDCWR; goto extract_sfmt_addcwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1753,14 +1222,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa20) - { itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe2f) - { itype = CRISV32F_INSN_ADDCDR; goto extract_sfmt_addcdr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; + case 15 : itype = CRISV32F_INSN_ADDCDR; goto extract_sfmt_addcdr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1772,10 +1235,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 4 : /* fall through */ - case 8 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; case 2 : { unsigned int val = (((insn >> 0) & (15 << 0))); @@ -1795,14 +1255,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0x2e3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P2; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P2; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1825,14 +1279,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0x3e3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P3; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P3; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1855,14 +1303,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0x5e3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P5; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P5; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1885,14 +1327,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0x6e3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P6; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P6; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1915,14 +1351,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0x7e3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P7; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P7; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1945,14 +1375,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0x9e3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P9; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P9; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1975,14 +1399,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0xae3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P10; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P10; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2005,14 +1423,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0xbe3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P11; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P11; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2035,14 +1447,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0xce3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P12; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P12; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2065,14 +1471,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0xde3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P13; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P13; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2095,14 +1495,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0xee3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P14; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P14; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2125,14 +1519,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa30) - { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xffff) == 0xfe3f) - { itype = CRISV32F_INSN_MOVE_C_SPRV32_P15; goto extract_sfmt_move_c_sprv32_p2; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; + case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P15; goto extract_sfmt_move_c_sprv32_p2; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2158,14 +1546,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa40) - { itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe4f) - { itype = CRISV32F_INSN_MOVECBR; goto extract_sfmt_movecbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; + case 15 : itype = CRISV32F_INSN_MOVECBR; goto extract_sfmt_movecbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2188,14 +1570,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa50) - { itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe5f) - { itype = CRISV32F_INSN_MOVECWR; goto extract_sfmt_movecwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; + case 15 : itype = CRISV32F_INSN_MOVECWR; goto extract_sfmt_movecwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2218,14 +1594,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa60) - { itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe6f) - { itype = CRISV32F_INSN_MOVECDR; goto extract_sfmt_movecdr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; + case 15 : itype = CRISV32F_INSN_MOVECDR; goto extract_sfmt_movecdr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2248,14 +1618,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa80) - { itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe8f) - { itype = CRISV32F_INSN_SUBCBR; goto extract_sfmt_addcbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; + case 15 : itype = CRISV32F_INSN_SUBCBR; goto extract_sfmt_addcbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2278,14 +1642,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xa90) - { itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xe9f) - { itype = CRISV32F_INSN_SUBCWR; goto extract_sfmt_addcwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; + case 15 : itype = CRISV32F_INSN_SUBCWR; goto extract_sfmt_addcwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2308,14 +1666,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xaa0) - { itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xeaf) - { itype = CRISV32F_INSN_SUBCDR; goto extract_sfmt_addcdr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; + case 15 : itype = CRISV32F_INSN_SUBCDR; goto extract_sfmt_addcdr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2342,14 +1694,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xac0) - { itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xecf) - { itype = CRISV32F_INSN_CMPCBR; goto extract_sfmt_cmpcbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; + case 15 : itype = CRISV32F_INSN_CMPCBR; goto extract_sfmt_cmpcbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2372,14 +1718,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xad0) - { itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xedf) - { itype = CRISV32F_INSN_CMPCWR; goto extract_sfmt_cmpcwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; + case 15 : itype = CRISV32F_INSN_CMPCWR; goto extract_sfmt_cmpcwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2402,14 +1742,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xae0) - { itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xeef) - { itype = CRISV32F_INSN_CMPCDR; goto extract_sfmt_cmpcdr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; + case 15 : itype = CRISV32F_INSN_CMPCDR; goto extract_sfmt_cmpcdr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2436,14 +1770,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xb00) - { itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xf0f) - { itype = CRISV32F_INSN_ANDCBR; goto extract_sfmt_andcbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; + case 15 : itype = CRISV32F_INSN_ANDCBR; goto extract_sfmt_andcbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2466,14 +1794,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xb10) - { itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xf1f) - { itype = CRISV32F_INSN_ANDCWR; goto extract_sfmt_andcwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; + case 15 : itype = CRISV32F_INSN_ANDCWR; goto extract_sfmt_andcwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2496,14 +1818,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xb20) - { itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xf2f) - { itype = CRISV32F_INSN_ANDCDR; goto extract_sfmt_andcdr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; + case 15 : itype = CRISV32F_INSN_ANDCDR; goto extract_sfmt_andcdr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2530,14 +1846,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xb40) - { itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xf4f) - { itype = CRISV32F_INSN_ORCBR; goto extract_sfmt_andcbr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; + case 15 : itype = CRISV32F_INSN_ORCBR; goto extract_sfmt_andcbr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2560,14 +1870,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xb50) - { itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xf5f) - { itype = CRISV32F_INSN_ORCWR; goto extract_sfmt_andcwr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; + case 15 : itype = CRISV32F_INSN_ORCWR; goto extract_sfmt_andcwr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2590,21 +1894,12 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, case 11 : /* fall through */ case 12 : /* fall through */ case 13 : /* fall through */ - case 14 : - if ((base_insn & 0xbf0) == 0xb60) - { itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; - case 15 : - if ((base_insn & 0xfff) == 0xf6f) - { itype = CRISV32F_INSN_ORCDR; goto extract_sfmt_andcdr; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; + case 15 : itype = CRISV32F_INSN_ORCDR; goto extract_sfmt_andcdr; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 247 : - if ((base_insn & 0xff0) == 0xf70) - { itype = CRISV32F_INSN_MOVE_SS_R; goto extract_sfmt_move_ss_r; } - itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; + case 247 : itype = CRISV32F_INSN_MOVE_SS_R; goto extract_sfmt_move_ss_r; default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2615,7 +1910,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_empty: { const IDESC *idesc = &crisv32f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ @@ -2628,7 +1923,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -2646,7 +1941,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -2656,7 +1951,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -2674,7 +1969,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -2684,13 +1979,13 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_moveq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_moveq.f UINT f_operand2; INT f_s6; f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); - f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6); + f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6); /* Record the fields for the semantic handler. */ FLD (f_s6) = f_s6; @@ -2711,7 +2006,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -2739,7 +2034,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -2759,7 +2054,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -2769,7 +2064,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -2789,7 +2084,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -2799,7 +2094,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -2829,7 +2124,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movscbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f UINT f_operand2; INT f_indir_pc__byte; @@ -2859,7 +2154,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movscwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f UINT f_operand2; INT f_indir_pc__word; @@ -2889,7 +2184,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movucbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f UINT f_operand2; INT f_indir_pc__byte; @@ -2919,7 +2214,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movucwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f UINT f_operand2; INT f_indir_pc__word; @@ -2949,7 +2244,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addq.f UINT f_operand2; UINT f_u6; @@ -2967,7 +2262,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -2977,7 +2272,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_r_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -3005,7 +2300,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -3037,7 +2332,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -3069,7 +2364,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -3101,7 +2396,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -3131,7 +2426,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -3161,7 +2456,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -3191,13 +2486,13 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_andq.f UINT f_operand2; INT f_s6; f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); - f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6); + f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6); /* Record the fields for the semantic handler. */ FLD (f_operand2) = f_operand2; @@ -3218,7 +2513,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpucbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -3248,7 +2543,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpucwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -3278,7 +2573,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3300,7 +2595,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -3310,7 +2605,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3332,7 +2627,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -3342,7 +2637,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3364,7 +2659,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -3374,7 +2669,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3406,7 +2701,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3438,7 +2733,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_sprv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_operand1; @@ -3466,7 +2761,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_spr_rv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; UINT f_operand1; @@ -3484,7 +2779,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Ps) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rs) = FLD (f_operand1); + FLD (out_h_gr_SI_index_of__INT_Rs) = FLD (f_operand1); } #endif #undef FLD @@ -3494,7 +2789,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_sprv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_memmode; @@ -3526,7 +2821,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_c_sprv32_p2: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f INT f_indir_pc__dword; UINT f_operand2; @@ -3556,7 +2851,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_spr_mv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_memmode; @@ -3588,7 +2883,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_ss_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_operand1; @@ -3615,7 +2910,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_ss: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; UINT f_operand1; @@ -3642,7 +2937,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movem_r_m_v32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_movem_r_m_v32.f UINT f_operand2; UINT f_memmode; @@ -3690,7 +2985,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movem_m_r_v32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_movem_m_r_v32.f UINT f_operand2; UINT f_memmode; @@ -3738,7 +3033,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3757,7 +3052,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -3767,7 +3062,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3786,7 +3081,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -3796,7 +3091,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3819,7 +3114,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -3829,7 +3124,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3852,7 +3147,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -3862,7 +3157,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3885,7 +3180,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -3895,7 +3190,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -3916,7 +3211,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -3926,7 +3221,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -3947,7 +3242,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -3957,7 +3252,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcdr.f INT f_indir_pc__dword; UINT f_operand2; @@ -3978,7 +3273,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -3988,7 +3283,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_adds_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4011,7 +3306,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -4021,7 +3316,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_adds_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4044,7 +3339,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -4054,7 +3349,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addscbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -4075,7 +3370,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4085,7 +3380,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addscwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -4106,7 +3401,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4116,7 +3411,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addc_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -4139,7 +3434,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4149,7 +3444,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lapc_d: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_lapc_d.f SI f_indir_pc__dword_pcrel; UINT f_operand2; @@ -4179,7 +3474,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lapcq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_lapcq.f UINT f_operand2; SI f_qo; @@ -4206,7 +3501,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4235,7 +3530,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_neg_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4253,7 +3548,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4263,7 +3558,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_neg_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4281,7 +3576,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4291,7 +3586,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_memmode; UINT f_operand1; @@ -4319,7 +3614,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_memmode; UINT f_operand1; @@ -4347,7 +3642,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_memmode; UINT f_operand1; @@ -4375,7 +3670,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -4407,7 +3702,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -4439,7 +3734,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -4471,7 +3766,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_muls_b: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -4501,7 +3796,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mcp: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; UINT f_operand1; @@ -4520,7 +3815,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Ps) = f_operand2; FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rs) = FLD (f_operand1); + FLD (out_h_gr_SI_index_of__INT_Rs) = FLD (f_operand1); } #endif #undef FLD @@ -4530,7 +3825,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_dstep: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -4559,7 +3854,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4578,36 +3873,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_and_w_r: - { - const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addc_m.f - UINT f_operand2; - UINT f_operand1; - - f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); - f_operand1 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_operand2) = f_operand2; - FLD (f_operand1) = f_operand1; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and_w_r", "f_operand2 0x%x", 'x', f_operand2, "f_operand1 0x%x", 'x', f_operand1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rd) = f_operand2; - FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4617,7 +3883,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4636,7 +3902,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4646,7 +3912,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4669,7 +3935,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -4679,7 +3945,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4702,7 +3968,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -4712,7 +3978,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4735,7 +4001,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; FLD (out_Rs) = f_operand1; - FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); + FLD (out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd) = ((ANDIF (GET_H_INSN_PREFIXED_P (), (! (FLD (f_memmode))))) ? (FLD (f_operand1)) : (FLD (f_operand2))); } #endif #undef FLD @@ -4745,7 +4011,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -4766,7 +4032,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4776,7 +4042,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -4797,7 +4063,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4807,7 +4073,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addcdr.f INT f_indir_pc__dword; UINT f_operand2; @@ -4828,7 +4094,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4838,13 +4104,13 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_andq.f UINT f_operand2; INT f_s6; f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); - f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6); + f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6); /* Record the fields for the semantic handler. */ FLD (f_operand2) = f_operand2; @@ -4856,7 +4122,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, if (PROFILE_MODEL_P (current_cpu)) { FLD (in_Rd) = f_operand2; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4866,7 +4132,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_swap: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_operand1; @@ -4887,35 +4153,6 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (out_Rs) = f_operand1; } #endif -#undef FLD - return idesc; - } - - extract_sfmt_asrr_b_r: - { - const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addc_m.f - UINT f_operand2; - UINT f_operand1; - - f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); - f_operand1 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_operand2) = f_operand2; - FLD (f_operand1) = f_operand1; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_asrr_b_r", "f_operand2 0x%x", 'x', f_operand2, "f_operand1 0x%x", 'x', f_operand1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rd) = f_operand2; - FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); - } -#endif #undef FLD return idesc; } @@ -4923,7 +4160,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_asrq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_asrq.f UINT f_operand2; UINT f_u5; @@ -4951,7 +4188,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lsrr_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4970,7 +4207,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -4980,7 +4217,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lsrr_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4999,7 +4236,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, { FLD (in_Rd) = f_operand2; FLD (in_Rs) = f_operand1; - FLD (out_h_gr_SI_index_of__DFLT_Rd) = FLD (f_operand2); + FLD (out_h_gr_SI_index_of__INT_Rd) = FLD (f_operand2); } #endif #undef FLD @@ -5009,7 +4246,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btst: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -5037,7 +4274,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btstq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_asrq.f UINT f_operand2; UINT f_u5; @@ -5064,7 +4301,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_setf: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_setf.f UINT f_operand2; UINT f_operand1; @@ -5127,7 +4364,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rfg: { const IDESC *idesc = &crisv32f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ @@ -5167,7 +4404,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_halt: { const IDESC *idesc = &crisv32f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ @@ -5186,7 +4423,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcc_b: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_b.f UINT f_operand2; UINT f_disp9_lo; @@ -5195,7 +4432,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7); - f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1); + f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1); { SI tmp_abslo; SI tmp_absval; @@ -5222,14 +4459,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ba_b: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_b.f UINT f_disp9_lo; INT f_disp9_hi; INT f_disp9; f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7); - f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1); + f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1); { SI tmp_abslo; SI tmp_absval; @@ -5255,7 +4492,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcc_w: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_w.f SI f_indir_pc__word_pcrel; UINT f_operand2; @@ -5284,7 +4521,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ba_w: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_w.f SI f_indir_pc__word_pcrel; /* Contents of trailing part of insn. */ @@ -5310,7 +4547,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jas_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_operand1; @@ -5338,7 +4575,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jas_c: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f INT f_indir_pc__dword; UINT f_operand2; @@ -5368,7 +4605,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jump_p: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; @@ -5392,7 +4629,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bas_c: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bas_c.f SI f_indir_pc__dword_pcrel; UINT f_operand2; @@ -5422,7 +4659,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jasc_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_operand1; @@ -5450,7 +4687,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_break: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_break.f UINT f_u4; @@ -5473,7 +4710,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cb: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -5504,7 +4741,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cw: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -5535,7 +4772,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cd: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -5566,7 +4803,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_scc: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_operand1; @@ -5593,13 +4830,13 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addoq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addoq.f UINT f_operand2; INT f_s8; f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); - f_s8 = EXTRACT_LSB0_INT (insn, 16, 7, 8); + f_s8 = EXTRACT_LSB0_SINT (insn, 16, 7, 8); /* Record the fields for the semantic handler. */ FLD (f_operand2) = f_operand2; @@ -5620,7 +4857,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -5652,7 +4889,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -5684,7 +4921,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -5716,7 +4953,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cb: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -5746,7 +4983,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cw: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -5776,7 +5013,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cd: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -5806,7 +5043,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi_acr_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -5834,7 +5071,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_fidxi: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand1;