X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fd10v%2Fsimops.c;h=3c4a0af7dc9a62aae5fa31fce5e52625b3f7d847;hb=08db4a658e9a7b23cd2cb6953f33a7a7dbc486f8;hp=1af4e09a70672a5b71690e06e85de0eed0d450d8;hpb=308f64d3ac2fe556f4f2aee0fbc4e3c8af24f9f3;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index 1af4e09a70..3c4a0af7dc 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -1,13 +1,19 @@
+#include "config.h"
+
 #include <signal.h>
 #include <errno.h>
 #include <sys/types.h>
 #include <sys/stat.h>
+#ifdef HAVE_UNISTD_H
 #include <unistd.h>
+#endif
 
 #include "d10v_sim.h"
 #include "simops.h"
 #include "sys/syscall.h"
 
+extern char *strrchr ();
+
 enum op_types {
   OP_VOID,
   OP_REG,
@@ -23,37 +29,58 @@ enum op_types {
   OP_FLAG,
   OP_FLAG_OUTPUT,
   OP_CONSTANT16,
+  OP_CONSTANT8,
   OP_CONSTANT3,
   OP_CONSTANT4,
   OP_MEMREF,
   OP_MEMREF2,
   OP_POSTDEC,
   OP_POSTINC,
-  OP_PREDEC
+  OP_PREDEC,
+  OP_R2,
+  OP_R3,
+  OP_R4,
+  OP_R2R3
 };
 
 #ifdef DEBUG
-static void trace_input PARAMS ((char *name,
-				 enum op_types in1,
-				 enum op_types in2,
-				 enum op_types in3));
+static void trace_input_func PARAMS ((char *name,
+				      enum op_types in1,
+				      enum op_types in2,
+				      enum op_types in3));
+
+#define trace_input(name, in1, in2, in3) do { if (d10v_debug) trace_input_func (name, in1, in2, in3); } while (0)
 
-static void trace_output PARAMS ((enum op_types result));
+static void trace_output_func PARAMS ((enum op_types result));
+
+#define trace_output(result) do { if (d10v_debug) trace_output_func (result); } while (0)
 
 #ifndef SIZE_INSTRUCTION
-#define SIZE_INSTRUCTION 10
+#define SIZE_INSTRUCTION 8
 #endif
 
 #ifndef SIZE_OPERANDS
-#define SIZE_OPERANDS 24
+#define SIZE_OPERANDS 18
 #endif
 
 #ifndef SIZE_VALUES
 #define SIZE_VALUES 13
 #endif
 
+#ifndef SIZE_LOCATION
+#define SIZE_LOCATION 20
+#endif
+
+#ifndef SIZE_PC
+#define SIZE_PC 6
+#endif
+
+#ifndef SIZE_LINE_NUMBER
+#define SIZE_LINE_NUMBER 4
+#endif
+
 static void
-trace_input (name, in1, in2, in3)
+trace_input_func (name, in1, in2, in3)
      char *name;
      enum op_types in1;
      enum op_types in2;
@@ -62,10 +89,14 @@ trace_input (name, in1, in2, in3)
   char *comma;
   enum op_types in[3];
   int i;
-  char buf[80];
+  char buf[1024];
   char *p;
   long tmp;
   char *type;
+  const char *filename;
+  const char *functionname;
+  unsigned int linenumber;
+  bfd_vma byte_pc;
 
   if ((d10v_debug & DEBUG_TRACE) == 0)
     return;
@@ -78,13 +109,68 @@ trace_input (name, in1, in2, in3)
     case INS_RIGHT:		type = " R"; break;
     case INS_LEFT_PARALLEL:	type = "*L"; break;
     case INS_RIGHT_PARALLEL:	type = "*R"; break;
+    case INS_LEFT_COND_TEST:	type = "?L"; break;
+    case INS_RIGHT_COND_TEST:	type = "?R"; break;
+    case INS_LEFT_COND_EXE:	type = "&L"; break;
+    case INS_RIGHT_COND_EXE:	type = "&R"; break;
     case INS_LONG:		type = " B"; break;
     }
 
-  (*d10v_callback->printf_filtered) (d10v_callback,
-				     "0x%.6x %s:  %-*s",
-				     (unsigned)PC, type,
-				     SIZE_INSTRUCTION, name);
+  if ((d10v_debug & DEBUG_LINE_NUMBER) == 0)
+    (*d10v_callback->printf_filtered) (d10v_callback,
+				       "0x%.*x %s: %-*s ",
+				       SIZE_PC, (unsigned)PC,
+				       type,
+				       SIZE_INSTRUCTION, name);
+
+  else
+    {
+      buf[0] = '\0';
+      byte_pc = decode_pc ();
+      if (text && byte_pc >= text_start && byte_pc < text_end)
+	{
+	  filename = (const char *)0;
+	  functionname = (const char *)0;
+	  linenumber = 0;
+	  if (bfd_find_nearest_line (exec_bfd, text, (struct symbol_cache_entry **)0, byte_pc - text_start,
+				     &filename, &functionname, &linenumber))
+	    {
+	      p = buf;
+	      if (linenumber)
+		{
+		  sprintf (p, "#%-*d ", SIZE_LINE_NUMBER, linenumber);
+		  p += strlen (p);
+		}
+	      else
+		{
+		  sprintf (p, "%-*s ", SIZE_LINE_NUMBER+1, "---");
+		  p += SIZE_LINE_NUMBER+2;
+		}
+
+	      if (functionname)
+		{
+		  sprintf (p, "%s ", functionname);
+		  p += strlen (p);
+		}
+	      else if (filename)
+		{
+		  char *q = strrchr (filename, '/');
+		  sprintf (p, "%s ", (q) ? q+1 : filename);
+		  p += strlen (p);
+		}
+
+	      if (*p == ' ')
+		*p = '\0';
+	    }
+	}
+
+      (*d10v_callback->printf_filtered) (d10v_callback,
+					 "0x%.*x %s: %-*.*s %-*s ",
+					 SIZE_PC, (unsigned)PC,
+					 type,
+					 SIZE_LOCATION, SIZE_LOCATION, buf,
+					 SIZE_INSTRUCTION, name);
+    }
 
   in[0] = in1;
   in[1] = in2;
@@ -96,6 +182,10 @@ trace_input (name, in1, in2, in3)
       switch (in[i])
 	{
 	case OP_VOID:
+	case OP_R2:
+	case OP_R3:
+	case OP_R4:
+	case OP_R2R3:
 	  break;
 
 	case OP_REG:
@@ -129,6 +219,12 @@ trace_input (name, in1, in2, in3)
 	  comma = ",";
 	  break;
 
+	case OP_CONSTANT8:
+	  sprintf (p, "%s%d", comma, SEXT8(OP[i]));
+	  p += strlen (p);
+	  comma = ",";
+	  break;
+
 	case OP_CONSTANT4:
 	  sprintf (p, "%s%d", comma, SEXT4(OP[i]));
 	  p += strlen (p);
@@ -254,6 +350,11 @@ trace_input (name, in1, in2, in3)
 						 (uint16)SEXT4(OP[i]));
 	      break;
 
+	    case OP_CONSTANT8:
+	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+						 (uint16)SEXT8(OP[i]));
+	      break;
+
 	    case OP_CONSTANT3:
 	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
 						 (uint16)SEXT3(OP[i]));
@@ -280,13 +381,38 @@ trace_input (name, in1, in2, in3)
 	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
 						 (uint16)State.regs[OP[++i]]);
 	      break;
+
+	    case OP_R2:
+	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+						 (uint16)State.regs[2]);
+	      break;
+
+	    case OP_R3:
+	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+						 (uint16)State.regs[3]);
+	      break;
+
+	    case OP_R4:
+	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+						 (uint16)State.regs[4]);
+	      break;
+
+	    case OP_R2R3:
+	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+						 (uint16)State.regs[2]);
+	      (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+						 (uint16)State.regs[3]);
+	      i++;
+	      break;
 	    }
 	}
     }
+
+  (*d10v_callback->flush_stdout) (d10v_callback);
 }
 
 static void
-trace_output (result)
+trace_output_func (result)
      enum op_types result;
 {
   if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
@@ -346,8 +472,22 @@ trace_output (result)
 	  (*d10v_callback->printf_filtered) (d10v_callback, " :: %*s F0=%d F1=%d C=%d\n", SIZE_VALUES, "",
 					     State.F0 != 0, State.F1 != 0, State.C != 0);
 	  break;
+
+	case OP_R2:
+	  (*d10v_callback->printf_filtered) (d10v_callback, " :: %*s0x%.4x F0=%d F1=%d C=%d\n", SIZE_VALUES-6, "",
+					     (uint16)State.regs[2],
+					     State.F0 != 0, State.F1 != 0, State.C != 0);
+	  break;
+
+	case OP_R2R3:
+	  (*d10v_callback->printf_filtered) (d10v_callback, " :: %*s0x%.4x%.4x F0=%d F1=%d C=%d\n", SIZE_VALUES-10, "",
+					     (uint16)State.regs[2], (uint16)State.regs[3],
+					     State.F0 != 0, State.F1 != 0, State.C != 0);
+	  break;
 	}
     }
+
+  (*d10v_callback->flush_stdout) (d10v_callback);
 }
 
 #else
@@ -465,15 +605,12 @@ void
 OP_1200 ()
 {
   uint32 tmp;
-  uint32 tmp1 = (State.regs[OP[0]]) << 16 | State.regs[OP[0]+1];
-  uint32 tmp2 = (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1];
+  uint32 a = (State.regs[OP[0]]) << 16 | State.regs[OP[0]+1];
+  uint32 b = (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1];
 
   trace_input ("add2w", OP_DREG, OP_DREG, OP_VOID);
-  tmp = tmp1 + tmp2;
-  if ( (tmp < tmp1) || (tmp < tmp2) )
-    State.C = 1;
-  else
-    State.C = 0;
+  tmp = a + b;
+  State.C = (tmp < a);
   State.regs[OP[0]] = tmp >> 16;
   State.regs[OP[0]+1] = tmp & 0xFFFF;
   trace_output (OP_DREG);
@@ -483,14 +620,11 @@ OP_1200 ()
 void
 OP_1000000 ()
 {
-  uint16 tmp = State.regs[OP[0]];
-  State.regs[OP[0]] = State.regs[OP[1]] + OP[2];
+  uint16 tmp = State.regs[OP[1]];
+  State.regs[OP[0]] = tmp + OP[2];
 
   trace_input ("add3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16);
-  if ( tmp > State.regs[OP[0]])
-    State.C = 1;
-  else
-    State.C = 0;
+  State.C = (State.regs[OP[0]] < tmp);
   trace_output (OP_REG);
 }
 
@@ -584,10 +718,13 @@ OP_17001202 ()
 void
 OP_201 ()
 {
+  uint tmp = State.regs[OP[0]];
   if (OP[1] == 0)
     OP[1] = 16;
+
   trace_input ("addi", OP_REG, OP_CONSTANT16, OP_VOID);
   State.regs[OP[0]] += OP[1];
+  State.C = (State.regs[OP[0]] < tmp);
   trace_output (OP_REG);
 }
 
@@ -622,9 +759,9 @@ OP_C01 ()
 void
 OP_4900 ()
 {
-  trace_input ("bl.s", OP_CONSTANT16, OP_VOID, OP_VOID);
+  trace_input ("bl.s", OP_CONSTANT8, OP_R2, OP_R3);
   State.regs[13] = PC+1;
-  PC += SEXT8 (OP[0]);
+  JMP( PC + SEXT8 (OP[0]));
   trace_output (OP_VOID);
 }
 
@@ -632,9 +769,9 @@ OP_4900 ()
 void
 OP_24800000 ()
 {
-  trace_input ("bl.l", OP_CONSTANT16, OP_VOID, OP_VOID);
+  trace_input ("bl.l", OP_CONSTANT16, OP_R2, OP_R3);
   State.regs[13] = PC+1;
-  PC += OP[0];
+  JMP (PC + OP[0]);
   trace_output (OP_VOID);
 }
 
@@ -651,8 +788,8 @@ OP_A01 ()
 void
 OP_4800 ()
 {
-  trace_input ("bra.s", OP_CONSTANT16, OP_VOID, OP_VOID);
-  PC += SEXT8 (OP[0]);
+  trace_input ("bra.s", OP_CONSTANT8, OP_VOID, OP_VOID);
+  JMP (PC + SEXT8 (OP[0]));
   trace_output (OP_VOID);
 }
 
@@ -661,7 +798,7 @@ void
 OP_24000000 ()
 {
   trace_input ("bra.l", OP_CONSTANT16, OP_VOID, OP_VOID);
-  PC += OP[0];
+  JMP (PC + OP[0]);
   trace_output (OP_VOID);
 }
 
@@ -669,9 +806,9 @@ OP_24000000 ()
 void
 OP_4A00 ()
 {
-  trace_input ("brf0f.s", OP_CONSTANT16, OP_VOID, OP_VOID);
+  trace_input ("brf0f.s", OP_CONSTANT8, OP_VOID, OP_VOID);
   if (State.F0 == 0)
-    PC += SEXT8 (OP[0]);
+    JMP (PC + SEXT8 (OP[0]));
   trace_output (OP_FLAG);
 }
 
@@ -681,7 +818,7 @@ OP_25000000 ()
 {
   trace_input ("brf0f.l", OP_CONSTANT16, OP_VOID, OP_VOID);
   if (State.F0 == 0)
-    PC += OP[0];
+    JMP (PC + OP[0]);
   trace_output (OP_FLAG);
 }
 
@@ -689,9 +826,9 @@ OP_25000000 ()
 void
 OP_4B00 ()
 {
-  trace_input ("brf0t.s", OP_CONSTANT16, OP_VOID, OP_VOID);
+  trace_input ("brf0t.s", OP_CONSTANT8, OP_VOID, OP_VOID);
   if (State.F0)
-    PC += SEXT8 (OP[0]);
+    JMP (PC + SEXT8 (OP[0]));
   trace_output (OP_FLAG);
 }
 
@@ -701,7 +838,7 @@ OP_25800000 ()
 {
   trace_input ("brf0t.l", OP_CONSTANT16, OP_VOID, OP_VOID);
   if (State.F0)
-    PC += OP[0];
+    JMP (PC + OP[0]);
   trace_output (OP_FLAG);
 }
 
@@ -769,7 +906,7 @@ OP_1403 ()
 {
   trace_input ("cmpeq", OP_ACCUM, OP_ACCUM, OP_VOID);
   State.F1 = State.F0;
-  State.F0 = (State.a[OP[0]] == State.a[OP[1]]) ? 1 : 0;
+  State.F0 = ((State.a[OP[0]] & MASK40) == (State.a[OP[1]] & MASK40)) ? 1 : 0;
   trace_output (OP_FLAG);
 }
 
@@ -777,9 +914,9 @@ OP_1403 ()
 void
 OP_401 ()
 {
-  trace_input ("cmpeqi.s", OP_REG, OP_CONSTANT16, OP_VOID);
+  trace_input ("cmpeqi.s", OP_REG, OP_CONSTANT4, OP_VOID);
   State.F1 = State.F0;
-  State.F0 = (State.regs[OP[0]] == SEXT4(OP[1])) ? 1 : 0;  
+  State.F0 = (State.regs[OP[0]] == (reg_t)SEXT4(OP[1])) ? 1 : 0;  
   trace_output (OP_FLAG);
 }
 
@@ -789,7 +926,7 @@ OP_2000000 ()
 {
   trace_input ("cmpeqi.l", OP_REG, OP_CONSTANT16, OP_VOID);
   State.F1 = State.F0;
-  State.F0 = (State.regs[OP[0]] == OP[1]) ? 1 : 0;  
+  State.F0 = (State.regs[OP[0]] == (reg_t)OP[1]) ? 1 : 0;  
   trace_output (OP_FLAG);
 }
 
@@ -799,7 +936,7 @@ OP_601 ()
 {
   trace_input ("cmpi.s", OP_REG, OP_CONSTANT4, OP_VOID);
   State.F1 = State.F0;
-  State.F0 = ((int16)(State.regs[OP[0]]) < SEXT4(OP[1])) ? 1 : 0;  
+  State.F0 = ((int16)(State.regs[OP[0]]) < (int16)SEXT4(OP[1])) ? 1 : 0;  
   trace_output (OP_FLAG);
 }
 
@@ -829,7 +966,7 @@ OP_23000000 ()
 {
   trace_input ("cmpui", OP_REG, OP_CONSTANT16, OP_VOID);
   State.F1 = State.F0;
-  State.F0 = (State.regs[OP[0]] < OP[1]) ? 1 : 0;  
+  State.F0 = (State.regs[OP[0]] < (reg_t)OP[1]) ? 1 : 0;  
   trace_output (OP_FLAG);
 }
 
@@ -860,7 +997,7 @@ OP_4E09 ()
 void
 OP_5F20 ()
 {
-  d10v_callback->printf_filtered(d10v_callback, "***** DBT *****  PC=%x\n",PC);
+  /* d10v_callback->printf_filtered(d10v_callback, "***** DBT *****  PC=%x\n",PC); */
   State.exception = SIGTRAP;
 }
 
@@ -987,10 +1124,9 @@ OP_15002A02 ()
   int i;
 
   trace_input ("exp", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
-  if (SEXT40(State.a[OP[1]]) >= 0)
-    tmp = State.a[OP[1]];
-  else
-    tmp = ~(State.a[OP[1]]);
+  tmp = SEXT40(State.a[OP[1]]);
+  if (tmp < 0)
+    tmp = ~tmp & MASK40;
   
   foo = 0x4000000000LL;
   for (i=1;i<25;i++)
@@ -1011,9 +1147,9 @@ OP_15002A02 ()
 void
 OP_4D00 ()
 {
-  trace_input ("jl", OP_REG, OP_VOID, OP_VOID);
+  trace_input ("jl", OP_REG, OP_R2, OP_R3);
   State.regs[13] = PC+1;
-  PC = State.regs[OP[0]]; 
+  JMP (State.regs[OP[0]]);
   trace_output (OP_VOID);
 }
 
@@ -1021,8 +1157,11 @@ OP_4D00 ()
 void
 OP_4C00 ()
 {
-  trace_input ("jmp", OP_REG, OP_VOID, OP_VOID);
-  PC = State.regs[OP[0]]; 
+  trace_input ("jmp", OP_REG,
+	       (OP[0] == 13) ? OP_R2 : OP_VOID,
+	       (OP[0] == 13) ? OP_R3 : OP_VOID);
+
+  JMP (State.regs[OP[0]]);
   trace_output (OP_VOID);
 }
 
@@ -1040,6 +1179,12 @@ void
 OP_6401 ()
 {
   trace_input ("ld", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID);
+  if ( OP[1] == 15 )
+    {
+      (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
+      State.exception = SIGILL;
+      return;
+    }
   State.regs[OP[0]] = RW (State.regs[OP[1]]);
   INC_ADDR(State.regs[OP[1]],-2);
   trace_output (OP_REG);
@@ -1068,9 +1213,10 @@ OP_6000 ()
 void
 OP_31000000 ()
 {
+  uint16 addr = State.regs[OP[2]];
   trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID);
-  State.regs[OP[0]] = RW (OP[1] + State.regs[OP[2]]);
-  State.regs[OP[0]+1] = RW (OP[1] + State.regs[OP[2]] + 2);
+  State.regs[OP[0]] = RW (OP[1] + addr);
+  State.regs[OP[0]+1] = RW (OP[1] + addr + 2);
   trace_output (OP_DREG);
 }
 
@@ -1078,9 +1224,16 @@ OP_31000000 ()
 void
 OP_6601 ()
 {
+  uint16 addr = State.regs[OP[1]];
   trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID);
-  State.regs[OP[0]] = RW (State.regs[OP[1]]);
-  State.regs[OP[0]+1] = RW (State.regs[OP[1]]+2);
+  if ( OP[1] == 15 )
+    {
+      (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
+      State.exception = SIGILL;
+      return;
+    }
+  State.regs[OP[0]] = RW (addr);
+  State.regs[OP[0]+1] = RW (addr+2);
   INC_ADDR(State.regs[OP[1]],-4);
   trace_output (OP_DREG);
 }
@@ -1089,21 +1242,23 @@ OP_6601 ()
 void
 OP_6201 ()
 {
+  uint16 addr = State.regs[OP[1]];
   trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTINC, OP_VOID);
-  State.regs[OP[0]] = RW (State.regs[OP[1]]);
-  State.regs[OP[0]+1] = RW (State.regs[OP[1]]+2);
+  State.regs[OP[0]] = RW (addr);
+  State.regs[OP[0]+1] = RW (addr+2);
   INC_ADDR(State.regs[OP[1]],4);
-  trace_output (OP_REG);
+  trace_output (OP_DREG);
 }
 
 /* ld2w */
 void
 OP_6200 ()
 {
-  trace_input ("ld", OP_REG_OUTPUT, OP_MEMREF, OP_VOID);
-  State.regs[OP[0]] = RW (State.regs[OP[1]]);
-  State.regs[OP[0]+1] = RW (State.regs[OP[1]]+2);
-  trace_output (OP_REG);
+  uint16 addr = State.regs[OP[1]];
+  trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF, OP_VOID);
+  State.regs[OP[0]] = RW (addr);
+  State.regs[OP[0]+1] = RW (addr+2);
+  trace_output (OP_DREG);
 }
 
 /* ldb */
@@ -1111,8 +1266,7 @@ void
 OP_38000000 ()
 {
   trace_input ("ldb", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID);
-  State.regs[OP[0]] = RB (OP[1] + State.regs[OP[2]]);
-  SEXT8 (State.regs[OP[0]]);
+  State.regs[OP[0]] = SEXT8 (RB (OP[1] + State.regs[OP[2]]));
   trace_output (OP_REG);
 }
 
@@ -1121,8 +1275,7 @@ void
 OP_7000 ()
 {
   trace_input ("ldb", OP_REG_OUTPUT, OP_MEMREF, OP_VOID);
-  State.regs[OP[0]] = RB (State.regs[OP[1]]);
-  SEXT8 (State.regs[OP[0]]);
+  State.regs[OP[0]] = SEXT8 (RB (State.regs[OP[1]]));
   trace_output (OP_REG);
 }
 
@@ -1139,7 +1292,7 @@ OP_4001 ()
 void
 OP_20000000 ()
 {
-  trace_input ("ldi.s", OP_REG_OUTPUT, OP_CONSTANT16, OP_VOID);
+  trace_input ("ldi.l", OP_REG_OUTPUT, OP_CONSTANT16, OP_VOID);
   State.regs[OP[0]] = OP[1];
   trace_output (OP_REG);
 }
@@ -1477,9 +1630,9 @@ OP_3E00 ()
 void
 OP_3E01 ()
 {
-  trace_input ("mv2wtac", OP_ACCUM_OUTPUT, OP_DREG, OP_VOID);
+  trace_input ("mv2wtac", OP_DREG, OP_ACCUM_OUTPUT, OP_VOID);
   State.a[OP[1]] = (SEXT16 (State.regs[OP[0]]) << 16 | State.regs[OP[0]+1]) & MASK40;
-  trace_output (OP_ACCUM);
+  trace_output (OP_ACCUM_REVERSE);
 }
 
 /* mvac */
@@ -1680,12 +1833,40 @@ void
 OP_5E00 ()
 {
   trace_input ("nop", OP_VOID, OP_VOID, OP_VOID);
-  trace_output (OP_VOID);
 
-  if (State.ins_type == INS_LEFT || State.ins_type == INS_LEFT_PARALLEL)
-    left_nops++;
-  else
-    right_nops++;
+  ins_type_counters[ (int)State.ins_type ]--;	/* don't count nops as normal instructions */
+  switch (State.ins_type)
+    {
+    default:
+      ins_type_counters[ (int)INS_UNKNOWN ]++;
+      break;
+
+    case INS_LEFT_PARALLEL:
+      /* Don't count a parallel op that includes a NOP as a true parallel op */
+      ins_type_counters[ (int)INS_RIGHT_PARALLEL ]--;
+      ins_type_counters[ (int)INS_RIGHT ]++;
+      ins_type_counters[ (int)INS_LEFT_NOPS ]++;
+      break;
+
+    case INS_LEFT:
+    case INS_LEFT_COND_EXE:
+      ins_type_counters[ (int)INS_LEFT_NOPS ]++;
+      break;
+
+    case INS_RIGHT_PARALLEL:
+      /* Don't count a parallel op that includes a NOP as a true parallel op */
+      ins_type_counters[ (int)INS_LEFT_PARALLEL ]--;
+      ins_type_counters[ (int)INS_LEFT ]++;
+      ins_type_counters[ (int)INS_RIGHT_NOPS ]++;
+      break;
+
+    case INS_RIGHT:
+    case INS_RIGHT_COND_EXE:
+      ins_type_counters[ (int)INS_RIGHT_NOPS ]++;
+      break;
+    }
+
+  trace_output (OP_VOID);
 }
 
 /* not */
@@ -1979,8 +2160,6 @@ OP_3201 ()
 void
 OP_460B ()
 {
-  uint16 tmp;
-
   trace_input ("slx", OP_REG, OP_FLAG, OP_VOID);
   State.regs[OP[0]] = (State.regs[OP[0]] << 1) | State.F0;
   trace_output (OP_REG);
@@ -2001,7 +2180,7 @@ OP_3400 ()
 {
   trace_input ("sra", OP_ACCUM, OP_REG, OP_VOID);
   if ((State.regs[OP[1]] & 31) <= 16)
-    State.a[OP[0]] >>= (State.regs[OP[1]] & 31);
+    State.a[OP[0]] = (SEXT40(State.a[OP[0]]) >> (State.regs[OP[1]] & 31)) & MASK40;
   else
     {
       (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", State.regs[OP[1]] & 31);
@@ -2029,7 +2208,7 @@ OP_3401 ()
     OP[1] = 16;
 
   trace_input ("srai", OP_ACCUM, OP_CONSTANT16, OP_VOID);
-  State.a[OP[0]] >>= OP[1];
+  State.a[OP[0]] = (SEXT40(State.a[OP[0]]) >> OP[1]) & MASK40;
   trace_output (OP_ACCUM);
 }
 
@@ -2048,7 +2227,7 @@ OP_3000 ()
 {
   trace_input ("srl", OP_ACCUM, OP_REG, OP_VOID);
   if ((State.regs[OP[1]] & 31) <= 16)
-    State.a[OP[0]] >>= (State.regs[OP[1]] & 31);
+    State.a[OP[0]] = (uint64)((State.a[OP[0]] & MASK40) >> (State.regs[OP[1]] & 31));
   else
     {
       (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", State.regs[OP[1]] & 31);
@@ -2076,7 +2255,7 @@ OP_3001 ()
     OP[1] = 16;
 
   trace_input ("srli", OP_ACCUM, OP_CONSTANT16, OP_VOID);
-  State.a[OP[0]] >>= OP[1];
+  State.a[OP[0]] = (uint64)(State.a[OP[0]] & MASK40) >> OP[1];
   trace_output (OP_ACCUM);
 }
 
@@ -2141,6 +2320,12 @@ void
 OP_6C01 ()
 {
   trace_input ("st", OP_REG, OP_POSTDEC, OP_VOID);
+  if ( OP[1] == 15 )
+    {
+      (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
+      State.exception = SIGILL;
+      return;
+    }
   SW (State.regs[OP[1]], State.regs[OP[0]]);
   INC_ADDR (State.regs[OP[1]],-2);
   trace_output (OP_VOID);
@@ -2160,7 +2345,7 @@ OP_35000000 ()
 void
 OP_6A00 ()
 {
-  trace_input ("st2w", OP_REG, OP_MEMREF, OP_VOID);
+  trace_input ("st2w", OP_DREG, OP_MEMREF, OP_VOID);
   SW (State.regs[OP[1]],   State.regs[OP[0]]);
   SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]);
   trace_output (OP_VOID);
@@ -2170,7 +2355,7 @@ OP_6A00 ()
 void
 OP_6E1F ()
 {
-  trace_input ("st2w", OP_REG, OP_PREDEC, OP_VOID);
+  trace_input ("st2w", OP_DREG, OP_PREDEC, OP_VOID);
   if ( OP[1] != 15 )
     {
       (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot pre-decrement any registers but r15 (SP).\n");
@@ -2187,7 +2372,13 @@ OP_6E1F ()
 void
 OP_6A01 ()
 {
-  trace_input ("st2w", OP_REG, OP_POSTDEC, OP_VOID);
+  trace_input ("st2w", OP_DREG, OP_POSTDEC, OP_VOID);
+  if ( OP[1] == 15 )
+    {
+      (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
+      State.exception = SIGILL;
+      return;
+    }
   SW (State.regs[OP[1]],   State.regs[OP[0]]);
   SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]);
   INC_ADDR (State.regs[OP[1]],4);
@@ -2198,7 +2389,7 @@ OP_6A01 ()
 void
 OP_6E01 ()
 {
-  trace_input ("st2w", OP_REG, OP_POSTINC, OP_VOID);
+  trace_input ("st2w", OP_DREG, OP_POSTINC, OP_VOID);
   SW (State.regs[OP[1]],   State.regs[OP[0]]);
   SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]);
   INC_ADDR (State.regs[OP[1]],-4);
@@ -2228,7 +2419,7 @@ void
 OP_5FE0 ()
 {
   trace_input ("stop", OP_VOID, OP_VOID, OP_VOID);
-  State.exception = SIGQUIT;
+  State.exception = SIG_D10V_STOP;
   trace_output (OP_VOID);
 }
 
@@ -2236,12 +2427,12 @@ OP_5FE0 ()
 void
 OP_0 ()
 {
-  int32 tmp;
+  uint16 tmp;
 
   trace_input ("sub", OP_REG, OP_REG, OP_VOID);
-  tmp = (int16)State.regs[OP[0]]- (int16)State.regs[OP[1]];
-  State.C = (tmp & 0xffff0000) ? 1 : 0;
-  State.regs[OP[0]] = tmp & 0xffff;
+  tmp = State.regs[OP[0]] - State.regs[OP[1]];
+  State.C = (tmp > State.regs[OP[0]]);
+  State.regs[OP[0]] = tmp;
   trace_output (OP_REG);
 }
 
@@ -2296,14 +2487,13 @@ OP_1003 ()
 void
 OP_1000 ()
 {
-  int64 tmp;
-  int32 a,b;
+  uint32 tmp,a,b;
 
   trace_input ("sub2w", OP_DREG, OP_DREG, OP_VOID);
-  a = (int32)((State.regs[OP[0]] << 16) | State.regs[OP[0]+1]);
-  b = (int32)((State.regs[OP[1]] << 16) | State.regs[OP[1]+1]);
+  a = (uint32)((State.regs[OP[0]] << 16) | State.regs[OP[0]+1]);
+  b = (uint32)((State.regs[OP[1]] << 16) | State.regs[OP[1]+1]);
   tmp = a-b;
-  State.C = (tmp & 0xffffffff00000000LL) ? 1 : 0;  
+  State.C = (tmp > a);
   State.regs[OP[0]] = (tmp >> 16) & 0xffff;
   State.regs[OP[0]+1] = tmp & 0xffff;
   trace_output (OP_DREG);
@@ -2399,14 +2589,14 @@ OP_17001002 ()
 void
 OP_1 ()
 {
-  int32 tmp;
+  uint16 tmp;
   if (OP[1] == 0)
     OP[1] = 16;
 
   trace_input ("subi", OP_REG, OP_CONSTANT16, OP_VOID);
-  tmp = (int16)State.regs[OP[0]] - OP[1];
-  State.C = (tmp & 0xffff0000) ? 1 : 0;
-  State.regs[OP[0]] = tmp & 0xffff;  
+  tmp = State.regs[OP[0]] - OP[1];
+  State.C = (tmp > State.regs[OP[0]]);
+  State.regs[OP[0]] = tmp;  
   trace_output (OP_REG);
 }
 
@@ -2414,57 +2604,226 @@ OP_1 ()
 void
 OP_5F00 ()
 {
-  trace_input ("trap", OP_CONSTANT16, OP_REG, OP_VOID);
+  trace_input ("trap", OP_CONSTANT4, OP_VOID, OP_VOID);
   trace_output (OP_VOID);
-  
+
   switch (OP[0])
     {
     default:
+#if 0
       (*d10v_callback->printf_filtered) (d10v_callback, "Unknown trap code %d\n", OP[0]);
       State.exception = SIGILL;
+#else
+      /* Use any other traps for batch debugging. */
+      {
+	int i;
+	static int first_time = 1;
+
+	if (first_time)
+	  {
+	    first_time = 0;
+	    (*d10v_callback->printf_filtered) (d10v_callback, "Trap  #     PC ");
+	    for (i = 0; i < 16; i++)
+	      (*d10v_callback->printf_filtered) (d10v_callback, "  %sr%d", (i > 9) ? "" : " ", i);
+	    (*d10v_callback->printf_filtered) (d10v_callback, "         a0         a1 f0 f1 c\n");
+	  }
+
+      (*d10v_callback->printf_filtered) (d10v_callback, "Trap %2d 0x%.4x:", (int)OP[0], (int)PC);
+
+      for (i = 0; i < 16; i++)
+	(*d10v_callback->printf_filtered) (d10v_callback, " %.4x", (int) State.regs[i]);
+
+      for (i = 0; i < 2; i++)
+	(*d10v_callback->printf_filtered) (d10v_callback, " %.2x%.8lx",
+					   ((int)(State.a[i] >> 32) & 0xff),
+					   ((unsigned long)State.a[i]) & 0xffffffff);
+
+      (*d10v_callback->printf_filtered) (d10v_callback, "  %d  %d %d\n",
+					 State.F0 != 0, State.F1 != 0, State.C != 0);
+      (*d10v_callback->flush_stdout) (d10v_callback);
+      break;
+#endif
 
     case 0:
       /* Trap 0 is used for simulating low-level I/O */
       {
-	int save_errno = errno;	
 	errno = 0;
 
 /* Registers passed to trap 0 */
 
-#define FUNC   State.regs[2]	/* function number, return value */
-#define PARM1  State.regs[3]	/* optional parm 1 */
-#define PARM2  State.regs[4]	/* optional parm 2 */
-#define PARM3  State.regs[5]	/* optional parm 3 */
+#define FUNC   State.regs[6]	/* function number */
+#define PARM1  State.regs[2]	/* optional parm 1 */
+#define PARM2  State.regs[3]	/* optional parm 2 */
+#define PARM3  State.regs[4]	/* optional parm 3 */
+#define PARM4  State.regs[5]	/* optional parm 3 */
 
 /* Registers set by trap 0 */
 
-#define RETVAL State.regs[2]	/* return value */
-#define RETERR State.regs[3]	/* return error code */
+#define RETVAL State.regs[2]		/* return value */
+#define RETVAL_HIGH State.regs[2]	/* return value */
+#define RETVAL_LOW  State.regs[3]	/* return value */
+#define RETERR State.regs[4]		/* return error code */
 
 /* Turn a pointer in a register into a pointer into real memory. */
 
-#define MEMPTR(x) ((char *)((x) + State.imem))
+#define MEMPTR(x) ((char *)(dmem_addr(x)))
 
 	switch (FUNC)
 	  {
 #if !defined(__GO32__) && !defined(_WIN32)
-#ifdef SYS_fork
 	  case SYS_fork:
 	    RETVAL = fork ();
+	    trace_input ("<fork>", OP_VOID, OP_VOID, OP_VOID);
+	    trace_output (OP_R2);
+	    break;
+
+	  case SYS_getpid:
+	    trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID);
+	    RETVAL = getpid ();
+	    trace_output (OP_R2);
 	    break;
+
+	  case SYS_kill:
+	    trace_input ("<kill>", OP_REG, OP_REG, OP_VOID);
+	    if (PARM1 == getpid ())
+	      {
+		trace_output (OP_VOID);
+		State.exception = PARM2;
+	      }
+	    else
+	      {
+		int os_sig = -1;
+		switch (PARM2)
+		  {
+#ifdef SIGHUP
+		  case 1: os_sig = SIGHUP;	break;
+#endif
+#ifdef SIGINT
+		  case 2: os_sig = SIGINT;	break;
+#endif
+#ifdef SIGQUIT
+		  case 3: os_sig = SIGQUIT;	break;
+#endif
+#ifdef SIGILL
+		  case 4: os_sig = SIGILL;	break;
+#endif
+#ifdef SIGTRAP
+		  case 5: os_sig = SIGTRAP;	break;
+#endif
+#ifdef SIGABRT
+		  case 6: os_sig = SIGABRT;	break;
+#elif defined(SIGIOT)
+		  case 6: os_sig = SIGIOT;	break;
+#endif
+#ifdef SIGEMT
+		  case 7: os_sig = SIGEMT;	break;
+#endif
+#ifdef SIGFPE
+		  case 8: os_sig = SIGFPE;	break;
+#endif
+#ifdef SIGKILL
+		  case 9: os_sig = SIGKILL;	break;
+#endif
+#ifdef SIGBUS
+		  case 10: os_sig = SIGBUS;	break;
+#endif
+#ifdef SIGSEGV
+		  case 11: os_sig = SIGSEGV;	break;
+#endif
+#ifdef SIGSYS
+		  case 12: os_sig = SIGSYS;	break;
+#endif
+#ifdef SIGPIPE
+		  case 13: os_sig = SIGPIPE;	break;
+#endif
+#ifdef SIGALRM
+		  case 14: os_sig = SIGALRM;	break;
+#endif
+#ifdef SIGTERM
+		  case 15: os_sig = SIGTERM;	break;
+#endif
+#ifdef SIGURG
+		  case 16: os_sig = SIGURG;	break;
+#endif
+#ifdef SIGSTOP
+		  case 17: os_sig = SIGSTOP;	break;
+#endif
+#ifdef SIGTSTP
+		  case 18: os_sig = SIGTSTP;	break;
+#endif
+#ifdef SIGCONT
+		  case 19: os_sig = SIGCONT;	break;
 #endif
-#ifdef SYS_execve
+#ifdef SIGCHLD
+		  case 20: os_sig = SIGCHLD;	break;
+#elif defined(SIGCLD)
+		  case 20: os_sig = SIGCLD;	break;
+#endif
+#ifdef SIGTTIN
+		  case 21: os_sig = SIGTTIN;	break;
+#endif
+#ifdef SIGTTOU
+		  case 22: os_sig = SIGTTOU;	break;
+#endif
+#ifdef SIGIO
+		  case 23: os_sig = SIGIO;	break;
+#elif defined (SIGPOLL)
+		  case 23: os_sig = SIGPOLL;	break;
+#endif
+#ifdef SIGXCPU
+		  case 24: os_sig = SIGXCPU;	break;
+#endif
+#ifdef SIGXFSZ
+		  case 25: os_sig = SIGXFSZ;	break;
+#endif
+#ifdef SIGVTALRM
+		  case 26: os_sig = SIGVTALRM;	break;
+#endif
+#ifdef SIGPROF
+		  case 27: os_sig = SIGPROF;	break;
+#endif
+#ifdef SIGWINCH
+		  case 28: os_sig = SIGWINCH;	break;
+#endif
+#ifdef SIGLOST
+		  case 29: os_sig = SIGLOST;	break;
+#endif
+#ifdef SIGUSR1
+		  case 30: os_sig = SIGUSR1;	break;
+#endif
+#ifdef SIGUSR2
+		  case 31: os_sig = SIGUSR2;	break;
+#endif
+		  }
+
+		if (os_sig == -1)
+		  {
+		    trace_output (OP_VOID);
+		    (*d10v_callback->printf_filtered) (d10v_callback, "Unknown signal %d\n", PARM2);
+		    (*d10v_callback->flush_stdout) (d10v_callback);
+		    State.exception = SIGILL;
+		  }
+		else
+		  {
+		    RETVAL = kill (PARM1, PARM2);
+		    trace_output (OP_R2);
+		  }
+	      }
+	    break;
+
 	  case SYS_execve:
 	    RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2),
 			     (char **)MEMPTR (PARM3));
+	    trace_input ("<execve>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_execv
+
 	  case SYS_execv:
 	    RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2), NULL);
+	    trace_input ("<execv>", OP_R2, OP_R3, OP_VOID);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_pipe
+
 	  case SYS_pipe:
 	    {
 	      reg_t buf;
@@ -2475,28 +2834,43 @@ OP_5F00 ()
 	      SW (buf, host_fd[0]);
 	      buf += sizeof(uint16);
 	      SW (buf, host_fd[1]);
+	      trace_input ("<pipe>", OP_R2, OP_VOID, OP_VOID);
+	      trace_output (OP_R2);
 	    }
 	  break;
-#endif
-#ifdef SYS_wait
+
 	  case SYS_wait:
 	    {
 	      int status;
 
 	      RETVAL = wait (&status);
-	      SW (PARM1, status);
+	      if (PARM1)
+		SW (PARM1, status);
+	      trace_input ("<wait>", OP_R2, OP_VOID, OP_VOID);
+	      trace_output (OP_R2);
 	    }
 	  break;
-#endif
+#else
+	  case SYS_getpid:
+	    trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID);
+	    RETVAL = 1;
+	    trace_output (OP_R2);
+	    break;
+
+	  case SYS_kill:
+	    trace_input ("<kill>", OP_REG, OP_REG, OP_VOID);
+	    trace_output (OP_VOID);
+	    State.exception = PARM2;
+	    break;
 #endif
 
-#ifdef SYS_read
 	  case SYS_read:
 	    RETVAL = d10v_callback->read (d10v_callback, PARM1, MEMPTR (PARM2),
 					  PARM3);
+	    trace_input ("<read>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_write
+
 	  case SYS_write:
 	    if (PARM1 == 1)
 	      RETVAL = (int)d10v_callback->write_stdout (d10v_callback,
@@ -2504,32 +2878,42 @@ OP_5F00 ()
 	    else
 	      RETVAL = (int)d10v_callback->write (d10v_callback, PARM1,
 						  MEMPTR (PARM2), PARM3);
+	    trace_input ("<write>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_lseek
+
 	  case SYS_lseek:
-	    RETVAL = d10v_callback->lseek (d10v_callback, PARM1, PARM2, PARM3);
+	    {
+	      unsigned long ret = d10v_callback->lseek (d10v_callback, PARM1,
+			(((unsigned long)PARM2) << 16) || (unsigned long)PARM3,
+			PARM4);
+	      RETVAL_HIGH = ret >> 16;
+	      RETVAL_LOW  = ret & 0xffff;
+	    }
+	    trace_input ("<lseek>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2R3);
 	    break;
-#endif
-#ifdef SYS_close
+
 	  case SYS_close:
 	    RETVAL = d10v_callback->close (d10v_callback, PARM1);
+	    trace_input ("<close>", OP_R2, OP_VOID, OP_VOID);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_open
+
 	  case SYS_open:
 	    RETVAL = d10v_callback->open (d10v_callback, MEMPTR (PARM1), PARM2);
+	    trace_input ("<open>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
+	    trace_input ("<open>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_exit
+
 	  case SYS_exit:
-	    /* EXIT - caller can look in PARM1 to work out the 
-	       reason */
-	    State.exception = SIGQUIT;
+	    State.exception = SIG_D10V_EXIT;
+	    trace_input ("<exit>", OP_R2, OP_VOID, OP_VOID);
+	    trace_output (OP_VOID);
 	    break;
-#endif
 
-#ifdef SYS_stat
 	  case SYS_stat:
 	    /* stat system call */
 	    {
@@ -2555,38 +2939,51 @@ OP_5F00 ()
 	      SLW (buf+28, host_stat.st_mtime);
 	      SLW (buf+36, host_stat.st_ctime);
 	    }
+	    trace_input ("<stat>", OP_R2, OP_R3, OP_VOID);
+	    trace_output (OP_R2);
 	    break;
-#endif
 
-#ifdef SYS_chown
 	  case SYS_chown:
 	    RETVAL = chown (MEMPTR (PARM1), PARM2, PARM3);
+	    trace_input ("<chown>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_chmod
+
 	  case SYS_chmod:
 	    RETVAL = chmod (MEMPTR (PARM1), PARM2);
+	    trace_input ("<chmod>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
 	    break;
-#endif
-#ifdef SYS_utime
+
 	  case SYS_utime:
 	    /* Cast the second argument to void *, to avoid type mismatch
 	       if a prototype is present.  */
 	    RETVAL = utime (MEMPTR (PARM1), (void *) MEMPTR (PARM2));
+	    trace_input ("<utime>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2);
 	    break;
-#endif
+
+	  case SYS_time:
+	    {
+	      unsigned long ret = time (PARM1 ? MEMPTR (PARM1) : NULL);
+	      RETVAL_HIGH = ret >> 16;
+	      RETVAL_LOW  = ret & 0xffff;
+	    }
+	    trace_input ("<time>", OP_R2, OP_R3, OP_R4);
+	    trace_output (OP_R2R3);
+	    break;
+	    
 	  default:
 	    abort ();
 	  }
-	RETERR = errno;
-	errno = save_errno;
+	RETERR = d10v_callback->get_errno(d10v_callback);
 	break;
       }
 
     case 1:
       /* Trap 1 prints a string */
       {
-	char *fstr = State.regs[2] + State.imem;
+	char *fstr = dmem_addr(State.regs[2]);
 	fputs (fstr, stdout);
 	break;
       }
@@ -2594,11 +2991,12 @@ OP_5F00 ()
     case 2:
       /* Trap 2 calls printf */
       {
-	char *fstr = State.regs[2] + State.imem;
+	char *fstr = dmem_addr(State.regs[2]);
 	(*d10v_callback->printf_filtered) (d10v_callback, fstr,
 					   (int16)State.regs[3],
 					   (int16)State.regs[4],
 					   (int16)State.regs[5]);
+	(*d10v_callback->flush_stdout) (d10v_callback);
 	break;
       }
 
@@ -2606,6 +3004,7 @@ OP_5F00 ()
       /* Trap 3 writes a character */
       putchar (State.regs[2]);
       break;
+      }
     }
 }