X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Flm32%2Fmodel.c;h=677bb4fc7c60ffcd9ee467538277aad95b22c4d4;hb=a1d1fa3e417b4bd8e79e2a731f9c6089e2d5f747;hp=02dd229d56b69714231097769c01f161bf7b053b;hpb=c28c63d86bd759c7595e85ef13949502e95fd58a;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/lm32/model.c b/sim/lm32/model.c
index 02dd229d56..677bb4fc7c 100644
--- a/sim/lm32/model.c
+++ b/sim/lm32/model.c
@@ -2,23 +2,22 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2005 Free Software Foundation, Inc.
+Copyright 1996-2020 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, see <http://www.gnu.org/licenses/>.
 
 */
 
@@ -997,7 +996,7 @@ model_lm32_xnori (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_lm32_break (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1013,7 +1012,7 @@ model_lm32_break (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_lm32_scall (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1116,7 +1115,7 @@ lm32_model_init (SIM_CPU *cpu)
 #define TIMING_DATA(td) 0
 #endif
 
-static const MODEL lm32_models[] =
+static const SIM_MODEL lm32_models[] =
 {
   { "lm32", & lm32_mach, MODEL_LM32, TIMING_DATA (& lm32_timing[0]), lm32_model_init },
   { 0 }
@@ -1124,7 +1123,7 @@ static const MODEL lm32_models[] =
 
 /* The properties of this cpu's implementation.  */
 
-static const MACH_IMP_PROPERTIES lm32bf_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES lm32bf_imp_properties =
 {
   sizeof (SIM_CPU),
 #if WITH_SCACHE
@@ -1166,7 +1165,7 @@ lm32_init_cpu (SIM_CPU *cpu)
 #endif
 }
 
-const MACH lm32_mach =
+const SIM_MACH lm32_mach =
 {
   "lm32", "lm32", MACH_LM32,
   32, 32, & lm32_models[0], & lm32bf_imp_properties,