X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2FChangeLog;h=7578315e9fb969d12b8190b72c67fc3815aaaab1;hb=1ac72f0659d64d6a14da862242db0d841d2878d0;hp=ce71d3008422a25e55a2f756e1fb2c971781a837;hpb=8a0ebee658862bec66191df192c1d3b09bf0c943;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index ce71d30084..7578315e9f 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,53 @@ +2016-01-02 Mike Frysinger + + * arch.h (TARGET_BIG_ENDIAN): Delete. + * configure.ac (SIM_AC_OPTION_ENDIAN): Change BIG_ENDIAN to BIG. + * configure: Regenerate. + * traps-linux.c (conv_endian): Change LITTLE_ENDIAN to + BFD_ENDIAN_LITTLE. + (conv_endian16): Likewise. + +2016-01-02 Mike Frysinger + + * sim-if.c (sim_open): Delete #if 0 sim_add_option_table call. + +2016-01-02 Mike Frysinger + + * sim-if.c (current_state): Delete. + (sim_open): Delete current_state assignment. + +2015-12-27 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-hload.o. + +2015-12-26 Mike Frysinger + + * config.in, configure: Regenerate. + +2015-12-26 Mike Frysinger + + * sim-if.c (sim_create_inferior): Replace old #if 0 code with dupargv. + +2015-12-25 Mike Frysinger + + * configure.ac (SIM_AC_OPTION_HARDWARE): Add m32r_cache & m32r_uart. + * configure: Regenerate. + * devices.c: Delete file. + * dv-m32r_cache.c, dv-m32r_cache.h: New cache model with logic from + devices.c. + * dv-m32r_uart.c, dv-m32r_uart.h: New uart model with logic from + devices.c. + * m32r-sim.h: Move cache defines to dv-m32r_cache.h and uart defines + to dv-m32r_uart.h. + * Makefile.in (SIM_OBJS): Delete devices.o. + * sim-if.c: Include dv-m32r_uart.h. + (sim_open): Replace sim_core_attach call with sim_hw_parse calls. + * tconfig.h: Delete file. + +2015-12-25 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-model.o. + 2015-12-25 Mike Frysinger * arch.c: Rename MACH to SIM_MACH.