X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2FMakefile.in;h=7bf5b6145d80392d7005ec75de20f656018579fa;hb=3922b302645fda04da42a5279399578ae2f6206c;hp=1d1d4bc9db8f553e82ce1e0822b804bf3cfef4c0;hpb=177dedfb88d7f19eb49e5563d7fa063d4b47273b;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 1d1d4bc9db..7bf5b6145d 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -1,12 +1,12 @@
 # Makefile template for Configure for the m32r simulator
-# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+# Copyright (C) 1996-2020 Free Software Foundation, Inc.
 # Contributed by Cygnus Support.
 #
 # This file is part of GDB, the GNU debugger.
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
+# the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
 #
 # This program is distributed in the hope that it will be useful,
@@ -14,46 +14,33 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 #
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 ## COMMON_PRE_CONFIG_FRAG
 
-M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
-# start-sanitize-m32rx
-M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o
-# end-sanitize-m32rx
-
-CONFIG_DEVICES = dv-sockser.o
-CONFIG_DEVICES =
+M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
+M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
+M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
+TRAPS_OBJ = @traps_obj@
 
 SIM_OBJS = \
 	$(SIM_NEW_COMMON_OBJS) \
-	sim-engine.o \
-	sim-hload.o \
-	sim-hrw.o \
-	sim-model.o \
-	sim-reason.o \
 	cgen-utils.o cgen-trace.o cgen-scache.o \
+	cgen-run.o \
 	sim-if.o arch.o \
 	$(M32R_OBJS) \
-	$(start-sanitize-m32rx) \
 	$(M32RX_OBJS) \
-	$(end-sanitize-m32rx) \
-	devices.o \
-	$(CONFIG_DEVICES)
+	$(M32R2_OBJS) \
+	$(TRAPS_OBJ)
 
 # Extra headers included by sim-main.h.
 SIM_EXTRA_DEPS = \
-	$(srcdir)/../common/cgen-types.h \
-	$(srcdir)/../common/cgen-sim.h \
-	$(srcdir)/../common/cgen-trace.h \
-	arch.h cpuall.h m32r-sim.h cpu-opc.h
+	$(CGEN_INCLUDE_DEPS) \
+	arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
 
-SIM_EXTRA_CFLAGS =
+SIM_EXTRA_CFLAGS = @sim_extra_cflags@
 
-SIM_RUN_OBJS = nrun.o
 SIM_EXTRA_CLEAN = m32r-clean
 
 # This selects the m32r newlib/libgloss syscall definitions.
@@ -63,109 +50,138 @@ NL_TARGET = -DNL_TARGET_m32r
 
 arch = m32r
 
-MAIN_INCLUDE_DEPS = \
-	sim-main.h \
-	$(srcdir)/../common/sim-config.h \
-	$(srcdir)/../common/sim-base.h \
-	$(srcdir)/../common/sim-basics.h \
-	$(srcdir)/../common/sim-module.h \
-	$(srcdir)/../common/sim-trace.h \
-	$(srcdir)/../common/sim-profile.h \
-	tconfig.h
-INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h
-OPS_INCLUDE_DEPS = \
-	$(srcdir)/../common/cgen-mem.h \
-	$(srcdir)/../common/cgen-ops.h
+sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
 
-sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h
+arch.o: arch.c $(SIM_MAIN_DEPS)
 
-arch.o: arch.c $(INCLUDE_DEPS)
+traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
+traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
+devices.o: devices.c $(SIM_MAIN_DEPS)
 
 # M32R objs
 
-m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
+M32RBF_INCLUDE_DEPS = \
+	$(CGEN_MAIN_CPU_DEPS) \
+	cpu.h decode.h eng.h
+
+m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
 
 # FIXME: Use of `mono' is wip.
-mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	rm -f mloop.c
-	$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
-		-mono -scache -fast m32r $(srcdir)/mloop.in \
-		| sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c
-mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
-
-cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
-decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
-extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
-	$(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P
-sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
-	$(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P
-model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h
-
-#sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
-#	$(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS)
-
-# start-sanitize-m32rx
+mloop.c eng.h: stamp-mloop ; @true
+stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+		-mono -fast -pbb -switch sem-switch.c \
+		-cpu m32rbf -infile $(srcdir)/mloop.in
+	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
+	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
+	touch stamp-mloop
+mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
+
+cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
+decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
+sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
+model.o: model.c $(M32RBF_INCLUDE_DEPS)
+
 # M32RX objs
 
-m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
+M32RXF_INCLUDE_DEPS = \
+	$(CGEN_MAIN_CPU_DEPS) \
+	cpux.h decodex.h engx.h
+
+m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
 
 # FIXME: Use of `mono' is wip.
-mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
-	rm -f mloopx.c
-	$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
-		-mono -no-scache -no-fast -parallel \
-		m32r $(srcdir)/mloopx.in \
-		| sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c
-mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
-
-cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
-decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
-semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
-modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
-# end-sanitize-m32rx
+mloopx.c engx.h: stamp-xmloop ; @true
+stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
+		-cpu m32rxf -infile $(srcdir)/mloopx.in \
+		-outfile-suffix x
+	$(SHELL) $(srcroot)/move-if-change engx.hin engx.h
+	$(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
+	touch stamp-xmloop
+mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
+
+cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
+decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
+semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
+modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
+
+# M32R2 objs
+
+M32R2F_INCLUDE_DEPS = \
+	$(CGEN_MAIN_CPU_DEPS) \
+	cpu2.h decode2.h eng2.h
+
+m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
+
+# FIXME: Use of `mono' is wip.
+mloop2.c eng2.h: stamp-2mloop ; @true
+stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+		-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
+		-cpu m32r2f -infile $(srcdir)/mloop2.in \
+		-outfile-suffix 2
+	$(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
+	$(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
+	touch stamp-2mloop
+
+mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
+cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
+decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
+sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
+model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
 
 m32r-clean:
-	rm -f mloop.c stamp-arch stamp-cpu stamp-decode
-# start-sanitize-m32rx
-	rm -f mloopx.c stamp-xcpu stamp-xdecode
-# end-sanitize-m32rx
+	rm -f mloop.c eng.h stamp-mloop
+	rm -f mloopx.c engx.h stamp-xmloop
+	rm -f mloop2.c eng2.h stamp-2mloop
+	rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
 	rm -f tmp-*
 
-# start-sanitize-cygnus
 # cgen support, enable with --enable-cgen-maint
 CGEN_MAINT = ; @true
 # The following line is commented in or out depending upon --enable-cgen-maint.
-@cgen_maint@CGEN_MAINT =
+@CGEN_MAINT@CGEN_MAINT =
+
+# NOTE: Generated source files are specified as full paths,
+# e.g. $(srcdir)/arch.c, because make may decide the files live
+# in objdir otherwise.
 
-stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-arch
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
+	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
+	  archfile=$(CPU_DIR)/m32r.cpu \
+	  FLAGS="with-scache with-profile=fn"
 	touch stamp-arch
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
+$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 	@true
 
-stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-cpu cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
+stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
+	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+	  cpu=m32rbf mach=m32r SUFFIX= \
+	  archfile=$(CPU_DIR)/m32r.cpu \
+	  FLAGS="with-scache with-profile=fn" \
+	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 	touch stamp-cpu
-cpu.h extract.c sem.c sem-switch.c model.c: $(CGEN_MAINT) stamp-cpu
-	@true
-
-stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-decode cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn"
-	touch stamp-decode
-decode.h decode.c: $(CGEN_MAINT) stamp-decode
+$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
 	@true
-# end-sanitize-cygnus
 
-# start-sanitize-m32rx
-stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-cpu cpu=m32rx mach=m32rx SUFFIX=x FLAGS="with-profile fn" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)"
+stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
+	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+	  cpu=m32rxf mach=m32rx SUFFIX=x \
+	  archfile=$(CPU_DIR)/m32r.cpu \
+	  FLAGS="with-scache with-profile=fn" \
+	  EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	touch stamp-xcpu
-cpux.h readx.c semx.c modelx.c: $(CGEN_MAINT) stamp-xcpu
+$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
 	@true
 
-stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-decode cpu=m32rx mach=m32rx SUFFIX=x
-	touch stamp-xdecode
-decodex.h decodex.c: $(CGEN_MAINT) stamp-xdecode
+stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
+	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+	  cpu=m32r2f mach=m32r2 SUFFIX=2 \
+	  archfile=$(CPU_DIR)/m32r.cpu \
+	  FLAGS="with-scache with-profile=fn" \
+	  EXTRAFILES="$(CGEN_CPU_SEMSW)"
+	touch stamp-2cpu
+$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
 	@true
-# end-sanitize-m32rx