X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2FMakefile.in;h=7bf5b6145d80392d7005ec75de20f656018579fa;hb=3922b302645fda04da42a5279399578ae2f6206c;hp=eb29ab188b95a054263e57770ff88f5a949629c3;hpb=6edf0760c5c65c9f0582c5d8036bfa058f2cd6c2;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index eb29ab188b..7bf5b6145d 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -1,12 +1,12 @@
 # Makefile template for Configure for the m32r simulator
-# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
+# Copyright (C) 1996-2020 Free Software Foundation, Inc.
 # Contributed by Cygnus Support.
 #
 # This file is part of GDB, the GNU debugger.
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
+# the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
 #
 # This program is distributed in the hope that it will be useful,
@@ -14,9 +14,8 @@
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 #
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 ## COMMON_PRE_CONFIG_FRAG
 
@@ -25,25 +24,15 @@ M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
 TRAPS_OBJ = @traps_obj@
 
-CONFIG_DEVICES = dv-sockser.o
-CONFIG_DEVICES =
-
 SIM_OBJS = \
 	$(SIM_NEW_COMMON_OBJS) \
-	sim-cpu.o \
-	sim-hload.o \
-	sim-hrw.o \
-	sim-model.o \
-	sim-reg.o \
 	cgen-utils.o cgen-trace.o cgen-scache.o \
-	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
+	cgen-run.o \
 	sim-if.o arch.o \
 	$(M32R_OBJS) \
 	$(M32RX_OBJS) \
 	$(M32R2_OBJS) \
-	$(TRAPS_OBJ) \
-	devices.o \
-	$(CONFIG_DEVICES)
+	$(TRAPS_OBJ)
 
 # Extra headers included by sim-main.h.
 SIM_EXTRA_DEPS = \
@@ -52,7 +41,6 @@ SIM_EXTRA_DEPS = \
 
 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
 
-SIM_RUN_OBJS = nrun.o
 SIM_EXTRA_CLEAN = m32r-clean
 
 # This selects the m32r newlib/libgloss syscall definitions.
@@ -79,9 +67,9 @@ M32RBF_INCLUDE_DEPS = \
 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
 
 # FIXME: Use of `mono' is wip.
-mloop.c eng.h: stamp-mloop
+mloop.c eng.h: stamp-mloop ; @true
 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh \
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu m32rbf -infile $(srcdir)/mloop.in
 	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
@@ -103,13 +91,14 @@ M32RXF_INCLUDE_DEPS = \
 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
 
 # FIXME: Use of `mono' is wip.
-mloopx.c engx.h: stamp-xmloop
+mloopx.c engx.h: stamp-xmloop ; @true
 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh \
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
-		-cpu m32rxf -infile $(srcdir)/mloopx.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin engx.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
+		-cpu m32rxf -infile $(srcdir)/mloopx.in \
+		-outfile-suffix x
+	$(SHELL) $(srcroot)/move-if-change engx.hin engx.h
+	$(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
 	touch stamp-xmloop
 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 
@@ -127,20 +116,21 @@ M32R2F_INCLUDE_DEPS = \
 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
 
 # FIXME: Use of `mono' is wip.
-mloop2.c eng2.h: stamp-2mloop
+mloop2.c eng2.h: stamp-2mloop ; @true
 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh \
+	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
-		-cpu m32r2f -infile $(srcdir)/mloop2.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin eng2.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop2.c
+		-cpu m32r2f -infile $(srcdir)/mloop2.in \
+		-outfile-suffix 2
+	$(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
+	$(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
 	touch stamp-2mloop
 
-mloop2.o:  mloop2.c sem2-switch.c $(M32R2F_INCLUDE_DEPS)
-cpu2.o:    cpu2.c    $(M32R2F_INCLUDE_DEPS)
+mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
+cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
-sem2.o:    sem2.c    $(M32R2F_INCLUDE_DEPS)
-model2.o:  model2.c  $(M32R2F_INCLUDE_DEPS)
+sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
+model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
 
 m32r-clean:
 	rm -f mloop.c eng.h stamp-mloop
@@ -154,36 +144,44 @@ CGEN_MAINT = ; @true
 # The following line is commented in or out depending upon --enable-cgen-maint.
 @CGEN_MAINT@CGEN_MAINT =
 
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+# NOTE: Generated source files are specified as full paths,
+# e.g. $(srcdir)/arch.c, because make may decide the files live
+# in objdir otherwise.
+
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
 	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
-	  archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn"
 	touch stamp-arch
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
+$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
+	@true
 
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 	  cpu=m32rbf mach=m32r SUFFIX= \
-	  archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 	touch stamp-cpu
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
+$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
+	@true
 
-stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 	  cpu=m32rxf mach=m32rx SUFFIX=x \
-	  archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	touch stamp-xcpu
-cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
+$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
+	@true
 
-stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 	  cpu=m32r2f mach=m32r2 SUFFIX=2 \
-	  archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	touch stamp-2cpu
-cpu2.h sem2-switch.c model2.c decode2.c decode2.h: $(CGEN_MAINT) stamp-2cpu
+$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
+	@true