X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Farch.c;h=f1d38c3f96a779d03835958aee3d3bc6257ec48e;hb=17fc27167f678285d2f64040837b8cc41b6a664a;hp=00e101078a5f1274f39fc2ea139b5cfcb4827f43;hpb=abd8680d6efd97e7ba848a6392ee3ad72be18cd0;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/m32r/arch.c b/sim/m32r/arch.c
index 00e101078a..f1d38c3f96 100644
--- a/sim/m32r/arch.c
+++ b/sim/m32r/arch.c
@@ -2,36 +2,38 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+Copyright 1996-2020 Free Software Foundation, Inc.
 
-This file is part of the GNU Simulators.
+This file is part of the GNU simulators.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, see <http://www.gnu.org/licenses/>.
 
 */
 
 #include "sim-main.h"
 #include "bfd.h"
 
-const MACH *sim_machs[] =
+const SIM_MACH *sim_machs[] =
 {
 #ifdef HAVE_CPU_M32RBF
   & m32r_mach,
 #endif
 #ifdef HAVE_CPU_M32RXF
   & m32rx_mach,
+#endif
+#ifdef HAVE_CPU_M32R2F
+  & m32r2_mach,
 #endif
   0
 };