X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Fdecode.c;h=a80c9901d56be4a8caa59b7a746dc42e0a084d80;hb=2951f6c068f961a2ea1de892fc82cf0229af67da;hp=e94ff361ee14b16c7dce09cf16b35d48f98c02cb;hpb=e9c60591766341af909787c6274576425a73d798;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c index e94ff361ee..a80c9901d5 100644 --- a/sim/m32r/decode.c +++ b/sim/m32r/decode.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2009 Free Software Foundation, Inc. +Copyright 1996-2020 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,8 +17,7 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + with this program; if not, see . */ @@ -152,7 +151,8 @@ static const struct insn_sem m32rbf_insn_sem[] = { M32R_INSN_BTST, M32RBF_INSN_BTST, M32RBF_SFMT_BTST }, }; -static const struct insn_sem m32rbf_insn_sem_invalid = { +static const struct insn_sem m32rbf_insn_sem_invalid = +{ VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }; @@ -202,7 +202,7 @@ m32rbf_init_idesc_table (SIM_CPU *cpu) init_idesc (cpu, id, t); /* Now fill in the values for the chosen cpu. */ - for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t); + for (t = m32rbf_insn_sem, tend = t + ARRAY_SIZE (m32rbf_insn_sem); t != tend; ++t) { init_idesc (cpu, & table[t->index], t); @@ -216,14 +216,14 @@ m32rbf_init_idesc_table (SIM_CPU *cpu) const IDESC * m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, + CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn, ARGBUF *abuf) { /* Result of decoder. */ M32RBF_INSN_TYPE itype; { - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; { unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); @@ -573,11 +573,11 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_empty: { const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); #undef FLD return idesc; @@ -586,7 +586,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -599,7 +599,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -617,7 +617,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add3: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -625,7 +625,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -633,7 +633,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -650,7 +650,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and3: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; @@ -666,7 +666,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -683,7 +683,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_or3: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; @@ -699,7 +699,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -716,19 +716,19 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_addi.f UINT f_r1; INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_simm8) = f_simm8; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -745,7 +745,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addv: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -758,7 +758,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -776,7 +776,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addv3: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -784,7 +784,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -792,7 +792,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -809,7 +809,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addx: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -822,7 +822,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -840,15 +840,15 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bc8: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -863,15 +863,15 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bc24: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -886,7 +886,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_beq: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_beq.f UINT f_r1; UINT f_r2; @@ -894,7 +894,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; @@ -902,7 +902,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_disp16) = f_disp16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -919,19 +919,19 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_beqz: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_beq.f UINT f_r2; SI f_disp16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_disp16) = f_disp16; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -947,15 +947,15 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bl8: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -971,15 +971,15 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bl24: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -995,15 +995,15 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bra8: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1018,15 +1018,15 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bra24: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1041,7 +1041,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1054,7 +1054,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1071,19 +1071,19 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpi: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r2; INT f_simm16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1099,7 +1099,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_div: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -1112,7 +1112,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1130,7 +1130,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jl: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1139,7 +1139,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1156,7 +1156,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jmp: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1165,7 +1165,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1181,7 +1181,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1194,7 +1194,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1211,7 +1211,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1219,7 +1219,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1227,7 +1227,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1244,7 +1244,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldb: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1257,7 +1257,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1274,7 +1274,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldb_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1282,7 +1282,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1290,7 +1290,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1307,7 +1307,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldh: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1320,7 +1320,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1337,7 +1337,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldh_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1345,7 +1345,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1353,7 +1353,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1370,7 +1370,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld_plus: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1383,7 +1383,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1401,7 +1401,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld24: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld24.f UINT f_r1; UINT f_uimm24; @@ -1413,7 +1413,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_uimm24) = f_uimm24; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1429,19 +1429,19 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldi8: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_addi.f UINT f_r1; INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_simm8) = f_simm8; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1457,19 +1457,19 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldi16: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; INT f_simm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1485,7 +1485,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lock: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1498,7 +1498,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1515,7 +1515,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_machi: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1528,7 +1528,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1545,7 +1545,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mulhi: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1558,7 +1558,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1575,7 +1575,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mv: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1588,7 +1588,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1605,7 +1605,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvfachi: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_seth.f UINT f_r1; @@ -1614,7 +1614,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1630,7 +1630,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvfc: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1642,7 +1642,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1658,7 +1658,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvtachi: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; @@ -1667,7 +1667,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (i_src1) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1683,7 +1683,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvtc: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1695,7 +1695,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1711,11 +1711,11 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_nop: { const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); #undef FLD return idesc; @@ -1724,11 +1724,11 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rac: { const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); #undef FLD return idesc; @@ -1737,11 +1737,11 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rte: { const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1756,7 +1756,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_seth: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_seth.f UINT f_r1; UINT f_hi16; @@ -1768,7 +1768,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_hi16) = f_hi16; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1784,7 +1784,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sll3: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1792,7 +1792,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1800,7 +1800,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1817,7 +1817,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_slli: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_slli.f UINT f_r1; UINT f_uimm5; @@ -1829,7 +1829,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (f_uimm5) = f_uimm5; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1846,7 +1846,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1859,7 +1859,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1876,7 +1876,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -1884,7 +1884,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1892,7 +1892,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1909,7 +1909,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1922,7 +1922,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1939,7 +1939,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -1947,7 +1947,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1955,7 +1955,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1972,7 +1972,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1985,7 +1985,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2002,7 +2002,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -2010,7 +2010,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2018,7 +2018,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2035,7 +2035,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st_plus: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2048,7 +2048,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2066,7 +2066,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_trap: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_trap.f UINT f_uimm4; @@ -2074,7 +2074,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm4) = f_uimm4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2089,7 +2089,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_unlock: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2102,7 +2102,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2119,7 +2119,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_clrpsw: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_clrpsw.f UINT f_uimm8; @@ -2127,7 +2127,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm8) = f_uimm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); #undef FLD return idesc; @@ -2136,7 +2136,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_setpsw: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_clrpsw.f UINT f_uimm8; @@ -2144,7 +2144,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm8) = f_uimm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); #undef FLD return idesc; @@ -2153,7 +2153,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bset: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bset.f UINT f_uimm3; UINT f_r2; @@ -2161,14 +2161,14 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (f_uimm3) = f_uimm3; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2184,7 +2184,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btst: { const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bset.f UINT f_uimm3; UINT f_r2; @@ -2196,7 +2196,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_uimm3) = f_uimm3; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */