X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Fdecode.h;h=d3bf1553e242b52a5ea023cf9fe1fa58d46d9da6;hb=60db1b8565060f4bd2287b060ea9724c93289982;hp=91471e8c1433873a0c862cc27af2f8cb44bbc276;hpb=8b0b198558d0fc981f129e2e3dcbe00a0f308449;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/decode.h b/sim/m32r/decode.h index 91471e8c14..d3bf1553e2 100644 --- a/sim/m32r/decode.h +++ b/sim/m32r/decode.h @@ -2,23 +2,22 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. +Copyright 1996-2020 Free Software Foundation, Inc. -This file is part of the GNU Simulators. +This file is part of the GNU simulators. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This file is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + You should have received a copy of the GNU General Public License along + with this program; if not, see . */ @@ -26,9 +25,11 @@ with this program; if not, write to the Free Software Foundation, Inc., #define M32RBF_DECODE_H extern const IDESC *m32rbf_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, CGEN_INSN_INT, + CGEN_INSN_WORD, CGEN_INSN_WORD, ARGBUF *); extern void m32rbf_init_idesc_table (SIM_CPU *); +extern void m32rbf_sem_init_idesc_table (SIM_CPU *); +extern void m32rbf_semf_init_idesc_table (SIM_CPU *); /* Enum declaration for instructions in cpu family m32rbf. */ typedef enum m32rbf_insn_type { @@ -58,137 +59,28 @@ typedef enum m32rbf_insn_type { , M32RBF_INSN_ST, M32RBF_INSN_ST_D, M32RBF_INSN_STB, M32RBF_INSN_STB_D , M32RBF_INSN_STH, M32RBF_INSN_STH_D, M32RBF_INSN_ST_PLUS, M32RBF_INSN_ST_MINUS , M32RBF_INSN_SUB, M32RBF_INSN_SUBV, M32RBF_INSN_SUBX, M32RBF_INSN_TRAP - , M32RBF_INSN_UNLOCK, M32RBF_INSN_MAX + , M32RBF_INSN_UNLOCK, M32RBF_INSN_CLRPSW, M32RBF_INSN_SETPSW, M32RBF_INSN_BSET + , M32RBF_INSN_BCLR, M32RBF_INSN_BTST, M32RBF_INSN__MAX } M32RBF_INSN_TYPE; -#if ! WITH_SEM_SWITCH_FULL -#define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (m32rbf,_sem_,fn); -#else -#define SEMFULL(fn) -#endif - -#if ! WITH_SEM_SWITCH_FAST -#define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (m32rbf,_semf_,fn); -#else -#define SEMFAST(fn) -#endif - -#define SEM(fn) SEMFULL (fn) SEMFAST (fn) - -/* The function version of the before/after handlers is always needed, - so we always want the SEMFULL declaration of them. */ -extern SEMANTIC_FN CONCAT3 (m32rbf,_sem_,x_before); -extern SEMANTIC_FN CONCAT3 (m32rbf,_sem_,x_after); - -SEM (x_invalid) -SEM (x_after) -SEM (x_before) -SEM (x_cti_chain) -SEM (x_chain) -SEM (x_begin) -SEM (add) -SEM (add3) -SEM (and) -SEM (and3) -SEM (or) -SEM (or3) -SEM (xor) -SEM (xor3) -SEM (addi) -SEM (addv) -SEM (addv3) -SEM (addx) -SEM (bc8) -SEM (bc24) -SEM (beq) -SEM (beqz) -SEM (bgez) -SEM (bgtz) -SEM (blez) -SEM (bltz) -SEM (bnez) -SEM (bl8) -SEM (bl24) -SEM (bnc8) -SEM (bnc24) -SEM (bne) -SEM (bra8) -SEM (bra24) -SEM (cmp) -SEM (cmpi) -SEM (cmpu) -SEM (cmpui) -SEM (div) -SEM (divu) -SEM (rem) -SEM (remu) -SEM (jl) -SEM (jmp) -SEM (ld) -SEM (ld_d) -SEM (ldb) -SEM (ldb_d) -SEM (ldh) -SEM (ldh_d) -SEM (ldub) -SEM (ldub_d) -SEM (lduh) -SEM (lduh_d) -SEM (ld_plus) -SEM (ld24) -SEM (ldi8) -SEM (ldi16) -SEM (lock) -SEM (machi) -SEM (maclo) -SEM (macwhi) -SEM (macwlo) -SEM (mul) -SEM (mulhi) -SEM (mullo) -SEM (mulwhi) -SEM (mulwlo) -SEM (mv) -SEM (mvfachi) -SEM (mvfaclo) -SEM (mvfacmi) -SEM (mvfc) -SEM (mvtachi) -SEM (mvtaclo) -SEM (mvtc) -SEM (neg) -SEM (nop) -SEM (not) -SEM (rac) -SEM (rach) -SEM (rte) -SEM (seth) -SEM (sll) -SEM (sll3) -SEM (slli) -SEM (sra) -SEM (sra3) -SEM (srai) -SEM (srl) -SEM (srl3) -SEM (srli) -SEM (st) -SEM (st_d) -SEM (stb) -SEM (stb_d) -SEM (sth) -SEM (sth_d) -SEM (st_plus) -SEM (st_minus) -SEM (sub) -SEM (subv) -SEM (subx) -SEM (trap) -SEM (unlock) - -#undef SEMFULL -#undef SEMFAST -#undef SEM +/* Enum declaration for semantic formats in cpu family m32rbf. */ +typedef enum m32rbf_sfmt_type { + M32RBF_SFMT_EMPTY, M32RBF_SFMT_ADD, M32RBF_SFMT_ADD3, M32RBF_SFMT_AND3 + , M32RBF_SFMT_OR3, M32RBF_SFMT_ADDI, M32RBF_SFMT_ADDV, M32RBF_SFMT_ADDV3 + , M32RBF_SFMT_ADDX, M32RBF_SFMT_BC8, M32RBF_SFMT_BC24, M32RBF_SFMT_BEQ + , M32RBF_SFMT_BEQZ, M32RBF_SFMT_BL8, M32RBF_SFMT_BL24, M32RBF_SFMT_BRA8 + , M32RBF_SFMT_BRA24, M32RBF_SFMT_CMP, M32RBF_SFMT_CMPI, M32RBF_SFMT_DIV + , M32RBF_SFMT_JL, M32RBF_SFMT_JMP, M32RBF_SFMT_LD, M32RBF_SFMT_LD_D + , M32RBF_SFMT_LDB, M32RBF_SFMT_LDB_D, M32RBF_SFMT_LDH, M32RBF_SFMT_LDH_D + , M32RBF_SFMT_LD_PLUS, M32RBF_SFMT_LD24, M32RBF_SFMT_LDI8, M32RBF_SFMT_LDI16 + , M32RBF_SFMT_LOCK, M32RBF_SFMT_MACHI, M32RBF_SFMT_MULHI, M32RBF_SFMT_MV + , M32RBF_SFMT_MVFACHI, M32RBF_SFMT_MVFC, M32RBF_SFMT_MVTACHI, M32RBF_SFMT_MVTC + , M32RBF_SFMT_NOP, M32RBF_SFMT_RAC, M32RBF_SFMT_RTE, M32RBF_SFMT_SETH + , M32RBF_SFMT_SLL3, M32RBF_SFMT_SLLI, M32RBF_SFMT_ST, M32RBF_SFMT_ST_D + , M32RBF_SFMT_STB, M32RBF_SFMT_STB_D, M32RBF_SFMT_STH, M32RBF_SFMT_STH_D + , M32RBF_SFMT_ST_PLUS, M32RBF_SFMT_TRAP, M32RBF_SFMT_UNLOCK, M32RBF_SFMT_CLRPSW + , M32RBF_SFMT_SETPSW, M32RBF_SFMT_BSET, M32RBF_SFMT_BTST +} M32RBF_SFMT_TYPE; /* Function unit handlers (user written). */