X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Fdecode2.c;h=2ea1aa34403f529ce27e431a5f69c5243699e353;hb=87f83f20023bf366c14ec4e0fd307948d96caaee;hp=d98db5e855779bc2c2b0c203e21ee585cffc6026;hpb=16b47b253e65a3d447c57a0dc7a4d0490a3d6628;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/decode2.c b/sim/m32r/decode2.c index d98db5e855..2ea1aa3440 100644 --- a/sim/m32r/decode2.c +++ b/sim/m32r/decode2.c @@ -2,23 +2,22 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +Copyright 1996-2020 Free Software Foundation, Inc. This file is part of the GNU simulators. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This file is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + You should have received a copy of the GNU General Public License along + with this program; if not, see . */ @@ -185,7 +184,8 @@ static const struct insn_sem m32r2f_insn_sem[] = { M32R_INSN_BTST, M32R2F_INSN_BTST, M32R2F_SFMT_BTST, M32R2F_INSN_PAR_BTST, M32R2F_INSN_WRITE_BTST }, }; -static const struct insn_sem m32r2f_insn_sem_invalid = { +static const struct insn_sem m32r2f_insn_sem_invalid = +{ VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }; @@ -235,7 +235,7 @@ m32r2f_init_idesc_table (SIM_CPU *cpu) init_idesc (cpu, id, t); /* Now fill in the values for the chosen cpu. */ - for (t = m32r2f_insn_sem, tend = t + sizeof (m32r2f_insn_sem) / sizeof (*t); + for (t = m32r2f_insn_sem, tend = t + ARRAY_SIZE (m32r2f_insn_sem); t != tend; ++t) { init_idesc (cpu, & table[t->index], t); @@ -259,14 +259,14 @@ m32r2f_init_idesc_table (SIM_CPU *cpu) const IDESC * m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, + CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn, ARGBUF *abuf) { /* Result of decoder. */ M32R2F_INSN_TYPE itype; { - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; { unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); @@ -284,8 +284,14 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 8) & (3 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_CMPZ; goto extract_sfmt_cmpz; - case 3 : itype = M32R2F_INSN_PCMPBZ; goto extract_sfmt_cmpz; + case 0 : + if ((entire_insn & 0xfff0) == 0x70) + { itype = M32R2F_INSN_CMPZ; goto extract_sfmt_cmpz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0xfff0) == 0x370) + { itype = M32R2F_INSN_PCMPBZ; goto extract_sfmt_cmpz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -296,7 +302,10 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, case 12 : itype = M32R2F_INSN_AND; goto extract_sfmt_add; case 13 : itype = M32R2F_INSN_XOR; goto extract_sfmt_add; case 14 : itype = M32R2F_INSN_OR; goto extract_sfmt_add; - case 15 : itype = M32R2F_INSN_BTST; goto extract_sfmt_btst; + case 15 : + if ((entire_insn & 0xf8f0) == 0xf0) + { itype = M32R2F_INSN_BTST; goto extract_sfmt_btst; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 16 : itype = M32R2F_INSN_SRL; goto extract_sfmt_add; case 18 : itype = M32R2F_INSN_SRA; goto extract_sfmt_add; case 20 : itype = M32R2F_INSN_SLL; goto extract_sfmt_add; @@ -309,15 +318,33 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 8) & (3 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_JC; goto extract_sfmt_jc; - case 1 : itype = M32R2F_INSN_JNC; goto extract_sfmt_jc; - case 2 : itype = M32R2F_INSN_JL; goto extract_sfmt_jl; - case 3 : itype = M32R2F_INSN_JMP; goto extract_sfmt_jmp; + case 0 : + if ((entire_insn & 0xfff0) == 0x1cc0) + { itype = M32R2F_INSN_JC; goto extract_sfmt_jc; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0xfff0) == 0x1dc0) + { itype = M32R2F_INSN_JNC; goto extract_sfmt_jc; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0xfff0) == 0x1ec0) + { itype = M32R2F_INSN_JL; goto extract_sfmt_jl; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0xfff0) == 0x1fc0) + { itype = M32R2F_INSN_JMP; goto extract_sfmt_jmp; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 29 : itype = M32R2F_INSN_RTE; goto extract_sfmt_rte; - case 31 : itype = M32R2F_INSN_TRAP; goto extract_sfmt_trap; + case 29 : + if ((entire_insn & 0xffff) == 0x10d6) + { itype = M32R2F_INSN_RTE; goto extract_sfmt_rte; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 31 : + if ((entire_insn & 0xfff0) == 0x10f0) + { itype = M32R2F_INSN_TRAP; goto extract_sfmt_trap; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 32 : itype = M32R2F_INSN_STB; goto extract_sfmt_stb; case 33 : itype = M32R2F_INSN_STB_PLUS; goto extract_sfmt_stb_plus; case 34 : itype = M32R2F_INSN_STH; goto extract_sfmt_sth; @@ -376,18 +403,33 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 0) & (1 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a; - case 1 : itype = M32R2F_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a; + case 0 : + if ((entire_insn & 0xf0f3) == 0x5070) + { itype = M32R2F_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0xf0f3) == 0x5071) + { itype = M32R2F_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 88 : itype = M32R2F_INSN_RACH_DSI; goto extract_sfmt_rac_dsi; - case 89 : itype = M32R2F_INSN_RAC_DSI; goto extract_sfmt_rac_dsi; + case 88 : + if ((entire_insn & 0xf3f2) == 0x5080) + { itype = M32R2F_INSN_RACH_DSI; goto extract_sfmt_rac_dsi; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 89 : + if ((entire_insn & 0xf3f2) == 0x5090) + { itype = M32R2F_INSN_RAC_DSI; goto extract_sfmt_rac_dsi; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 90 : itype = M32R2F_INSN_MULWU1; goto extract_sfmt_mulwu1; case 91 : itype = M32R2F_INSN_MACWU1; goto extract_sfmt_macwu1; case 92 : itype = M32R2F_INSN_MACLH1; goto extract_sfmt_macwu1; case 93 : itype = M32R2F_INSN_MSBLO; goto extract_sfmt_msblo; - case 94 : itype = M32R2F_INSN_SADD; goto extract_sfmt_sadd; + case 94 : + if ((entire_insn & 0xffff) == 0x50e4) + { itype = M32R2F_INSN_SADD; goto extract_sfmt_sadd; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 95 : { unsigned int val = (((insn >> 0) & (3 << 0))); @@ -420,13 +462,22 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 7) & (15 << 1)) | ((insn >> 0) & (1 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_NOP; goto extract_sfmt_nop; + case 0 : + if ((entire_insn & 0xffff) == 0x7000) + { itype = M32R2F_INSN_NOP; goto extract_sfmt_nop; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 2 : /* fall through */ case 3 : itype = M32R2F_INSN_SETPSW; goto extract_sfmt_setpsw; case 4 : /* fall through */ case 5 : itype = M32R2F_INSN_CLRPSW; goto extract_sfmt_clrpsw; - case 9 : itype = M32R2F_INSN_SC; goto extract_sfmt_sc; - case 11 : itype = M32R2F_INSN_SNC; goto extract_sfmt_sc; + case 9 : + if ((entire_insn & 0xffff) == 0x7401) + { itype = M32R2F_INSN_SC; goto extract_sfmt_sc; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0xffff) == 0x7501) + { itype = M32R2F_INSN_SNC; goto extract_sfmt_sc; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 16 : /* fall through */ case 17 : itype = M32R2F_INSN_BCL8; goto extract_sfmt_bcl8; case 18 : /* fall through */ @@ -472,16 +523,31 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 132 : itype = M32R2F_INSN_CMPI; goto extract_sfmt_cmpi; - case 133 : itype = M32R2F_INSN_CMPUI; goto extract_sfmt_cmpi; + case 132 : + if ((entire_insn & 0xfff00000) == 0x80400000) + { itype = M32R2F_INSN_CMPI; goto extract_sfmt_cmpi; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 133 : + if ((entire_insn & 0xfff00000) == 0x80500000) + { itype = M32R2F_INSN_CMPUI; goto extract_sfmt_cmpi; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 134 : { - unsigned int val = (((insn >> -8) & (3 << 0))); + unsigned int val = (((entire_insn >> 8) & (3 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_SAT; goto extract_sfmt_sat; - case 2 : itype = M32R2F_INSN_SATH; goto extract_sfmt_satb; - case 3 : itype = M32R2F_INSN_SATB; goto extract_sfmt_satb; + case 0 : + if ((entire_insn & 0xf0f0ffff) == 0x80600000) + { itype = M32R2F_INSN_SAT; goto extract_sfmt_sat; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0xf0f0ffff) == 0x80600200) + { itype = M32R2F_INSN_SATH; goto extract_sfmt_satb; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0xf0f0ffff) == 0x80600300) + { itype = M32R2F_INSN_SATB; goto extract_sfmt_satb; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -492,57 +558,102 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, case 142 : itype = M32R2F_INSN_OR3; goto extract_sfmt_or3; case 144 : { - unsigned int val = (((insn >> -13) & (3 << 0))); + unsigned int val = (((entire_insn >> 3) & (3 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_DIV; goto extract_sfmt_div; - case 2 : itype = M32R2F_INSN_DIVH; goto extract_sfmt_div; - case 3 : itype = M32R2F_INSN_DIVB; goto extract_sfmt_div; + case 0 : + if ((entire_insn & 0xf0f0ffff) == 0x90000000) + { itype = M32R2F_INSN_DIV; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0xf0f0ffff) == 0x90000010) + { itype = M32R2F_INSN_DIVH; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0xf0f0ffff) == 0x90000018) + { itype = M32R2F_INSN_DIVB; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } case 145 : { - unsigned int val = (((insn >> -13) & (3 << 0))); + unsigned int val = (((entire_insn >> 3) & (3 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_DIVU; goto extract_sfmt_div; - case 2 : itype = M32R2F_INSN_DIVUH; goto extract_sfmt_div; - case 3 : itype = M32R2F_INSN_DIVUB; goto extract_sfmt_div; + case 0 : + if ((entire_insn & 0xf0f0ffff) == 0x90100000) + { itype = M32R2F_INSN_DIVU; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0xf0f0ffff) == 0x90100010) + { itype = M32R2F_INSN_DIVUH; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0xf0f0ffff) == 0x90100018) + { itype = M32R2F_INSN_DIVUB; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } case 146 : { - unsigned int val = (((insn >> -13) & (3 << 0))); + unsigned int val = (((entire_insn >> 3) & (3 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_REM; goto extract_sfmt_div; - case 2 : itype = M32R2F_INSN_REMH; goto extract_sfmt_div; - case 3 : itype = M32R2F_INSN_REMB; goto extract_sfmt_div; + case 0 : + if ((entire_insn & 0xf0f0ffff) == 0x90200000) + { itype = M32R2F_INSN_REM; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0xf0f0ffff) == 0x90200010) + { itype = M32R2F_INSN_REMH; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0xf0f0ffff) == 0x90200018) + { itype = M32R2F_INSN_REMB; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } case 147 : { - unsigned int val = (((insn >> -13) & (3 << 0))); + unsigned int val = (((entire_insn >> 3) & (3 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_REMU; goto extract_sfmt_div; - case 2 : itype = M32R2F_INSN_REMUH; goto extract_sfmt_div; - case 3 : itype = M32R2F_INSN_REMUB; goto extract_sfmt_div; + case 0 : + if ((entire_insn & 0xf0f0ffff) == 0x90300000) + { itype = M32R2F_INSN_REMU; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0xf0f0ffff) == 0x90300010) + { itype = M32R2F_INSN_REMUH; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0xf0f0ffff) == 0x90300018) + { itype = M32R2F_INSN_REMUB; goto extract_sfmt_div; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } case 152 : itype = M32R2F_INSN_SRL3; goto extract_sfmt_sll3; case 154 : itype = M32R2F_INSN_SRA3; goto extract_sfmt_sll3; case 156 : itype = M32R2F_INSN_SLL3; goto extract_sfmt_sll3; - case 159 : itype = M32R2F_INSN_LDI16; goto extract_sfmt_ldi16; + case 159 : + if ((entire_insn & 0xf0ff0000) == 0x90f00000) + { itype = M32R2F_INSN_LDI16; goto extract_sfmt_ldi16; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 160 : itype = M32R2F_INSN_STB_D; goto extract_sfmt_stb_d; case 162 : itype = M32R2F_INSN_STH_D; goto extract_sfmt_sth_d; case 164 : itype = M32R2F_INSN_ST_D; goto extract_sfmt_st_d; - case 166 : itype = M32R2F_INSN_BSET; goto extract_sfmt_bset; - case 167 : itype = M32R2F_INSN_BCLR; goto extract_sfmt_bset; + case 166 : + if ((entire_insn & 0xf8f00000) == 0xa0600000) + { itype = M32R2F_INSN_BSET; goto extract_sfmt_bset; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 167 : + if ((entire_insn & 0xf8f00000) == 0xa0700000) + { itype = M32R2F_INSN_BCLR; goto extract_sfmt_bset; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 168 : itype = M32R2F_INSN_LDB_D; goto extract_sfmt_ldb_d; case 169 : itype = M32R2F_INSN_LDUB_D; goto extract_sfmt_ldb_d; case 170 : itype = M32R2F_INSN_LDH_D; goto extract_sfmt_ldh_d; @@ -550,13 +661,34 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, case 172 : itype = M32R2F_INSN_LD_D; goto extract_sfmt_ld_d; case 176 : itype = M32R2F_INSN_BEQ; goto extract_sfmt_beq; case 177 : itype = M32R2F_INSN_BNE; goto extract_sfmt_beq; - case 184 : itype = M32R2F_INSN_BEQZ; goto extract_sfmt_beqz; - case 185 : itype = M32R2F_INSN_BNEZ; goto extract_sfmt_beqz; - case 186 : itype = M32R2F_INSN_BLTZ; goto extract_sfmt_beqz; - case 187 : itype = M32R2F_INSN_BGEZ; goto extract_sfmt_beqz; - case 188 : itype = M32R2F_INSN_BLEZ; goto extract_sfmt_beqz; - case 189 : itype = M32R2F_INSN_BGTZ; goto extract_sfmt_beqz; - case 220 : itype = M32R2F_INSN_SETH; goto extract_sfmt_seth; + case 184 : + if ((entire_insn & 0xfff00000) == 0xb0800000) + { itype = M32R2F_INSN_BEQZ; goto extract_sfmt_beqz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 185 : + if ((entire_insn & 0xfff00000) == 0xb0900000) + { itype = M32R2F_INSN_BNEZ; goto extract_sfmt_beqz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 186 : + if ((entire_insn & 0xfff00000) == 0xb0a00000) + { itype = M32R2F_INSN_BLTZ; goto extract_sfmt_beqz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 187 : + if ((entire_insn & 0xfff00000) == 0xb0b00000) + { itype = M32R2F_INSN_BGEZ; goto extract_sfmt_beqz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 188 : + if ((entire_insn & 0xfff00000) == 0xb0c00000) + { itype = M32R2F_INSN_BLEZ; goto extract_sfmt_beqz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 189 : + if ((entire_insn & 0xfff00000) == 0xb0d00000) + { itype = M32R2F_INSN_BGTZ; goto extract_sfmt_beqz; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 220 : + if ((entire_insn & 0xf0ff0000) == 0xd0c00000) + { itype = M32R2F_INSN_SETH; goto extract_sfmt_seth; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; case 224 : /* fall through */ case 225 : /* fall through */ case 226 : /* fall through */ @@ -593,12 +725,30 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 8) & (7 << 0))); switch (val) { - case 0 : itype = M32R2F_INSN_BCL24; goto extract_sfmt_bcl24; - case 1 : itype = M32R2F_INSN_BNCL24; goto extract_sfmt_bcl24; - case 4 : itype = M32R2F_INSN_BC24; goto extract_sfmt_bc24; - case 5 : itype = M32R2F_INSN_BNC24; goto extract_sfmt_bc24; - case 6 : itype = M32R2F_INSN_BL24; goto extract_sfmt_bl24; - case 7 : itype = M32R2F_INSN_BRA24; goto extract_sfmt_bra24; + case 0 : + if ((entire_insn & 0xff000000) == 0xf8000000) + { itype = M32R2F_INSN_BCL24; goto extract_sfmt_bcl24; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0xff000000) == 0xf9000000) + { itype = M32R2F_INSN_BNCL24; goto extract_sfmt_bcl24; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0xff000000) == 0xfc000000) + { itype = M32R2F_INSN_BC24; goto extract_sfmt_bc24; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0xff000000) == 0xfd000000) + { itype = M32R2F_INSN_BNC24; goto extract_sfmt_bc24; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0xff000000) == 0xfe000000) + { itype = M32R2F_INSN_BL24; goto extract_sfmt_bl24; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0xff000000) == 0xff000000) + { itype = M32R2F_INSN_BRA24; goto extract_sfmt_bra24; } + itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = M32R2F_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -612,11 +762,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_empty: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); #undef FLD return idesc; @@ -625,7 +775,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -638,7 +788,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -656,7 +806,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -664,7 +814,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -672,7 +822,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -689,7 +839,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; @@ -705,7 +855,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -722,7 +872,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_or3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; @@ -738,7 +888,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -755,19 +905,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_addi.f UINT f_r1; INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_simm8) = f_simm8; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -784,7 +934,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addv: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -797,7 +947,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -815,7 +965,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addv3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -823,7 +973,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -831,7 +981,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -848,7 +998,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addx: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -861,7 +1011,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -879,15 +1029,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bc8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -902,15 +1052,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bc24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -925,7 +1075,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_beq: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_beq.f UINT f_r1; UINT f_r2; @@ -933,7 +1083,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; @@ -941,7 +1091,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_disp16) = f_disp16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -958,19 +1108,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_beqz: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_beq.f UINT f_r2; SI f_disp16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_disp16) = f_disp16; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -986,15 +1136,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bl8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1010,15 +1160,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bl24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1034,15 +1184,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcl8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1058,15 +1208,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcl24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1082,15 +1232,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bra8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1105,15 +1255,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bra24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1128,7 +1278,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1141,7 +1291,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1158,19 +1308,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpi: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r2; INT f_simm16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1186,7 +1336,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpz: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r2; @@ -1195,7 +1345,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1211,7 +1361,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_div: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -1224,7 +1374,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1242,7 +1392,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jc: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1251,7 +1401,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jc", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jc", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1267,7 +1417,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jl: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1276,7 +1426,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1293,7 +1443,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jmp: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1302,7 +1452,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1318,7 +1468,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1331,7 +1481,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1348,7 +1498,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1356,7 +1506,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1364,7 +1514,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1381,7 +1531,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldb: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1394,7 +1544,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1411,7 +1561,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldb_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1419,7 +1569,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1427,7 +1577,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1444,7 +1594,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldh: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1457,7 +1607,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1474,7 +1624,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldh_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1482,7 +1632,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1490,7 +1640,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1507,7 +1657,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1520,7 +1670,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1538,7 +1688,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld24.f UINT f_r1; UINT f_uimm24; @@ -1550,7 +1700,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_uimm24) = f_uimm24; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1566,19 +1716,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldi8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_addi.f UINT f_r1; INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_simm8) = f_simm8; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1594,19 +1744,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldi16: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; INT f_simm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1622,7 +1772,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lock: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1635,7 +1785,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1652,7 +1802,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_machi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_machi_a.f UINT f_r1; UINT f_acc; @@ -1668,7 +1818,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1685,7 +1835,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mulhi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_machi_a.f UINT f_r1; UINT f_acc; @@ -1701,7 +1851,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_acc) = f_acc; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_acc 0x%x", 'x', f_acc, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_acc 0x%x", 'x', f_acc, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1718,7 +1868,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mv: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1731,7 +1881,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1748,7 +1898,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvfachi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_mvfachi_a.f UINT f_r1; UINT f_accs; @@ -1760,7 +1910,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_accs) = f_accs; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1776,7 +1926,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvfc: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1788,7 +1938,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1804,7 +1954,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvtachi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_mvtachi_a.f UINT f_r1; UINT f_accs; @@ -1816,7 +1966,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_accs) = f_accs; FLD (f_r1) = f_r1; FLD (i_src1) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1832,7 +1982,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvtc: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1844,7 +1994,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1860,11 +2010,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_nop: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); #undef FLD return idesc; @@ -1873,7 +2023,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rac_dsi: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_rac_dsi.f UINT f_accd; UINT f_accs; @@ -1887,7 +2037,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_accs) = f_accs; FLD (f_imm1) = f_imm1; FLD (f_accd) = f_accd; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs, "f_imm1 0x%x", 'x', f_imm1, "f_accd 0x%x", 'x', f_accd, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs, "f_imm1 0x%x", 'x', f_imm1, "f_accd 0x%x", 'x', f_accd, (char *) 0)); #undef FLD return idesc; @@ -1896,11 +2046,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rte: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1915,7 +2065,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_seth: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_seth.f UINT f_r1; UINT f_hi16; @@ -1927,7 +2077,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_hi16) = f_hi16; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1943,7 +2093,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sll3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1951,7 +2101,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1959,7 +2109,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1976,7 +2126,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_slli: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_slli.f UINT f_r1; UINT f_uimm5; @@ -1988,7 +2138,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (f_uimm5) = f_uimm5; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2005,7 +2155,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2018,7 +2168,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2035,7 +2185,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -2043,7 +2193,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2051,7 +2201,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2068,7 +2218,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2081,7 +2231,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2098,7 +2248,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -2106,7 +2256,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2114,7 +2264,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2131,7 +2281,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2144,7 +2294,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2161,7 +2311,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -2169,7 +2319,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2177,7 +2327,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2194,7 +2344,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2207,7 +2357,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2225,7 +2375,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2238,7 +2388,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2256,7 +2406,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2269,7 +2419,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2287,7 +2437,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_trap: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_trap.f UINT f_uimm4; @@ -2295,7 +2445,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm4) = f_uimm4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2310,7 +2460,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_unlock: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2323,7 +2473,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2340,7 +2490,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_satb: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -2353,7 +2503,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_satb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_satb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2370,7 +2520,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sat: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -2383,7 +2533,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sat", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sat", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2400,11 +2550,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sadd: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sadd", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sadd", (char *) 0)); #undef FLD return idesc; @@ -2413,7 +2563,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_macwu1: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2426,7 +2576,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2443,7 +2593,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_msblo: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2456,7 +2606,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2473,7 +2623,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mulwu1: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2486,7 +2636,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2503,11 +2653,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sc: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sc", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sc", (char *) 0)); #undef FLD return idesc; @@ -2516,7 +2666,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_clrpsw: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_clrpsw.f UINT f_uimm8; @@ -2524,7 +2674,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm8) = f_uimm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); #undef FLD return idesc; @@ -2533,7 +2683,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_setpsw: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_clrpsw.f UINT f_uimm8; @@ -2541,7 +2691,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm8) = f_uimm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); #undef FLD return idesc; @@ -2550,7 +2700,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bset: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bset.f UINT f_uimm3; UINT f_r2; @@ -2558,14 +2708,14 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (f_uimm3) = f_uimm3; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2581,7 +2731,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btst: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bset.f UINT f_uimm3; UINT f_r2; @@ -2593,7 +2743,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_uimm3) = f_uimm3; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */