X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Fdecode2.c;h=62adb1537378f25f5df3a17ea3962e762c8d413d;hb=db7858e227f3951c665410314fca62c77349ac24;hp=66ffa11e8558014620ff1cefac1db97e9774a425;hpb=e9c60591766341af909787c6274576425a73d798;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/decode2.c b/sim/m32r/decode2.c index 66ffa11e85..62adb15373 100644 --- a/sim/m32r/decode2.c +++ b/sim/m32r/decode2.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2009 Free Software Foundation, Inc. +Copyright 1996-2015 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,8 +17,7 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + with this program; if not, see . */ @@ -185,7 +184,8 @@ static const struct insn_sem m32r2f_insn_sem[] = { M32R_INSN_BTST, M32R2F_INSN_BTST, M32R2F_SFMT_BTST, M32R2F_INSN_PAR_BTST, M32R2F_INSN_WRITE_BTST }, }; -static const struct insn_sem m32r2f_insn_sem_invalid = { +static const struct insn_sem m32r2f_insn_sem_invalid = +{ VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }; @@ -259,14 +259,14 @@ m32r2f_init_idesc_table (SIM_CPU *cpu) const IDESC * m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, + CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn, ARGBUF *abuf) { /* Result of decoder. */ M32R2F_INSN_TYPE itype; { - CGEN_INSN_INT insn = base_insn; + CGEN_INSN_WORD insn = base_insn; { unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); @@ -762,11 +762,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_empty: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); #undef FLD return idesc; @@ -775,7 +775,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -788,7 +788,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -806,7 +806,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -814,7 +814,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -822,7 +822,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -839,7 +839,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; @@ -855,7 +855,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -872,7 +872,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_or3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; @@ -888,7 +888,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -905,19 +905,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_addi.f UINT f_r1; INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_simm8) = f_simm8; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -934,7 +934,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addv: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -947,7 +947,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -965,7 +965,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addv3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -973,7 +973,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -981,7 +981,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -998,7 +998,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addx: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -1011,7 +1011,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1029,15 +1029,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bc8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1052,15 +1052,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bc24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1075,7 +1075,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_beq: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_beq.f UINT f_r1; UINT f_r2; @@ -1083,7 +1083,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; @@ -1091,7 +1091,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_disp16) = f_disp16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1108,19 +1108,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_beqz: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_beq.f UINT f_r2; SI f_disp16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_disp16) = f_disp16; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1136,15 +1136,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bl8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1160,15 +1160,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bl24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1184,15 +1184,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcl8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1208,15 +1208,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcl24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1232,15 +1232,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bra8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1255,15 +1255,15 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bra24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1278,7 +1278,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -1291,7 +1291,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1308,19 +1308,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpi: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r2; INT f_simm16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1336,7 +1336,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpz: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r2; @@ -1345,7 +1345,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1361,7 +1361,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_div: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; @@ -1374,7 +1374,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1392,7 +1392,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jc: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1401,7 +1401,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jc", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jc", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1417,7 +1417,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jl: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1426,7 +1426,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1443,7 +1443,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jmp: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_jl.f UINT f_r2; @@ -1452,7 +1452,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1468,7 +1468,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1481,7 +1481,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1498,7 +1498,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1506,7 +1506,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1514,7 +1514,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1531,7 +1531,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldb: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1544,7 +1544,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1561,7 +1561,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldb_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1569,7 +1569,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1577,7 +1577,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1594,7 +1594,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldh: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1607,7 +1607,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1624,7 +1624,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldh_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -1632,7 +1632,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1640,7 +1640,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1657,7 +1657,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1670,7 +1670,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1688,7 +1688,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ld24: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld24.f UINT f_r1; UINT f_uimm24; @@ -1700,7 +1700,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_uimm24) = f_uimm24; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1716,19 +1716,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldi8: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_addi.f UINT f_r1; INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_simm8) = f_simm8; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1744,19 +1744,19 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ldi16: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; INT f_simm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1772,7 +1772,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lock: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1785,7 +1785,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1802,7 +1802,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_machi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_machi_a.f UINT f_r1; UINT f_acc; @@ -1818,7 +1818,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1835,7 +1835,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mulhi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_machi_a.f UINT f_r1; UINT f_acc; @@ -1851,7 +1851,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_acc) = f_acc; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_acc 0x%x", 'x', f_acc, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_acc 0x%x", 'x', f_acc, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1868,7 +1868,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mv: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1881,7 +1881,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1898,7 +1898,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvfachi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_mvfachi_a.f UINT f_r1; UINT f_accs; @@ -1910,7 +1910,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_accs) = f_accs; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1926,7 +1926,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvfc: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1938,7 +1938,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1954,7 +1954,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvtachi_a: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_mvtachi_a.f UINT f_r1; UINT f_accs; @@ -1966,7 +1966,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_accs) = f_accs; FLD (f_r1) = f_r1; FLD (i_src1) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1982,7 +1982,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mvtc: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -1994,7 +1994,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2010,11 +2010,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_nop: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); #undef FLD return idesc; @@ -2023,7 +2023,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rac_dsi: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_rac_dsi.f UINT f_accd; UINT f_accs; @@ -2037,7 +2037,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_accs) = f_accs; FLD (f_imm1) = f_imm1; FLD (f_accd) = f_accd; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs, "f_imm1 0x%x", 'x', f_imm1, "f_accd 0x%x", 'x', f_accd, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs, "f_imm1 0x%x", 'x', f_imm1, "f_accd 0x%x", 'x', f_accd, (char *) 0)); #undef FLD return idesc; @@ -2046,11 +2046,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rte: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2065,7 +2065,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_seth: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_seth.f UINT f_r1; UINT f_hi16; @@ -2077,7 +2077,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_hi16) = f_hi16; FLD (f_r1) = f_r1; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2093,7 +2093,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sll3: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; @@ -2101,7 +2101,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2109,7 +2109,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2126,7 +2126,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_slli: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_slli.f UINT f_r1; UINT f_uimm5; @@ -2138,7 +2138,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (f_uimm5) = f_uimm5; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2155,7 +2155,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2168,7 +2168,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2185,7 +2185,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -2193,7 +2193,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2201,7 +2201,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2218,7 +2218,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2231,7 +2231,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2248,7 +2248,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -2256,7 +2256,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2264,7 +2264,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2281,7 +2281,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2294,7 +2294,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2311,7 +2311,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth_d: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_d.f UINT f_r1; UINT f_r2; @@ -2319,7 +2319,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2327,7 +2327,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2344,7 +2344,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_st_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2357,7 +2357,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2375,7 +2375,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sth_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2388,7 +2388,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2406,7 +2406,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_stb_plus: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2419,7 +2419,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2437,7 +2437,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_trap: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_trap.f UINT f_uimm4; @@ -2445,7 +2445,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm4) = f_uimm4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2460,7 +2460,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_unlock: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2473,7 +2473,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2490,7 +2490,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_satb: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -2503,7 +2503,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_satb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_satb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2520,7 +2520,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sat: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_ld_plus.f UINT f_r1; UINT f_r2; @@ -2533,7 +2533,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sat", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sat", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2550,11 +2550,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sadd: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sadd", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sadd", (char *) 0)); #undef FLD return idesc; @@ -2563,7 +2563,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_macwu1: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2576,7 +2576,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2593,7 +2593,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_msblo: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2606,7 +2606,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2623,7 +2623,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mulwu1: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_st_plus.f UINT f_r1; UINT f_r2; @@ -2636,7 +2636,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2653,11 +2653,11 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sc: { const IDESC *idesc = &m32r2f_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sc", (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sc", (char *) 0)); #undef FLD return idesc; @@ -2666,7 +2666,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_clrpsw: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_clrpsw.f UINT f_uimm8; @@ -2674,7 +2674,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm8) = f_uimm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); #undef FLD return idesc; @@ -2683,7 +2683,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_setpsw: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_clrpsw.f UINT f_uimm8; @@ -2691,7 +2691,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_uimm8) = f_uimm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); #undef FLD return idesc; @@ -2700,7 +2700,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bset: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bset.f UINT f_uimm3; UINT f_r2; @@ -2708,14 +2708,14 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (f_uimm3) = f_uimm3; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2731,7 +2731,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btst: { const IDESC *idesc = &m32r2f_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; + CGEN_INSN_WORD insn = entire_insn; #define FLD(f) abuf->fields.sfmt_bset.f UINT f_uimm3; UINT f_r2; @@ -2743,7 +2743,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_r2) = f_r2; FLD (f_uimm3) = f_uimm3; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); + CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */