X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Fmloopx.in;h=31ae0e54e1f0f12fbbb15d7e664fee0b2b55fe9b;hb=160f8a8f32f5566077e4a4b13943bc7c70bc5da2;hp=e1663f799f2fd434ece332af05b733a9ef765967;hpb=72ec28b8afa357cdde70c612b4e0e9f37a34f8e4;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/m32r/mloopx.in b/sim/m32r/mloopx.in
index e1663f799f..31ae0e54e1 100644
--- a/sim/m32r/mloopx.in
+++ b/sim/m32r/mloopx.in
@@ -1,21 +1,21 @@
 # Simulator main loop for m32rx. -*- C -*-
-# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+#
+# Copyright 1996-2020 Free Software Foundation, Inc.
 #
 # This file is part of the GNU Simulators.
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
 #
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 #
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 # Syntax:
 # /bin/sh mainloop.in command
@@ -289,15 +289,33 @@ cat <<EOF
 	    {
 	      if ((insn & 0x8000) != 0) /* parallel? */
 		{
-		  /* Yep.  Here's the "interesting" [sic] part.  */
-		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
-		  sc += 3;
-		  max_insns -= 3;
+		  int up_count;
+
+		  if (((insn >> 16) & 0xfff0) == 0x10f0)
+		    {
+		      /* FIXME: No need to handle this sequentially if system
+		         calls will be able to execute after second insn in
+		         parallel. ( trap #num || insn ) */
+		      /* insn */
+		      idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
+ 				       sc, 1, 0);
+		      /* trap */
+		      emit_16 (current_cpu, pc, insn >> 16, sc + 1, 1, 0);
+		      up_count = 2;
+		    }
+		  else
+		    {
+		      /* Yep.  Here's the "interesting" [sic] part.  */
+		      idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
+		      up_count = 3;
+		    }
+		  sc += up_count;
+		  max_insns -= up_count;
 		  icount += 2;
 		  pc += 4;
 		  if (IDESC_CTI_P (idesc))
 		    {
-		      SET_CTI_VPC (sc - 3);
+		      SET_CTI_VPC (sc - up_count);
 		      break;
 		    }
 		}
@@ -375,18 +393,51 @@ cat <<EOF
 		     Only emit before/after handlers if necessary.  */
 		  if (trace_p || profile_p)
 		    {
-		      idesc = emit_full_parallel (current_cpu, pc, insn, sc,
-						  trace_p, profile_p);
+		      if (((insn >> 16) & 0xfff0) == 0x10f0)
+			{
+			  /* FIXME: No need to handle this sequentially if
+			     system calls will be able to execute after second
+			     insn in parallel. ( trap #num || insn ) */
+			  /* insn */
+			  idesc = emit_full16 (current_cpu, pc + 2,
+					       insn & 0x7fff, sc, 0, 0);
+			  /* trap */
+			  emit_full16 (current_cpu, pc, insn >> 16, sc + 3,
+				       0, 0);
+			}
+		      else
+			{
+		          idesc = emit_full_parallel (current_cpu, pc, insn,
+						      sc, trace_p, profile_p);
+			}
 		      cti_sc = sc + 1;
 		      sc += 6;
 		      max_insns -= 6;
 		    }
 		  else
 		    {
-		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
+		      int up_count;
+
+		      if (((insn >> 16) & 0xfff0) == 0x10f0)
+			{
+                          /* FIXME: No need to handle this sequentially if
+                             system calls will be able to execute after second
+                             insn in parallel. ( trap #num || insn ) */
+                          /* insn */
+                          idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
+                                           sc, 0, 0);
+                          /* trap */
+                          emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 0);
+                          up_count = 2;
+			}
+		      else
+			{
+		          idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
+                          up_count = 3;
+			}
 		      cti_sc = sc;
-		      sc += 3;
-		      max_insns -= 3;
+		      sc += up_count;
+		      max_insns -= up_count;
 		    }
 		  icount += 2;
 		  pc += 4;