X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Fmodelx.c;h=a17493ddb8b9a8b2e0f6bb00960480e0dc17cbcf;hb=60db1b8565060f4bd2287b060ea9724c93289982;hp=5fe36ccf1351d3e9ffd5115f6a8f0d3213e331dc;hpb=0f51e9bf19401fe6f5beb4b46fc1ee0285d02d69;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c index 5fe36ccf13..a17493ddb8 100644 --- a/sim/m32r/modelx.c +++ b/sim/m32r/modelx.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2010 Free Software Foundation, Inc. +Copyright 1996-2020 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,8 +17,7 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + with this program; if not, see . */ @@ -1823,7 +1822,7 @@ model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1901,7 +1900,7 @@ model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2615,7 +2614,7 @@ model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2721,7 +2720,7 @@ model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2740,7 +2739,7 @@ model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3011,7 +3010,7 @@ m32rx_model_init (SIM_CPU *cpu) #define TIMING_DATA(td) 0 #endif -static const MODEL m32rx_models[] = +static const SIM_MODEL m32rx_models[] = { { "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init }, { 0 } @@ -3019,7 +3018,7 @@ static const MODEL m32rx_models[] = /* The properties of this cpu's implementation. */ -static const MACH_IMP_PROPERTIES m32rxf_imp_properties = +static const SIM_MACH_IMP_PROPERTIES m32rxf_imp_properties = { sizeof (SIM_CPU), #if WITH_SCACHE @@ -3061,7 +3060,7 @@ m32rx_init_cpu (SIM_CPU *cpu) #endif } -const MACH m32rx_mach = +const SIM_MACH m32rx_mach = { "m32rx", "m32rx", MACH_M32RX, 32, 32, & m32rx_models[0], & m32rxf_imp_properties,